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[thirdparty/u-boot.git] / include / configs / MigoR.h
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83d290c5 1/* SPDX-License-Identifier: GPL-2.0+ */
c2042f59 2/*
3 * Configuation settings for the Renesas Solutions Migo-R board
4 *
5 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
c2042f59 6 */
7
8#ifndef __MIGO_R_H
9#define __MIGO_R_H
10
c2042f59 11#define CONFIG_CPU_SH7722 1
c2042f59 12
18a40e84 13#define CONFIG_DISPLAY_BOARDINFO
c2042f59 14
15/* SMC9111 */
7194ab80 16#define CONFIG_SMC91111
c2042f59 17#define CONFIG_SMC91111_BASE (0xB0000000)
18
19/* MEMORY */
20#define MIGO_R_SDRAM_BASE (0x8C000000)
21#define MIGO_R_FLASH_BASE_1 (0xA0000000)
22#define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024)
23
6d0f6bcf 24#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
6d0f6bcf 25#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
c2042f59 26
27/* SCIF */
c2042f59 28#define CONFIG_CONS_SCIF0 1
c2042f59 29
6d0f6bcf
JCPV
30#define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE)
31#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
c2042f59 32
33/* Enable alternate, more extensive, memory test */
c2042f59 34/* Scratch address used by the alternate memory test */
6d0f6bcf 35#undef CONFIG_SYS_MEMTEST_SCRATCH
c2042f59 36
37/* Enable temporary baudrate change while serial download */
6d0f6bcf 38#undef CONFIG_SYS_LOADS_BAUD_CHANGE
c2042f59 39
6d0f6bcf 40#define CONFIG_SYS_SDRAM_BASE (MIGO_R_SDRAM_BASE)
c2042f59 41/* maybe more, but if so u-boot doesn't know about it... */
6d0f6bcf 42#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
c2042f59 43/* default load address for scripts ?!? */
6d0f6bcf 44#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
c2042f59 45
46/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
6d0f6bcf 47#define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1)
c2042f59 48/* Monitor size */
6d0f6bcf 49#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
c2042f59 50/* Size of DRAM reserved for malloc() use */
6d0f6bcf 51#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
6d0f6bcf 52#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
c2042f59 53
54/* FLASH */
6d0f6bcf 55#undef CONFIG_SYS_FLASH_QUIET_TEST
c2042f59 56/* print 'E' for empty sector on flinfo */
6d0f6bcf 57#define CONFIG_SYS_FLASH_EMPTY_INFO
c2042f59 58/* Physical start address of Flash memory */
6d0f6bcf 59#define CONFIG_SYS_FLASH_BASE (MIGO_R_FLASH_BASE_1)
c2042f59 60/* Max number of sectors on each Flash chip */
6d0f6bcf 61#define CONFIG_SYS_MAX_FLASH_SECT 512
c2042f59 62
63/* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */
6d0f6bcf
JCPV
64#define CONFIG_SYS_MAX_FLASH_BANKS 1
65#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) }
c2042f59 66
67/* Timeout for Flash erase operations (in ms) */
6d0f6bcf 68#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
c2042f59 69/* Timeout for Flash write operations (in ms) */
6d0f6bcf 70#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
c2042f59 71/* Timeout for Flash set sector lock bit operations (in ms) */
6d0f6bcf 72#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
c2042f59 73/* Timeout for Flash clear lock bit operations (in ms) */
6d0f6bcf 74#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
c2042f59 75
76/* Use hardware flash sectors protection instead of U-Boot software protection */
6d0f6bcf 77#undef CONFIG_SYS_DIRECT_FLASH_TFTP
c2042f59 78
79/* ENV setting */
c2042f59 80#define CONFIG_ENV_OVERWRITE 1
6d0f6bcf 81/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
c2042f59 82
83/* Board Clock */
84#define CONFIG_SYS_CLK_FREQ 33333333
684a501e 85#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
c2042f59 86
87#endif /* __MIGO_R_H */