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c609719b WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
3765b3e7 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
c609719b WD |
6 | */ |
7 | ||
8 | /* | |
9 | * board/config.h - configuration options, board specific | |
10 | */ | |
11 | ||
12 | #ifndef __CONFIG_H | |
13 | #define __CONFIG_H | |
14 | ||
15 | /*********************************************************** | |
16 | * High Level Configuration Options | |
17 | * (easy to change) | |
18 | ***********************************************************/ | |
19 | #define CONFIG_405GP 1 /* This is a PPC405 CPU */ | |
c609719b | 20 | #define CONFIG_PIP405 1 /* ...on a PIP405 board */ |
2ae18241 WD |
21 | |
22 | #define CONFIG_SYS_TEXT_BASE 0xFFF80000 | |
23 | ||
c609719b WD |
24 | /*********************************************************** |
25 | * Clock | |
26 | ***********************************************************/ | |
27 | #define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */ | |
28 | ||
a1aa0bb5 JL |
29 | /* |
30 | * BOOTP options | |
31 | */ | |
32 | #define CONFIG_BOOTP_BOOTFILESIZE | |
33 | #define CONFIG_BOOTP_BOOTPATH | |
34 | #define CONFIG_BOOTP_GATEWAY | |
35 | #define CONFIG_BOOTP_HOSTNAME | |
36 | ||
acf02697 JL |
37 | /* |
38 | * Command line configuration. | |
39 | */ | |
acf02697 | 40 | #define CONFIG_CMD_IDE |
acf02697 | 41 | #define CONFIG_CMD_PCI |
acf02697 JL |
42 | #define CONFIG_CMD_IRQ |
43 | #define CONFIG_CMD_EEPROM | |
acf02697 JL |
44 | #define CONFIG_CMD_REGINFO |
45 | #define CONFIG_CMD_FDC | |
c649e3c9 | 46 | #define CONFIG_SCSI |
acf02697 | 47 | #define CONFIG_CMD_SDRAM |
acf02697 | 48 | #define CONFIG_CMD_SAVES |
acf02697 | 49 | |
c609719b WD |
50 | /************************************************************** |
51 | * I2C Stuff: | |
52 | * the PIP405 is equiped with an Atmel 24C128/256 EEPROM at address | |
53 | * 0x53. | |
54 | * Caution: on the same bus is the SPD (Serial Presens Detect | |
55 | * EEPROM of the SDRAM | |
56 | * The Atmel EEPROM uses 16Bit addressing. | |
57 | ***************************************************************/ | |
880540de DE |
58 | #define CONFIG_SYS_I2C |
59 | #define CONFIG_SYS_I2C_PPC4XX | |
60 | #define CONFIG_SYS_I2C_PPC4XX_CH0 | |
61 | #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 50000 | |
62 | #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F | |
c609719b | 63 | |
6d0f6bcf JCPV |
64 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 |
65 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
bb1f8b4f | 66 | #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ |
0e8d1586 JCPV |
67 | #define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ |
68 | #define CONFIG_ENV_SIZE 0x800 /* 2 kBytes may be used for env vars */ | |
c609719b | 69 | |
6d0f6bcf JCPV |
70 | #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW |
71 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel 24C128/256 has */ | |
c609719b WD |
72 | /* 64 byte page write mode using*/ |
73 | /* last 6 bits of the address */ | |
6d0f6bcf | 74 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ |
c609719b | 75 | |
c609719b WD |
76 | /*************************************************************** |
77 | * Definitions for Serial Presence Detect EEPROM address | |
78 | * (to get SDRAM settings) | |
79 | ***************************************************************/ | |
80 | #define SPD_EEPROM_ADDRESS 0x50 | |
81 | ||
21be309b DM |
82 | #define CONFIG_BOARD_EARLY_INIT_R |
83 | ||
c609719b WD |
84 | /************************************************************** |
85 | * Environment definitions | |
86 | **************************************************************/ | |
c609719b | 87 | |
c609719b | 88 | /* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */ |
2afbe4ed | 89 | /* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */ |
c609719b | 90 | |
3e38691e | 91 | #define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */ |
c609719b WD |
92 | #define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */ |
93 | ||
94 | #define CONFIG_IPADDR 10.0.0.100 | |
95 | #define CONFIG_SERVERIP 10.0.0.1 | |
96 | #define CONFIG_PREBOOT | |
c609719b WD |
97 | /*************************************************************** |
98 | * defines if an overwrite_console function exists | |
99 | *************************************************************/ | |
c609719b WD |
100 | /*************************************************************** |
101 | * defines if the overwrite_console should be stored in the | |
102 | * environment | |
103 | **************************************************************/ | |
c609719b WD |
104 | |
105 | /************************************************************** | |
106 | * loads config | |
107 | *************************************************************/ | |
108 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ | |
6d0f6bcf | 109 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
c609719b | 110 | |
7205e407 | 111 | #define CONFIG_MISC_INIT_R |
c609719b WD |
112 | /*********************************************************** |
113 | * Miscellaneous configurable options | |
114 | **********************************************************/ | |
6d0f6bcf | 115 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
acf02697 | 116 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 117 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
c609719b | 118 | #else |
6d0f6bcf | 119 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
c609719b | 120 | #endif |
6d0f6bcf JCPV |
121 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
122 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
123 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
c609719b | 124 | |
6d0f6bcf JCPV |
125 | #define CONFIG_SYS_MEMTEST_START 0x0100000 /* memtest works on */ |
126 | #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */ | |
c609719b | 127 | |
550650dd | 128 | #define CONFIG_CONS_INDEX 1 /* Use UART0 */ |
550650dd SR |
129 | #define CONFIG_SYS_NS16550_SERIAL |
130 | #define CONFIG_SYS_NS16550_REG_SIZE 1 | |
131 | #define CONFIG_SYS_NS16550_CLK get_serial_clock() | |
132 | ||
6d0f6bcf JCPV |
133 | #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* no external serial clock used */ |
134 | #define CONFIG_SYS_BASE_BAUD 691200 | |
c609719b WD |
135 | |
136 | /* The following table includes the supported baudrates */ | |
6d0f6bcf | 137 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
c609719b WD |
138 | { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ |
139 | 57600, 115200, 230400, 460800, 921600 } | |
140 | ||
6d0f6bcf JCPV |
141 | #define CONFIG_SYS_LOAD_ADDR 0x400000 /* default load address */ |
142 | #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ | |
c609719b | 143 | |
c609719b WD |
144 | /*----------------------------------------------------------------------- |
145 | * PCI stuff | |
146 | *----------------------------------------------------------------------- | |
147 | */ | |
148 | #define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */ | |
149 | #define PCI_HOST_FORCE 1 /* configure as pci host */ | |
150 | #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ | |
151 | ||
842033e6 | 152 | #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ |
c609719b | 153 | #define CONFIG_PCI_HOST PCI_HOST_FORCE /* configure as pci-host */ |
c609719b | 154 | /* resource configuration */ |
6d0f6bcf JCPV |
155 | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */ |
156 | #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */ | |
157 | #define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */ | |
158 | #define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */ | |
159 | #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ | |
160 | #define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */ | |
161 | #define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */ | |
162 | #define CONFIG_SYS_PCI_PTM2PCI 0x00000000 /* Host: use this pci address */ | |
c609719b WD |
163 | |
164 | /*----------------------------------------------------------------------- | |
165 | * Start addresses for the final memory configuration | |
166 | * (Set up by the startup code) | |
6d0f6bcf | 167 | * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
c609719b | 168 | */ |
6d0f6bcf JCPV |
169 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
170 | #define CONFIG_SYS_FLASH_BASE 0xFFF80000 | |
171 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
172 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */ | |
173 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserve 1024 kB for malloc() */ | |
c609719b WD |
174 | |
175 | /* | |
176 | * For booting Linux, the board info and command line data | |
177 | * have to be in the first 8 MB of memory, since this is | |
178 | * the maximum mapped by the Linux kernel during initialization. | |
179 | */ | |
6d0f6bcf | 180 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
c609719b WD |
181 | /*----------------------------------------------------------------------- |
182 | * FLASH organization | |
183 | */ | |
21be309b DM |
184 | #define CONFIG_SYS_UPDATE_FLASH_SIZE |
185 | #define CONFIG_SYS_FLASH_PROTECTION | |
186 | #define CONFIG_SYS_FLASH_EMPTY_INFO | |
187 | ||
188 | #define CONFIG_SYS_FLASH_CFI | |
189 | #define CONFIG_FLASH_CFI_DRIVER | |
190 | ||
191 | #define CONFIG_FLASH_SHOW_PROGRESS 45 | |
c609719b | 192 | |
21be309b DM |
193 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
194 | #define CONFIG_SYS_MAX_FLASH_SECT 256 | |
c609719b | 195 | |
c609719b WD |
196 | /* |
197 | * Init Memory Controller: | |
198 | */ | |
7205e407 WD |
199 | #define FLASH_MAX_SIZE 0x00800000 /* 8MByte max */ |
200 | #define FLASH_BASE_PRELIM 0xFF800000 /* open the flash CS */ | |
201 | /* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */ | |
202 | #define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */ | |
c609719b | 203 | |
c609719b WD |
204 | /* Configuration Port location */ |
205 | #define CONFIG_PORT_ADDR 0xF4000000 | |
206 | #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000 | |
207 | ||
c609719b WD |
208 | /*----------------------------------------------------------------------- |
209 | * Definitions for initial stack pointer and data area (in On Chip SRAM) | |
210 | */ | |
6d0f6bcf JCPV |
211 | #define CONFIG_SYS_TEMP_STACK_OCM 1 |
212 | #define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000 | |
213 | #define CONFIG_SYS_OCM_DATA_SIZE 0x1000 | |
214 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */ | |
553f0982 | 215 | #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of On Chip SRAM */ |
25ddd1fb | 216 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
6d0f6bcf | 217 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
c609719b | 218 | |
c609719b WD |
219 | /*********************************************************************** |
220 | * External peripheral base address | |
221 | ***********************************************************************/ | |
6d0f6bcf | 222 | #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0xE8000000 |
c609719b WD |
223 | |
224 | /*********************************************************************** | |
225 | * Last Stage Init | |
226 | ***********************************************************************/ | |
227 | #define CONFIG_LAST_STAGE_INIT | |
228 | /************************************************************ | |
229 | * Ethernet Stuff | |
230 | ***********************************************************/ | |
96e21f86 | 231 | #define CONFIG_PPC4xx_EMAC |
c609719b WD |
232 | #define CONFIG_MII 1 /* MII PHY management */ |
233 | #define CONFIG_PHY_ADDR 1 /* PHY address */ | |
c609719b WD |
234 | /************************************************************ |
235 | * RTC | |
236 | ***********************************************************/ | |
237 | #define CONFIG_RTC_MC146818 | |
238 | #undef CONFIG_WATCHDOG /* watchdog disabled */ | |
239 | ||
240 | /************************************************************ | |
241 | * IDE/ATA stuff | |
242 | ************************************************************/ | |
6d0f6bcf JCPV |
243 | #define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */ |
244 | #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */ | |
c609719b | 245 | |
6d0f6bcf JCPV |
246 | #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS /* base address */ |
247 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */ | |
248 | #define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170 /* ide1 offset */ | |
249 | #define CONFIG_SYS_ATA_DATA_OFFSET 0 /* data reg offset */ | |
250 | #define CONFIG_SYS_ATA_REG_OFFSET 0 /* reg offset */ | |
251 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x200 /* alternate register offset */ | |
c609719b WD |
252 | |
253 | #undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */ | |
254 | #undef CONFIG_IDE_LED /* no led for ide supported */ | |
255 | #define CONFIG_IDE_RESET /* reset for ide supported... */ | |
256 | #define CONFIG_IDE_RESET_ROUTINE /* with a special reset function */ | |
7205e407 | 257 | #define CONFIG_SUPPORT_VFAT |
c609719b WD |
258 | |
259 | /************************************************************ | |
260 | * ATAPI support (experimental) | |
261 | ************************************************************/ | |
262 | #define CONFIG_ATAPI /* enable ATAPI Support */ | |
263 | ||
264 | /************************************************************ | |
265 | * SCSI support (experimental) only SYM53C8xx supported | |
266 | ************************************************************/ | |
267 | #define CONFIG_SCSI_SYM53C8XX | |
6d0f6bcf JCPV |
268 | #define CONFIG_SYS_SCSI_MAX_LUN 8 /* number of supported LUNs */ |
269 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 7 /* maximum SCSI ID (0..6) */ | |
270 | #define CONFIG_SYS_SCSI_MAX_DEVICE CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN /* maximum Target devices */ | |
271 | #define CONFIG_SYS_SCSI_SPIN_UP_TIME 2 | |
c609719b WD |
272 | |
273 | /************************************************************ | |
274 | * Disk-On-Chip configuration | |
275 | ************************************************************/ | |
6d0f6bcf JCPV |
276 | #define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ |
277 | #define CONFIG_SYS_DOC_SHORT_TIMEOUT | |
278 | #define CONFIG_SYS_DOC_SUPPORT_2000 | |
279 | #define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM | |
c609719b WD |
280 | |
281 | /************************************************************ | |
282 | * DISK Partition support | |
283 | ************************************************************/ | |
c609719b | 284 | |
c609719b WD |
285 | /************************************************************ |
286 | * Video support | |
287 | ************************************************************/ | |
c609719b | 288 | #define CONFIG_VIDEO_LOGO |
c609719b WD |
289 | #define CONFIG_VIDEO_ONBOARD /* Video controller is on-board */ |
290 | ||
291 | /************************************************************ | |
292 | * USB support | |
293 | ************************************************************/ | |
294 | #define CONFIG_USB_UHCI | |
c609719b WD |
295 | |
296 | /* Enable needed helper functions */ | |
c609719b WD |
297 | |
298 | /************************************************************ | |
299 | * Debug support | |
300 | ************************************************************/ | |
acf02697 | 301 | #if defined(CONFIG_CMD_KGDB) |
c609719b | 302 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
c609719b WD |
303 | #endif |
304 | ||
a2663ea4 WD |
305 | /************************************************************ |
306 | * support BZIP2 compression | |
307 | ************************************************************/ | |
308 | #define CONFIG_BZIP2 1 | |
309 | ||
c609719b | 310 | #endif /* __CONFIG_H */ |