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1cb8e980 1/*
531716e1 2 * (C) Copyright 2002, 2003
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3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
792a09eb 5 * Gary Jennejohn <garyj@denx.de>
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6 * David Mueller <d.mueller@elsoft.ch>
7 *
8 * Configuation settings for the MPL VCMA9 board.
9 *
1a459660 10 * SPDX-License-Identifier: GPL-2.0+
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11 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
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16
17#define MACH_TYPE_MPL_VCMA9 227
18
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19/*
20 * High Level Configuration Options
21 * (easy to change)
22 */
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23#define CONFIG_SYS_THUMB_BUILD
24
f2168440 25#define CONFIG_S3C24X0 /* This is a SAMSUNG S3C24x0-type SoC */
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26#define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
27#define CONFIG_VCMA9 /* on a MPL VCMA9 Board */
c686537f 28#define CONFIG_MACH_TYPE MACH_TYPE_MPL_VCMA9 /* Machine type */
1cb8e980 29
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30#define CONFIG_SYS_TEXT_BASE 0x0
31
13bd4d87 32
f3108304 33#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
1cb8e980 34
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35/* input clock of PLL (VCMA9 has 12MHz input clock) */
36#define CONFIG_SYS_CLK_FREQ 12000000
1cb8e980 37
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38#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
39#define CONFIG_SETUP_MEMORY_TAGS
40#define CONFIG_INITRD_TAG
a5562901 41
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42/*
43 * BOOTP options
44 */
45#define CONFIG_BOOTP_BOOTFILESIZE
46#define CONFIG_BOOTP_BOOTPATH
47#define CONFIG_BOOTP_GATEWAY
48#define CONFIG_BOOTP_HOSTNAME
49
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50/*
51 * Command line configuration.
52 */
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53#define CONFIG_CMD_CACHE
54#define CONFIG_CMD_EEPROM
a5562901 55#define CONFIG_CMD_REGINFO
a5562901 56#define CONFIG_CMD_DATE
a5562901 57#define CONFIG_CMD_BSP
f3108304 58#define CONFIG_CMD_NAND
a5562901 59
9660e442 60#define CONFIG_BOARD_LATE_INIT
1cb8e980 61
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62#define CONFIG_CMDLINE_EDITING
63
64/*
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65 * I2C stuff:
66 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
67 * address 0x50 with 16bit addressing
f3108304 68 */
2d8f1e27 69#define CONFIG_SYS_I2C
1cb8e980 70
f3108304 71/* we use the built-in I2C controller */
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72#define CONFIG_SYS_I2C_S3C24X0
73#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* I2C speed */
74#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x7F /* I2C slave addr */
f3108304 75
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76#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
77#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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78/* use EEPROM for environment vars */
79#define CONFIG_ENV_IS_IN_EEPROM 1
80/* environment starts at offset 0 */
81#define CONFIG_ENV_OFFSET 0x000
82/* 2KB should be more than enough */
83#define CONFIG_ENV_SIZE 0x800
1cb8e980 84
6d0f6bcf 85#undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
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86/* 64 bytes page write mode on 24C256 */
87#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
6d0f6bcf 88#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
1cb8e980 89
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90/*
91 * Hardware drivers
92 */
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93#define CONFIG_CS8900 /* we have a CS8900 on-board */
94#define CONFIG_CS8900_BASE 0x20000300
95#define CONFIG_CS8900_BUS16
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96
97/*
98 * select serial console configuration
99 */
300f99f4 100#define CONFIG_S3C24X0_SERIAL
f3108304 101#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
1cb8e980 102
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103/* USB support (currently only works with D-cache off) */
104#define CONFIG_USB_OHCI
fb24ffc0 105#define CONFIG_USB_OHCI_S3C24XX
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106#define CONFIG_USB_KEYBOARD
107#define CONFIG_USB_STORAGE
108#define CONFIG_DOS_PARTITION
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109
110/* Enable needed helper functions */
f3108304 111#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
48b42616 112
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113/* RTC */
114#define CONFIG_RTC_S3C24X0
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115
116
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117/* allow to overwrite serial and ethaddr */
118#define CONFIG_ENV_OVERWRITE
119
f3108304 120#define CONFIG_BAUDRATE 9600
1cb8e980 121
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122#define CONFIG_BOOTDELAY 5
123#define CONFIG_BOOT_RETRY_TIME -1
124#define CONFIG_RESET_TO_RETRY
125#define CONFIG_ZERO_BOOTDELAY_CHECK
a2663ea4 126
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127#define CONFIG_NETMASK 255.255.255.0
128#define CONFIG_IPADDR 10.0.0.110
129#define CONFIG_SERVERIP 10.0.0.1
1cb8e980 130
a5562901 131#if defined(CONFIG_CMD_KGDB)
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132/* speed to run kgdb serial port */
133#define CONFIG_KGDB_BAUDRATE 115200
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134#endif
135
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136/* Miscellaneous configurable options */
137#define CONFIG_SYS_LONGHELP /* undef to save memory */
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138#define CONFIG_SYS_CBSIZE 256
139/* Print Buffer Size */
140#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
141#define CONFIG_SYS_MAXARGS 16
142/* Boot Argument Buffer Size */
143#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
144
3d3206f1 145#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
f3108304 146#define CONFIG_DISPLAY_BOARDINFO /* Display board info */
1cb8e980 147
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148#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
149#define CONFIG_SYS_MEMTEST_END 0x31FFFFFF /* 32 MB in DRAM */
531716e1 150
6d0f6bcf 151#define CONFIG_SYS_ALT_MEMTEST
f3108304 152#define CONFIG_SYS_LOAD_ADDR 0x30800000
1cb8e980 153
f3108304 154/* we configure PWM Timer 4 to 1ms 1000Hz */
1cb8e980 155
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156/* support additional compression methods */
157#define CONFIG_BZIP2
158#define CONFIG_LZO
159#define CONFIG_LZMA
a2663ea4 160
f3108304 161/* Ident */
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162/*#define VERSION_TAG "released"*/
163#define VERSION_TAG "unstable"
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164#define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \
165 "MEV-10080-001 " VERSION_TAG
48b42616 166
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167/* Physical Memory Map */
168#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
169#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
170#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
1cb8e980 171
6d754843 172#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
1cb8e980 173
f3108304 174/* FLASH and environment organization */
1cb8e980 175
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176#define CONFIG_SYS_FLASH_CFI
177#define CONFIG_FLASH_CFI_DRIVER
178#define CONFIG_FLASH_CFI_LEGACY
179#define CONFIG_SYS_FLASH_LEGACY_512Kx16
180#define CONFIG_FLASH_SHOW_PROGRESS 45
6d0f6bcf 181#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
f3108304 182#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
6d754843 183#define CONFIG_SYS_MAX_FLASH_SECT (19)
1cb8e980 184
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185/*
186 * Size of malloc() pool
187 * BZIP2 / LZO / LZMA need a lot of RAM
188 */
189#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
190#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
191#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
1cb8e980 192
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193/* NAND configuration */
194#ifdef CONFIG_CMD_NAND
195#define CONFIG_NAND_S3C2410
196#define CONFIG_SYS_S3C2410_NAND_HWECC
197#define CONFIG_SYS_MAX_NAND_DEVICE 1
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198#define CONFIG_SYS_NAND_BASE 0x4E000000
199#define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
200#define CONFIG_S3C24XX_TACLS 1
201#define CONFIG_S3C24XX_TWRPH0 5
202#define CONFIG_S3C24XX_TWRPH1 3
203#endif
48b42616 204
f3108304 205#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
48b42616 206
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207/* File system */
208#define CONFIG_CMD_FAT
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209#define CONFIG_CMD_UBI
210#define CONFIG_CMD_UBIFS
211#define CONFIG_CMD_JFFS2
212#define CONFIG_YAFFS2
213#define CONFIG_RBTREE
214#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
215#define CONFIG_MTD_PARTITIONS
216#define CONFIG_CMD_MTDPARTS
217#define CONFIG_LZO
48b42616 218
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219#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
220#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
221 GENERATED_GBL_DATA_SIZE)
222
f3108304 223#define CONFIG_BOARD_EARLY_INIT_F
d2d94571 224
f3108304 225#endif /* __CONFIG_H */