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ba56f625 WD |
1 | /* |
2 | * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com> | |
3 | * | |
4 | * See file CREDITS for list of people who contributed to this | |
5 | * project. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License as | |
9 | * published by the Free Software Foundation; either version 2 of | |
10 | * the License, or (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
20 | * MA 02111-1307 USA | |
21 | */ | |
22 | ||
e0299076 | 23 | /* |
ba56f625 WD |
24 | * config for XPedite1000 from XES Inc. |
25 | * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com> | |
26 | * (C) Copyright 2003 Sandburst Corporation | |
0c8721a4 | 27 | * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony) |
e0299076 | 28 | */ |
ba56f625 WD |
29 | |
30 | #ifndef __CONFIG_H | |
31 | #define __CONFIG_H | |
32 | ||
e0299076 | 33 | /* High Level Configuration Options */ |
10c1b218 | 34 | #define CONFIG_XPEDITE1000 1 |
54381b79 | 35 | #define CONFIG_SYS_BOARD_NAME "XPedite1000" |
e0299076 | 36 | #define CONFIG_4xx 1 /* ... PPC4xx family */ |
ba56f625 | 37 | #define CONFIG_440 1 |
846b0dd2 | 38 | #define CONFIG_440GX 1 /* 440 GX */ |
3c74e32a | 39 | #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ |
ba56f625 WD |
40 | #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ |
41 | ||
4cdad5f4 PT |
42 | /* |
43 | * DDR config | |
44 | */ | |
45 | #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */ | |
46 | #define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */ | |
47 | #define CONFIG_VERY_BIG_RAM 1 | |
ba56f625 | 48 | |
e0299076 | 49 | /* |
ba56f625 WD |
50 | * Base addresses -- Note these are effective addresses where the |
51 | * actual resources get mapped (not physical addresses) | |
e0299076 | 52 | */ |
4cdad5f4 PT |
53 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
54 | #define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */ | |
55 | #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ | |
56 | #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ | |
57 | #define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */ | |
58 | #define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */ | |
59 | #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */ | |
e0299076 PT |
60 | #define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000) |
61 | #define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700) | |
ba56f625 | 62 | |
4cdad5f4 PT |
63 | /* |
64 | * Diagnostics | |
65 | */ | |
9b4ef1f5 | 66 | #define CONFIG_SYS_ALT_MEMTEST |
4cdad5f4 PT |
67 | #define CONFIG_SYS_MEMTEST_START 0x0400000 |
68 | #define CONFIG_SYS_MEMTEST_END 0x0C00000 | |
69 | ||
70 | /* POST support */ | |
71 | #define CONFIG_POST (CONFIG_SYS_POST_RTC | \ | |
72 | CONFIG_SYS_POST_I2C) | |
73 | ||
74 | /* | |
75 | * LED support | |
76 | */ | |
e0299076 PT |
77 | #define USR_LED0 0x00000080 |
78 | #define USR_LED1 0x00000100 | |
79 | #define USR_LED2 0x00000200 | |
80 | #define USR_LED3 0x00000400 | |
ba56f625 WD |
81 | |
82 | #ifndef __ASSEMBLY__ | |
83 | extern unsigned long in32(unsigned int); | |
84 | extern void out32(unsigned int, unsigned long); | |
85 | ||
6d0f6bcf JCPV |
86 | #define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0)) |
87 | #define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1)) | |
88 | #define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2)) | |
89 | #define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3)) | |
ba56f625 | 90 | |
6d0f6bcf JCPV |
91 | #define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0)) |
92 | #define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1)) | |
93 | #define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2)) | |
94 | #define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3)) | |
ba56f625 WD |
95 | #endif |
96 | ||
4cdad5f4 PT |
97 | /* |
98 | * Use internal SRAM for initial stack | |
99 | */ | |
e0299076 PT |
100 | #define CONFIG_SYS_TEMP_STACK_OCM 1 |
101 | #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE | |
102 | #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */ | |
103 | #define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ | |
104 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ | |
e0299076 PT |
105 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) |
106 | #define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) | |
107 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR | |
ba56f625 | 108 | |
9b4ef1f5 PT |
109 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */ |
110 | #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ | |
ba56f625 | 111 | |
4cdad5f4 PT |
112 | /* |
113 | * Serial Port | |
114 | */ | |
e0299076 PT |
115 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
116 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400} | |
9b4ef1f5 | 117 | #define CONFIG_BAUDRATE 115200 |
4cdad5f4 PT |
118 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
119 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ | |
ba56f625 | 120 | |
9b4ef1f5 PT |
121 | /* |
122 | * Use the HUSH parser | |
123 | */ | |
124 | #define CONFIG_SYS_HUSH_PARSER | |
125 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
126 | ||
e0299076 | 127 | /* |
4cdad5f4 | 128 | * NOR flash configuration |
e0299076 | 129 | */ |
42735815 PT |
130 | #define CONFIG_SYS_MAX_FLASH_BANKS 3 |
131 | #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 } | |
132 | #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */ | |
11ad309c PT |
133 | #define CONFIG_FLASH_CFI_DRIVER |
134 | #define CONFIG_SYS_FLASH_CFI | |
135 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE | |
42735815 | 136 | #define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */ |
e0299076 PT |
137 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
138 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ | |
139 | ||
4cdad5f4 PT |
140 | /* |
141 | * I2C | |
142 | */ | |
e0299076 | 143 | #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ |
d0b0dcaa | 144 | #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */ |
e0299076 | 145 | #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ |
6d0f6bcf | 146 | #define CONFIG_SYS_I2C_SLAVE 0x7f |
9b4ef1f5 | 147 | #define CONFIG_I2C_MULTI_BUS |
ba56f625 | 148 | |
4cdad5f4 PT |
149 | /* I2C EEPROM */ |
150 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 | |
e0299076 PT |
151 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
152 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 | |
153 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 | |
ba56f625 | 154 | |
4cdad5f4 PT |
155 | /* I2C RTC: STMicro M41T00 */ |
156 | #define CONFIG_RTC_M41T11 1 | |
157 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 | |
158 | #define CONFIG_SYS_M41T11_BASE_YEAR 2000 | |
159 | ||
160 | /* | |
161 | * PCI | |
162 | */ | |
163 | /* General PCI */ | |
164 | #define CONFIG_PCI /* include pci support */ | |
165 | #define CONFIG_PCI_PNP /* do pci plug-and-play */ | |
166 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ | |
167 | #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */ | |
168 | ||
169 | /* Board-specific PCI */ | |
170 | #define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */ | |
171 | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */ | |
172 | #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */ | |
173 | #define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */ | |
ba56f625 | 174 | |
4cdad5f4 PT |
175 | /* |
176 | * Networking options | |
177 | */ | |
96e21f86 | 178 | #define CONFIG_PPC4xx_EMAC |
6fb6af6d | 179 | #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ |
4cdad5f4 PT |
180 | #define CONFIG_NET_MULTI 1 |
181 | #define CONFIG_MII 1 /* MII PHY management */ | |
e0299076 PT |
182 | #define CONFIG_PHY_RESET 1 /* reset phy upon startup */ |
183 | #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */ | |
4cdad5f4 PT |
184 | #define CONFIG_ETHPRIME "ppc_4xx_eth2" |
185 | #define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */ | |
186 | #define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */ | |
e0299076 | 187 | #define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */ |
4cdad5f4 | 188 | #define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */ |
e0299076 | 189 | #define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */ |
a5562901 | 190 | |
e0299076 | 191 | /* BOOTP options */ |
a1aa0bb5 JL |
192 | #define CONFIG_BOOTP_BOOTFILESIZE |
193 | #define CONFIG_BOOTP_BOOTPATH | |
194 | #define CONFIG_BOOTP_GATEWAY | |
195 | #define CONFIG_BOOTP_HOSTNAME | |
196 | ||
a5562901 | 197 | /* |
4cdad5f4 | 198 | * Command configuration |
a5562901 JL |
199 | */ |
200 | #include <config_cmd_default.h> | |
201 | ||
c4ae1a02 | 202 | #define CONFIG_CMD_ASKENV |
a5562901 | 203 | #define CONFIG_CMD_DATE |
c4ae1a02 | 204 | #define CONFIG_CMD_DHCP |
a5562901 | 205 | #define CONFIG_CMD_EEPROM |
a5562901 | 206 | #define CONFIG_CMD_ELF |
c4ae1a02 PT |
207 | #define CONFIG_CMD_FLASH |
208 | #define CONFIG_CMD_I2C | |
209 | #define CONFIG_CMD_IRQ | |
210 | #define CONFIG_CMD_JFFS2 | |
a5562901 | 211 | #define CONFIG_CMD_MII |
c4ae1a02 PT |
212 | #define CONFIG_CMD_NET |
213 | #define CONFIG_CMD_PCI | |
214 | #define CONFIG_CMD_PING | |
4cdad5f4 | 215 | #define CONFIG_CMD_SAVEENV |
c4ae1a02 | 216 | #define CONFIG_CMD_SNTP |
a5562901 | 217 | |
ba56f625 WD |
218 | /* |
219 | * Miscellaneous configurable options | |
220 | */ | |
e0299076 | 221 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
4cdad5f4 | 222 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
e0299076 | 223 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
e0299076 | 224 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
6d0f6bcf | 225 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
e0299076 PT |
226 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
227 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
6d0f6bcf | 228 | #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ |
9b4ef1f5 PT |
229 | #define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */ |
230 | #define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */ | |
231 | #define CONFIG_PANIC_HANG /* do not reset board on panic */ | |
232 | #define CONFIG_PREBOOT /* enable preboot variable */ | |
233 | #define CONFIG_FIT 1 | |
234 | #define CONFIG_FIT_VERBOSE 1 | |
235 | #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ | |
236 | #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */ | |
e0299076 | 237 | |
ba56f625 WD |
238 | /* |
239 | * For booting Linux, the board info and command line data | |
240 | * have to be in the first 8 MB of memory, since this is | |
241 | * the maximum mapped by the Linux kernel during initialization. | |
242 | */ | |
6d0f6bcf | 243 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
ba56f625 WD |
244 | |
245 | /* | |
4cdad5f4 | 246 | * Boot Flags |
ba56f625 | 247 | */ |
e0299076 PT |
248 | #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
249 | #define BOOTFLAG_WARM 0x02 /* Software reboot */ | |
ba56f625 | 250 | |
4cdad5f4 PT |
251 | /* |
252 | * Environment Configuration | |
253 | */ | |
254 | #define CONFIG_ENV_IS_IN_FLASH 1 | |
255 | #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */ | |
256 | #define CONFIG_ENV_SIZE 0x8000 | |
257 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024)) | |
258 | ||
c4ae1a02 PT |
259 | /* |
260 | * Flash memory map: | |
261 | * fff80000 - ffffffff U-Boot (512 KB) | |
262 | * fff40000 - fff7ffff U-Boot Environment (256 KB) | |
263 | * fff00000 - fff3ffff FDT (256KB) | |
264 | * ffc00000 - ffefffff OS image (3MB) | |
265 | * ff000000 - ffbfffff OS Use/Filesystem (12MB) | |
266 | */ | |
267 | ||
268 | #define CONFIG_UBOOT_ENV_ADDR MK_STR(TEXT_BASE) | |
269 | #define CONFIG_FDT_ENV_ADDR MK_STR(0xfff00000) | |
270 | #define CONFIG_OS_ENV_ADDR MK_STR(0xffc00000) | |
271 | ||
272 | #define CONFIG_PROG_UBOOT \ | |
273 | "$download_cmd $loadaddr $ubootfile; " \ | |
274 | "if test $? -eq 0; then " \ | |
275 | "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \ | |
276 | "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \ | |
277 | "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \ | |
278 | "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \ | |
279 | "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \ | |
280 | "if test $? -ne 0; then " \ | |
281 | "echo PROGRAM FAILED; " \ | |
282 | "else; " \ | |
283 | "echo PROGRAM SUCCEEDED; " \ | |
284 | "fi; " \ | |
285 | "else; " \ | |
286 | "echo DOWNLOAD FAILED; " \ | |
287 | "fi;" | |
288 | ||
289 | #define CONFIG_BOOT_OS_NET \ | |
290 | "$download_cmd $osaddr $osfile; " \ | |
291 | "if test $? -eq 0; then " \ | |
292 | "if test -n $fdtaddr; then " \ | |
293 | "$download_cmd $fdtaddr $fdtfile; " \ | |
294 | "if test $? -eq 0; then " \ | |
295 | "bootm $osaddr - $fdtaddr; " \ | |
296 | "else; " \ | |
297 | "echo FDT DOWNLOAD FAILED; " \ | |
298 | "fi; " \ | |
299 | "else; " \ | |
300 | "bootm $osaddr; " \ | |
301 | "fi; " \ | |
302 | "else; " \ | |
303 | "echo OS DOWNLOAD FAILED; " \ | |
304 | "fi;" | |
305 | ||
306 | #define CONFIG_PROG_OS \ | |
307 | "$download_cmd $osaddr $osfile; " \ | |
308 | "if test $? -eq 0; then " \ | |
309 | "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \ | |
310 | "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \ | |
311 | "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \ | |
312 | "if test $? -ne 0; then " \ | |
313 | "echo OS PROGRAM FAILED; " \ | |
314 | "else; " \ | |
315 | "echo OS PROGRAM SUCCEEDED; " \ | |
316 | "fi; " \ | |
317 | "else; " \ | |
318 | "echo OS DOWNLOAD FAILED; " \ | |
319 | "fi;" | |
320 | ||
321 | #define CONFIG_PROG_FDT \ | |
322 | "$download_cmd $fdtaddr $fdtfile; " \ | |
323 | "if test $? -eq 0; then " \ | |
324 | "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \ | |
325 | "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \ | |
326 | "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \ | |
327 | "if test $? -ne 0; then " \ | |
328 | "echo FDT PROGRAM FAILED; " \ | |
329 | "else; " \ | |
330 | "echo FDT PROGRAM SUCCEEDED; " \ | |
331 | "fi; " \ | |
332 | "else; " \ | |
333 | "echo FDT DOWNLOAD FAILED; " \ | |
334 | "fi;" | |
335 | ||
336 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
337 | "autoload=yes\0" \ | |
338 | "download_cmd=tftp\0" \ | |
339 | "console_args=console=ttyS0,115200\0" \ | |
340 | "root_args=root=/dev/nfs rw\0" \ | |
341 | "misc_args=ip=on\0" \ | |
342 | "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \ | |
343 | "bootfile=/home/user/file\0" \ | |
344 | "osfile=/home/user/uImage-XPedite1000\0" \ | |
345 | "fdtfile=/home/user/xpedite1000.dtb\0" \ | |
346 | "ubootfile=/home/user/u-boot.bin\0" \ | |
347 | "fdtaddr=c00000\0" \ | |
348 | "osaddr=0x1000000\0" \ | |
349 | "loadaddr=0x1000000\0" \ | |
350 | "prog_uboot="CONFIG_PROG_UBOOT"\0" \ | |
351 | "prog_os="CONFIG_PROG_OS"\0" \ | |
352 | "prog_fdt="CONFIG_PROG_FDT"\0" \ | |
353 | "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \ | |
354 | "bootcmd_flash=run set_bootargs; " \ | |
355 | "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \ | |
356 | "bootcmd=run bootcmd_flash\0" | |
ba56f625 | 357 | #endif /* __CONFIG_H */ |