[people/ms/u-boot.git] / include / configs / actux3.h

/*
 * (C) Copyright 2007
 * Michael Schwingen, michael@schwingen.org
 *
 * Configuration settings for the AcTux-3 board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_IXP425			1
#define CONFIG_ACTUX3			1

#define	CONFIG_MACH_TYPE		1481

#define CONFIG_DISPLAY_CPUINFO		1
#define CONFIG_DISPLAY_BOARDINFO	1

#define CONFIG_IXP_SERIAL
#define CONFIG_SYS_IXP425_CONSOLE		IXP425_UART2
#define CONFIG_BAUDRATE			115200
#define CONFIG_BOOTDELAY		3
#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
#define CONFIG_BOARD_EARLY_INIT_F	1
#define CONFIG_SYS_LDSCRIPT	"board/actux3/u-boot.lds"

/***************************************************************
 * U-boot generic defines start here.
 ***************************************************************/
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 128*1024)

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* Command line configuration. */
#include <config_cmd_default.h>

#define CONFIG_CMD_ELF

#define CONFIG_BOOTCOMMAND		"run boot_flash"
/* enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG		1
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1
#define CONFIG_REVISION_TAG		1

#if defined(CONFIG_CMD_KGDB)
# define CONFIG_KGDB_BAUDRATE		230400
#endif

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE			256
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
/* max number of command args */
#define CONFIG_SYS_MAXARGS			16
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE

#define CONFIG_SYS_MEMTEST_START		0x00400000
#define CONFIG_SYS_MEMTEST_END			0x00800000

/* timer clock - 2* OSC_IN system clock */
#define CONFIG_IXP425_TIMER_CLK                 66666666

/* default load address */
#define CONFIG_SYS_LOAD_ADDR			0x00010000

/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, 57600, \
					  115200, 230400 }
#define CONFIG_SERIAL_RTS_ACTIVE	1

/* Expansion bus settings */
#define CONFIG_SYS_EXP_CS0			0xbd113442

/* SDRAM settings */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_1			0x00000000
#define CONFIG_SYS_SDRAM_BASE			0x00000000

/* 16MB SDRAM */
#define CONFIG_SYS_SDR_CONFIG			0x3A
#define PHYS_SDRAM_1_SIZE		0x01000000
#define CONFIG_SYS_SDRAM_REFRESH_CNT		0x81a
#define CONFIG_SYS_SDR_MODE_CONFIG		0x1
#define CONFIG_SYS_DRAM_SIZE			0x01000000

/* FLASH organization */
#define CONFIG_SYS_TEXT_BASE		0x50000000
#define CONFIG_SYS_MAX_FLASH_BANKS		1
/* max number of sectors on one chip */
#define CONFIG_SYS_MAX_FLASH_SECT		140
#define PHYS_FLASH_1			0x50000000
#define CONFIG_SYS_FLASH_BANKS_LIST		{ PHYS_FLASH_1 }

#define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_LEN			(256 << 10)
#define CONFIG_BOARD_SIZE_LIMIT			262144

/* Use common CFI driver */
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
/* no byte writes on IXP4xx */
#define CONFIG_SYS_FLASH_CFI_WIDTH		FLASH_CFI_16BIT

/* print 'E' for empty sector on flinfo */
#define CONFIG_SYS_FLASH_EMPTY_INFO

/* Ethernet */

/* include IXP4xx NPE support */
#define CONFIG_IXP4XX_NPE		1

/* NPE0 PHY address */
#define	CONFIG_PHY_ADDR			0x10
/* MII PHY management */
#define CONFIG_MII			1
/* fixed-speed switch without standard PHY registers on MII */
#define CONFIG_MII_NPE0_FIXEDLINK       1
#define CONFIG_MII_NPE0_SPEED           100
#define CONFIG_MII_NPE0_FULLDUPLEX      1

/* Number of ethernet rx buffers & descriptors */
#define CONFIG_SYS_RX_ETH_BUFFER		16
#define CONFIG_RESET_PHY_R		1
/* ethernet switch connected to MII port */
#define CONFIG_MII_ETHSWITCH		1

#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#undef  CONFIG_CMD_NFS

/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/* Cache Configuration */
#define CONFIG_SYS_CACHELINE_SIZE		32

/*
 * environment organization:
 * one flash sector, embedded in uboot area (bottom bootblock flash)
 */
#define	CONFIG_ENV_IS_IN_FLASH		1
#define CONFIG_ENV_SIZE			0x2000
#define CONFIG_ENV_ADDR			(PHYS_FLASH_1 + 0x4000)
#define CONFIG_SYS_USE_PPCENV			1

#define CONFIG_EXTRA_ENV_SETTINGS					\
	"npe_ucode=50040000\0"						\
	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
	"kerneladdr=50050000\0"						\
	"kernelfile=actux3/uImage\0"					\
	"rootfile=actux3/rootfs\0"					\
	"rootaddr=50170000\0"						\
	"loadaddr=10000\0"						\
	"updateboot_ser=mw.b 10000 ff 40000;"				\
	" loady ${loadaddr};"						\
	" run eraseboot writeboot\0"					\
	"updateboot_net=mw.b 10000 ff 40000;"				\
	" tftp ${loadaddr} actux3/u-boot.bin;"				\
	" run eraseboot writeboot\0"					\
	"eraseboot=protect off 50000000 50003fff;"			\
	" protect off 50006000 5003ffff;"				\
	" erase 50000000 50003fff;"					\
	" erase 50006000 5003ffff\0"					\
	"writeboot=cp.b 10000 50000000 4000;"				\
	" cp.b 16000 50006000 3a000\0"					\
	"updateucode=loady;"						\
	" era ${npe_ucode} +${filesize};"				\
	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"			\
	"updateroot=tftp ${loadaddr} ${rootfile};"			\
	" era ${rootaddr} +${filesize};"				\
	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0"			\
	"updatekern=tftp ${loadaddr} ${kernelfile};"			\
	" era ${kerneladdr} +${filesize};"				\
	" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"			\
	"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
	"addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"	\
	"boot_flash=run flashargs addtty addeth;"			\
	" bootm ${kerneladdr}\0"					\
	"boot_net=run netargs addtty addeth;"				\
	" tftpboot ${loadaddr} ${kernelfile};"				\
	" bootm\0"

/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_INIT_SP_ADDR						\
	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)

#endif /* __CONFIG_H */
Commit	Line	Data
bc24345e MS	1	/*
	2	* (C) Copyright 2007
	3	* Michael Schwingen, michael@schwingen.org
	4	*
	5	* Configuration settings for the AcTux-3 board.
	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
bc24345e MS	8	*/
	9
	10	#ifndef __CONFIG_H
	11	#define __CONFIG_H
	12
	13	#define CONFIG_IXP425 1
	14	#define CONFIG_ACTUX3 1
	15
8e807ec3 MV	16	#define CONFIG_MACH_TYPE 1481
8e807ec3 MV	17
bc24345e MS	18	#define CONFIG_DISPLAY_CPUINFO 1
	19	#define CONFIG_DISPLAY_BOARDINFO 1
	20
930590f3	21	#define CONFIG_IXP_SERIAL
6d0f6bcf	22	#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
bc24345e MS	23	#define CONFIG_BAUDRATE 115200
	24	#define CONFIG_BOOTDELAY 3
	25	#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
8b5ab4c1 MS	26	#define CONFIG_BOARD_EARLY_INIT_F 1
8b5ab4c1 MS	27	#define CONFIG_SYS_LDSCRIPT "board/actux3/u-boot.lds"
bc24345e MS	28
	29	/***************************************************************
	30	* U-boot generic defines start here.
	31	***************************************************************/
bc24345e	32	/* Size of malloc() pool */
6d0f6bcf	33	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
bc24345e MS	34
	35	/* allow to overwrite serial and ethaddr */
	36	#define CONFIG_ENV_OVERWRITE
	37
	38	/* Command line configuration. */
	39	#include <config_cmd_default.h>
	40
	41	#define CONFIG_CMD_ELF
	42
	43	#define CONFIG_BOOTCOMMAND "run boot_flash"
	44	/* enable passing of ATAGs */
	45	#define CONFIG_CMDLINE_TAG 1
	46	#define CONFIG_SETUP_MEMORY_TAGS 1
	47	#define CONFIG_INITRD_TAG 1
	48	#define CONFIG_REVISION_TAG 1
	49
	50	#if defined(CONFIG_CMD_KGDB)
	51	# define CONFIG_KGDB_BAUDRATE 230400
bc24345e MS	52	#endif
	53
	54	/* Miscellaneous configurable options */
6d0f6bcf	55	#define CONFIG_SYS_LONGHELP
bc24345e	56	/* Console I/O Buffer Size */
6d0f6bcf	57	#define CONFIG_SYS_CBSIZE 256
bc24345e	58	/* Print Buffer Size */
6d0f6bcf	59	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
bc24345e	60	/* max number of command args */
6d0f6bcf	61	#define CONFIG_SYS_MAXARGS 16
bc24345e	62	/* Boot Argument Buffer Size */
6d0f6bcf	63	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
bc24345e	64
6d0f6bcf JCPV	65	#define CONFIG_SYS_MEMTEST_START 0x00400000
6d0f6bcf JCPV	66	#define CONFIG_SYS_MEMTEST_END 0x00800000
bc24345e	67
8b5ab4c1 MS	68	/* timer clock - 2* OSC_IN system clock */
8b5ab4c1 MS	69	#define CONFIG_IXP425_TIMER_CLK 66666666
bc24345e MS	70
bc24345e MS	71	/* default load address */
6d0f6bcf	72	#define CONFIG_SYS_LOAD_ADDR 0x00010000
bc24345e MS	73
bc24345e MS	74	/* valid baudrates */
6d0f6bcf	75	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
bc24345e MS	76	115200, 230400 }
	77	#define CONFIG_SERIAL_RTS_ACTIVE 1
	78
bc24345e	79	/* Expansion bus settings */
6d0f6bcf	80	#define CONFIG_SYS_EXP_CS0 0xbd113442
bc24345e MS	81
	82	/* SDRAM settings */
	83	#define CONFIG_NR_DRAM_BANKS 1
	84	#define PHYS_SDRAM_1 0x00000000
8b5ab4c1	85	#define CONFIG_SYS_SDRAM_BASE 0x00000000
bc24345e MS	86
bc24345e MS	87	/* 16MB SDRAM */
6d0f6bcf	88	#define CONFIG_SYS_SDR_CONFIG 0x3A
bc24345e	89	#define PHYS_SDRAM_1_SIZE 0x01000000
6d0f6bcf JCPV	90	#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
	91	#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
	92	#define CONFIG_SYS_DRAM_SIZE 0x01000000
bc24345e MS	93
bc24345e MS	94	/* FLASH organization */
8b5ab4c1	95	#define CONFIG_SYS_TEXT_BASE 0x50000000
6d0f6bcf	96	#define CONFIG_SYS_MAX_FLASH_BANKS 1
bc24345e	97	/* max number of sectors on one chip */
6d0f6bcf	98	#define CONFIG_SYS_MAX_FLASH_SECT 140
bc24345e	99	#define PHYS_FLASH_1 0x50000000
6d0f6bcf	100	#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
bc24345e	101
6d0f6bcf JCPV	102	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
	103	#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
	104	#define CONFIG_SYS_MONITOR_LEN (256 << 10)
8b5ab4c1	105	#define CONFIG_BOARD_SIZE_LIMIT 262144
bc24345e MS	106
bc24345e MS	107	/* Use common CFI driver */
6d0f6bcf	108	#define CONFIG_SYS_FLASH_CFI
00b1883a	109	#define CONFIG_FLASH_CFI_DRIVER
bc24345e	110	/* no byte writes on IXP4xx */
6d0f6bcf	111	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
bc24345e MS	112
bc24345e MS	113	/* print 'E' for empty sector on flinfo */
6d0f6bcf	114	#define CONFIG_SYS_FLASH_EMPTY_INFO
bc24345e MS	115
	116	/* Ethernet */
	117
	118	/* include IXP4xx NPE support */
	119	#define CONFIG_IXP4XX_NPE 1
bc24345e	120
bc24345e MS	121	/* NPE0 PHY address */
	122	#define CONFIG_PHY_ADDR 0x10
	123	/* MII PHY management */
	124	#define CONFIG_MII 1
8b5ab4c1 MS	125	/* fixed-speed switch without standard PHY registers on MII */
	126	#define CONFIG_MII_NPE0_FIXEDLINK 1
	127	#define CONFIG_MII_NPE0_SPEED 100
	128	#define CONFIG_MII_NPE0_FULLDUPLEX 1
	129
bc24345e	130	/* Number of ethernet rx buffers & descriptors */
6d0f6bcf	131	#define CONFIG_SYS_RX_ETH_BUFFER 16
bc24345e MS	132	#define CONFIG_RESET_PHY_R 1
	133	/* ethernet switch connected to MII port */
	134	#define CONFIG_MII_ETHSWITCH 1
	135
	136	#define CONFIG_CMD_DHCP
	137	#define CONFIG_CMD_NET
	138	#define CONFIG_CMD_MII
	139	#define CONFIG_CMD_PING
	140	#undef CONFIG_CMD_NFS
	141
	142	/* BOOTP options */
	143	#define CONFIG_BOOTP_BOOTFILESIZE
	144	#define CONFIG_BOOTP_BOOTPATH
	145	#define CONFIG_BOOTP_GATEWAY
	146	#define CONFIG_BOOTP_HOSTNAME
	147
	148	/* Cache Configuration */
6d0f6bcf	149	#define CONFIG_SYS_CACHELINE_SIZE 32
bc24345e MS	150
	151	/*
	152	* environment organization:
	153	* one flash sector, embedded in uboot area (bottom bootblock flash)
	154	*/
5a1aceb0	155	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	156	#define CONFIG_ENV_SIZE 0x2000
0e8d1586 JCPV	157	#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
6d0f6bcf	158	#define CONFIG_SYS_USE_PPCENV 1
bc24345e MS	159
bc24345e MS	160	#define CONFIG_EXTRA_ENV_SETTINGS \
b4e2f89d	161	"npe_ucode=50040000\0" \
bc24345e MS	162	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
bc24345e MS	163	"kerneladdr=50050000\0" \
8b5ab4c1 MS	164	"kernelfile=actux3/uImage\0" \
8b5ab4c1 MS	165	"rootfile=actux3/rootfs\0" \
bc24345e MS	166	"rootaddr=50170000\0" \
	167	"loadaddr=10000\0" \
	168	"updateboot_ser=mw.b 10000 ff 40000;" \
	169	" loady ${loadaddr};" \
	170	" run eraseboot writeboot\0" \
	171	"updateboot_net=mw.b 10000 ff 40000;" \
8b5ab4c1	172	" tftp ${loadaddr} actux3/u-boot.bin;" \
bc24345e MS	173	" run eraseboot writeboot\0" \
	174	"eraseboot=protect off 50000000 50003fff;" \
	175	" protect off 50006000 5003ffff;" \
	176	" erase 50000000 50003fff;" \
	177	" erase 50006000 5003ffff\0" \
	178	"writeboot=cp.b 10000 50000000 4000;" \
	179	" cp.b 16000 50006000 3a000\0" \
8b5ab4c1 MS	180	"updateucode=loady;" \
	181	" era ${npe_ucode} +${filesize};" \
	182	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
bc24345e MS	183	"updateroot=tftp ${loadaddr} ${rootfile};" \
	184	" era ${rootaddr} +${filesize};" \
	185	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
	186	"updatekern=tftp ${loadaddr} ${kernelfile};" \
	187	" era ${kerneladdr} +${filesize};" \
	188	" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
	189	"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
	190	" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
	191	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
	192	" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
8b5ab4c1	193	"addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
bc24345e MS	194	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
	195	"boot_flash=run flashargs addtty addeth;" \
	196	" bootm ${kerneladdr}\0" \
	197	"boot_net=run netargs addtty addeth;" \
	198	" tftpboot ${loadaddr} ${kernelfile};" \
	199	" bootm\0"
	200
8b5ab4c1 MS	201	/* additions for new relocation code, must be added to all boards */
	202	#define CONFIG_SYS_INIT_SP_ADDR \
	203	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
	204
bc24345e	205	#endif /* __CONFIG_H */