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66a4344a MS |
1 | /* |
2 | * (C) Copyright 2007 | |
3 | * Michael Schwingen, michael@schwingen.org | |
4 | * | |
5 | * Configuration settings for the AcTux-4 board. | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #ifndef __CONFIG_H | |
27 | #define __CONFIG_H | |
28 | ||
29 | #define CONFIG_IXP425 1 | |
30 | #define CONFIG_ACTUX4 1 | |
31 | ||
32 | #define CONFIG_DISPLAY_CPUINFO 1 | |
33 | #define CONFIG_DISPLAY_BOARDINFO 1 | |
34 | ||
930590f3 | 35 | #define CONFIG_IXP_SERIAL |
6d0f6bcf | 36 | #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 |
66a4344a MS |
37 | #define CONFIG_BAUDRATE 115200 |
38 | #define CONFIG_BOOTDELAY 3 | |
39 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ | |
080b7643 | 40 | #define CONFIG_BOARD_EARLY_INIT_F 1 |
66a4344a MS |
41 | |
42 | /*************************************************************** | |
43 | * U-boot generic defines start here. | |
44 | ***************************************************************/ | |
66a4344a | 45 | /* Size of malloc() pool */ |
6d0f6bcf | 46 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
66a4344a MS |
47 | |
48 | /* allow to overwrite serial and ethaddr */ | |
49 | #define CONFIG_ENV_OVERWRITE | |
50 | ||
51 | /* Command line configuration */ | |
52 | #include <config_cmd_default.h> | |
53 | ||
54 | #define CONFIG_CMD_ELF | |
55 | ||
080b7643 MS |
56 | #define CONFIG_PCI |
57 | #ifdef CONFIG_PCI | |
58 | #define CONFIG_CMD_PCI | |
59 | #define CONFIG_PCI_PNP | |
60 | #define CONFIG_IXP_PCI | |
61 | #define CONFIG_PCI_SCAN_SHOW | |
62 | #define CONFIG_CMD_PCI_ENUM | |
63 | #endif | |
64 | ||
66a4344a MS |
65 | #define CONFIG_BOOTCOMMAND "run boot_flash" |
66 | /* enable passing of ATAGs */ | |
67 | #define CONFIG_CMDLINE_TAG 1 | |
68 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
69 | #define CONFIG_INITRD_TAG 1 | |
70 | ||
71 | #if defined(CONFIG_CMD_KGDB) | |
72 | # define CONFIG_KGDB_BAUDRATE 230400 | |
73 | /* which serial port to use */ | |
74 | # define CONFIG_KGDB_SER_INDEX 1 | |
75 | #endif | |
76 | ||
77 | /* Miscellaneous configurable options */ | |
6d0f6bcf JCPV |
78 | #define CONFIG_SYS_LONGHELP |
79 | #define CONFIG_SYS_PROMPT "=> " | |
66a4344a | 80 | /* Console I/O Buffer Size */ |
6d0f6bcf | 81 | #define CONFIG_SYS_CBSIZE 256 |
66a4344a | 82 | /* Print Buffer Size */ |
6d0f6bcf | 83 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
66a4344a | 84 | /* max number of command args */ |
6d0f6bcf | 85 | #define CONFIG_SYS_MAXARGS 16 |
66a4344a | 86 | /* Boot Argument Buffer Size */ |
6d0f6bcf | 87 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
66a4344a | 88 | |
6d0f6bcf JCPV |
89 | #define CONFIG_SYS_MEMTEST_START 0x00400000 |
90 | #define CONFIG_SYS_MEMTEST_END 0x00800000 | |
66a4344a | 91 | |
080b7643 MS |
92 | /* timer clock - 2* OSC_IN system clock */ |
93 | #define CONFIG_IXP425_TIMER_CLK 66000000 | |
94 | #define CONFIG_SYS_HZ 1000 | |
66a4344a MS |
95 | |
96 | /* default load address */ | |
6d0f6bcf | 97 | #define CONFIG_SYS_LOAD_ADDR 0x00010000 |
66a4344a MS |
98 | |
99 | /* valid baudrates */ | |
6d0f6bcf | 100 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
66a4344a MS |
101 | 115200, 230400 } |
102 | #define CONFIG_SERIAL_RTS_ACTIVE 1 | |
103 | ||
104 | /* | |
105 | * Stack sizes | |
106 | * The stack sizes are set up in start.S using the settings below | |
107 | */ | |
108 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ | |
66a4344a MS |
109 | |
110 | /* Expansion bus settings */ | |
6d0f6bcf | 111 | #define CONFIG_SYS_EXP_CS0 0xbd113003 |
66a4344a MS |
112 | |
113 | /* SDRAM settings */ | |
114 | #define CONFIG_NR_DRAM_BANKS 1 | |
115 | #define PHYS_SDRAM_1 0x00000000 | |
080b7643 | 116 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
66a4344a MS |
117 | |
118 | /* 32MB SDRAM */ | |
6d0f6bcf | 119 | #define CONFIG_SYS_SDR_CONFIG 0x18 |
66a4344a | 120 | #define PHYS_SDRAM_1_SIZE 0x02000000 |
6d0f6bcf JCPV |
121 | #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a |
122 | #define CONFIG_SYS_SDR_MODE_CONFIG 0x1 | |
123 | #define CONFIG_SYS_DRAM_SIZE 0x02000000 | |
66a4344a MS |
124 | |
125 | /* FLASH organization */ | |
080b7643 | 126 | #define CONFIG_SYS_TEXT_BASE 0x50000000 |
6d0f6bcf | 127 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 |
66a4344a | 128 | /* max # of sectors per chip */ |
6d0f6bcf | 129 | #define CONFIG_SYS_MAX_FLASH_SECT 70 |
66a4344a MS |
130 | #define PHYS_FLASH_1 0x50000000 |
131 | #define PHYS_FLASH_2 0x51000000 | |
6d0f6bcf | 132 | #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } |
66a4344a | 133 | |
6d0f6bcf JCPV |
134 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
135 | #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 | |
136 | #define CONFIG_SYS_MONITOR_LEN (252 << 10) | |
080b7643 | 137 | #define CONFIG_BOARD_SIZE_LIMIT 258048 |
66a4344a MS |
138 | |
139 | /* Use common CFI driver */ | |
6d0f6bcf | 140 | #define CONFIG_SYS_FLASH_CFI |
00b1883a | 141 | #define CONFIG_FLASH_CFI_DRIVER |
66a4344a MS |
142 | /* board provides its own flash_init code */ |
143 | #define CONFIG_FLASH_CFI_LEGACY 1 | |
144 | /* no byte writes on IXP4xx */ | |
6d0f6bcf | 145 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
66a4344a | 146 | /* SST 39VF020 etc. support */ |
6d0f6bcf | 147 | #define CONFIG_SYS_FLASH_LEGACY_256Kx8 1 |
66a4344a MS |
148 | |
149 | /* print 'E' for empty sector on flinfo */ | |
6d0f6bcf | 150 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
66a4344a MS |
151 | |
152 | /* Ethernet */ | |
153 | ||
154 | /* include IXP4xx NPE support */ | |
155 | #define CONFIG_IXP4XX_NPE 1 | |
66a4344a MS |
156 | |
157 | #define CONFIG_NET_MULTI 1 | |
158 | /* NPE0 PHY address */ | |
159 | #define CONFIG_PHY_ADDR 0x1C | |
160 | /* MII PHY management */ | |
161 | #define CONFIG_MII 1 | |
080b7643 | 162 | |
66a4344a | 163 | /* Number of ethernet rx buffers & descriptors */ |
6d0f6bcf | 164 | #define CONFIG_SYS_RX_ETH_BUFFER 16 |
66a4344a MS |
165 | |
166 | #define CONFIG_CMD_DHCP | |
167 | #define CONFIG_CMD_NET | |
168 | #define CONFIG_CMD_MII | |
169 | #define CONFIG_CMD_PING | |
170 | #undef CONFIG_CMD_NFS | |
171 | ||
172 | /* BOOTP options */ | |
173 | #define CONFIG_BOOTP_BOOTFILESIZE | |
174 | #define CONFIG_BOOTP_BOOTPATH | |
175 | #define CONFIG_BOOTP_GATEWAY | |
176 | #define CONFIG_BOOTP_HOSTNAME | |
177 | ||
178 | /* Cache Configuration */ | |
6d0f6bcf | 179 | #define CONFIG_SYS_CACHELINE_SIZE 32 |
66a4344a MS |
180 | |
181 | /* environment organization: one complete 4k flash sector */ | |
5a1aceb0 | 182 | #define CONFIG_ENV_IS_IN_FLASH 1 |
0e8d1586 JCPV |
183 | #define CONFIG_ENV_SIZE 0x1000 |
184 | #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000) | |
66a4344a MS |
185 | |
186 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
b4e2f89d | 187 | "npe_ucode=51000000\0" \ |
66a4344a MS |
188 | "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \ |
189 | "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \ | |
190 | "kerneladdr=51020000\0" \ | |
080b7643 MS |
191 | "kernelfile=actux4/uImage\0" \ |
192 | "rootfile=actux4/rootfs\0" \ | |
66a4344a MS |
193 | "rootaddr=51160000\0" \ |
194 | "loadaddr=10000\0" \ | |
195 | "updateboot_ser=mw.b 10000 ff 40000;" \ | |
196 | " loady ${loadaddr};" \ | |
197 | " run eraseboot writeboot\0" \ | |
198 | "updateboot_net=mw.b 10000 ff 40000;" \ | |
080b7643 | 199 | " tftp ${loadaddr} actux4/u-boot.bin;" \ |
66a4344a MS |
200 | " run eraseboot writeboot\0" \ |
201 | "eraseboot=protect off 50000000 5003efff;" \ | |
202 | " erase 50000000 +${filesize}\0" \ | |
203 | "writeboot=cp.b 10000 50000000 ${filesize}\0" \ | |
080b7643 MS |
204 | "updateucode=loady;" \ |
205 | " era ${npe_ucode} +${filesize};" \ | |
206 | " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ | |
66a4344a MS |
207 | "updateroot=tftp ${loadaddr} ${rootfile};" \ |
208 | " era ${rootaddr} +${filesize};" \ | |
209 | " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ | |
210 | "updatekern=tftp ${loadaddr} ${kernelfile};" \ | |
211 | " era ${kerneladdr} +${filesize};" \ | |
212 | " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ | |
213 | "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ | |
214 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ | |
215 | "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ | |
216 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ | |
217 | "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ | |
218 | "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ | |
219 | "boot_flash=run flashargs addtty addeth;" \ | |
220 | " bootm ${kerneladdr}\0" \ | |
221 | "boot_net=run netargs addtty addeth;" \ | |
222 | " tftpboot ${loadaddr} ${kernelfile};" \ | |
223 | " bootm\0" | |
224 | ||
080b7643 MS |
225 | /* additions for new relocation code, must be added to all boards */ |
226 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
227 | (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
228 | ||
66a4344a | 229 | #endif /* __CONFIG_H */ |