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66a4344a MS |
1 | /* |
2 | * (C) Copyright 2007 | |
3 | * Michael Schwingen, michael@schwingen.org | |
4 | * | |
5 | * Configuration settings for the AcTux-4 board. | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #ifndef __CONFIG_H | |
27 | #define __CONFIG_H | |
28 | ||
29 | #define CONFIG_IXP425 1 | |
30 | #define CONFIG_ACTUX4 1 | |
31 | ||
32 | #define CONFIG_DISPLAY_CPUINFO 1 | |
33 | #define CONFIG_DISPLAY_BOARDINFO 1 | |
34 | ||
930590f3 | 35 | #define CONFIG_IXP_SERIAL |
6d0f6bcf | 36 | #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 |
66a4344a MS |
37 | #define CONFIG_BAUDRATE 115200 |
38 | #define CONFIG_BOOTDELAY 3 | |
39 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ | |
40 | ||
41 | /*************************************************************** | |
42 | * U-boot generic defines start here. | |
43 | ***************************************************************/ | |
44 | #undef CONFIG_USE_IRQ | |
45 | ||
46 | /* Size of malloc() pool */ | |
6d0f6bcf | 47 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
66a4344a | 48 | /* size in bytes reserved for initial data */ |
6d0f6bcf | 49 | #define CONFIG_SYS_GBL_DATA_SIZE 128 |
66a4344a MS |
50 | |
51 | /* allow to overwrite serial and ethaddr */ | |
52 | #define CONFIG_ENV_OVERWRITE | |
53 | ||
54 | /* Command line configuration */ | |
55 | #include <config_cmd_default.h> | |
56 | ||
57 | #define CONFIG_CMD_ELF | |
58 | ||
59 | #define CONFIG_BOOTCOMMAND "run boot_flash" | |
60 | /* enable passing of ATAGs */ | |
61 | #define CONFIG_CMDLINE_TAG 1 | |
62 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
63 | #define CONFIG_INITRD_TAG 1 | |
64 | ||
65 | #if defined(CONFIG_CMD_KGDB) | |
66 | # define CONFIG_KGDB_BAUDRATE 230400 | |
67 | /* which serial port to use */ | |
68 | # define CONFIG_KGDB_SER_INDEX 1 | |
69 | #endif | |
70 | ||
71 | /* Miscellaneous configurable options */ | |
6d0f6bcf JCPV |
72 | #define CONFIG_SYS_LONGHELP |
73 | #define CONFIG_SYS_PROMPT "=> " | |
66a4344a | 74 | /* Console I/O Buffer Size */ |
6d0f6bcf | 75 | #define CONFIG_SYS_CBSIZE 256 |
66a4344a | 76 | /* Print Buffer Size */ |
6d0f6bcf | 77 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
66a4344a | 78 | /* max number of command args */ |
6d0f6bcf | 79 | #define CONFIG_SYS_MAXARGS 16 |
66a4344a | 80 | /* Boot Argument Buffer Size */ |
6d0f6bcf | 81 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
66a4344a | 82 | |
6d0f6bcf JCPV |
83 | #define CONFIG_SYS_MEMTEST_START 0x00400000 |
84 | #define CONFIG_SYS_MEMTEST_END 0x00800000 | |
66a4344a | 85 | |
66a4344a | 86 | /* spec says 66.666 MHz, but it appears to be 33 */ |
6d0f6bcf | 87 | #define CONFIG_SYS_HZ 3333333 |
66a4344a MS |
88 | |
89 | /* default load address */ | |
6d0f6bcf | 90 | #define CONFIG_SYS_LOAD_ADDR 0x00010000 |
66a4344a MS |
91 | |
92 | /* valid baudrates */ | |
6d0f6bcf | 93 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
66a4344a MS |
94 | 115200, 230400 } |
95 | #define CONFIG_SERIAL_RTS_ACTIVE 1 | |
96 | ||
97 | /* | |
98 | * Stack sizes | |
99 | * The stack sizes are set up in start.S using the settings below | |
100 | */ | |
101 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ | |
102 | #ifdef CONFIG_USE_IRQ | |
103 | # define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ | |
104 | # define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ | |
105 | #endif | |
106 | ||
107 | /* Expansion bus settings */ | |
6d0f6bcf | 108 | #define CONFIG_SYS_EXP_CS0 0xbd113003 |
66a4344a MS |
109 | |
110 | /* SDRAM settings */ | |
111 | #define CONFIG_NR_DRAM_BANKS 1 | |
112 | #define PHYS_SDRAM_1 0x00000000 | |
6d0f6bcf | 113 | #define CONFIG_SYS_DRAM_BASE 0x00000000 |
66a4344a MS |
114 | |
115 | /* 32MB SDRAM */ | |
6d0f6bcf | 116 | #define CONFIG_SYS_SDR_CONFIG 0x18 |
66a4344a | 117 | #define PHYS_SDRAM_1_SIZE 0x02000000 |
6d0f6bcf JCPV |
118 | #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a |
119 | #define CONFIG_SYS_SDR_MODE_CONFIG 0x1 | |
120 | #define CONFIG_SYS_DRAM_SIZE 0x02000000 | |
66a4344a MS |
121 | |
122 | /* FLASH organization */ | |
6d0f6bcf | 123 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 |
66a4344a | 124 | /* max # of sectors per chip */ |
6d0f6bcf | 125 | #define CONFIG_SYS_MAX_FLASH_SECT 70 |
66a4344a MS |
126 | #define PHYS_FLASH_1 0x50000000 |
127 | #define PHYS_FLASH_2 0x51000000 | |
6d0f6bcf | 128 | #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } |
66a4344a | 129 | |
6d0f6bcf JCPV |
130 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
131 | #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 | |
132 | #define CONFIG_SYS_MONITOR_LEN (252 << 10) | |
66a4344a MS |
133 | |
134 | /* Use common CFI driver */ | |
6d0f6bcf | 135 | #define CONFIG_SYS_FLASH_CFI |
00b1883a | 136 | #define CONFIG_FLASH_CFI_DRIVER |
66a4344a MS |
137 | /* board provides its own flash_init code */ |
138 | #define CONFIG_FLASH_CFI_LEGACY 1 | |
139 | /* no byte writes on IXP4xx */ | |
6d0f6bcf | 140 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
66a4344a | 141 | /* SST 39VF020 etc. support */ |
6d0f6bcf | 142 | #define CONFIG_SYS_FLASH_LEGACY_256Kx8 1 |
66a4344a MS |
143 | |
144 | /* print 'E' for empty sector on flinfo */ | |
6d0f6bcf | 145 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
66a4344a MS |
146 | |
147 | /* Ethernet */ | |
148 | ||
149 | /* include IXP4xx NPE support */ | |
150 | #define CONFIG_IXP4XX_NPE 1 | |
66a4344a MS |
151 | |
152 | #define CONFIG_NET_MULTI 1 | |
153 | /* NPE0 PHY address */ | |
154 | #define CONFIG_PHY_ADDR 0x1C | |
155 | /* MII PHY management */ | |
156 | #define CONFIG_MII 1 | |
157 | /* Number of ethernet rx buffers & descriptors */ | |
6d0f6bcf | 158 | #define CONFIG_SYS_RX_ETH_BUFFER 16 |
66a4344a MS |
159 | |
160 | #define CONFIG_CMD_DHCP | |
161 | #define CONFIG_CMD_NET | |
162 | #define CONFIG_CMD_MII | |
163 | #define CONFIG_CMD_PING | |
164 | #undef CONFIG_CMD_NFS | |
165 | ||
166 | /* BOOTP options */ | |
167 | #define CONFIG_BOOTP_BOOTFILESIZE | |
168 | #define CONFIG_BOOTP_BOOTPATH | |
169 | #define CONFIG_BOOTP_GATEWAY | |
170 | #define CONFIG_BOOTP_HOSTNAME | |
171 | ||
172 | /* Cache Configuration */ | |
6d0f6bcf | 173 | #define CONFIG_SYS_CACHELINE_SIZE 32 |
66a4344a MS |
174 | |
175 | /* environment organization: one complete 4k flash sector */ | |
5a1aceb0 | 176 | #define CONFIG_ENV_IS_IN_FLASH 1 |
0e8d1586 JCPV |
177 | #define CONFIG_ENV_SIZE 0x1000 |
178 | #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000) | |
66a4344a MS |
179 | |
180 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
b4e2f89d | 181 | "npe_ucode=51000000\0" \ |
66a4344a MS |
182 | "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \ |
183 | "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \ | |
184 | "kerneladdr=51020000\0" \ | |
185 | "rootaddr=51160000\0" \ | |
186 | "loadaddr=10000\0" \ | |
187 | "updateboot_ser=mw.b 10000 ff 40000;" \ | |
188 | " loady ${loadaddr};" \ | |
189 | " run eraseboot writeboot\0" \ | |
190 | "updateboot_net=mw.b 10000 ff 40000;" \ | |
191 | " tftp ${loadaddr} u-boot.bin;" \ | |
192 | " run eraseboot writeboot\0" \ | |
193 | "eraseboot=protect off 50000000 5003efff;" \ | |
194 | " erase 50000000 +${filesize}\0" \ | |
195 | "writeboot=cp.b 10000 50000000 ${filesize}\0" \ | |
196 | "eraseenv=protect off 5003f000 5003ffff;" \ | |
197 | " erase 5003f000 5003ffff\0" \ | |
198 | "updateroot=tftp ${loadaddr} ${rootfile};" \ | |
199 | " era ${rootaddr} +${filesize};" \ | |
200 | " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ | |
201 | "updatekern=tftp ${loadaddr} ${kernelfile};" \ | |
202 | " era ${kerneladdr} +${filesize};" \ | |
203 | " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ | |
204 | "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ | |
205 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ | |
206 | "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ | |
207 | " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ | |
208 | "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ | |
209 | "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ | |
210 | "boot_flash=run flashargs addtty addeth;" \ | |
211 | " bootm ${kerneladdr}\0" \ | |
212 | "boot_net=run netargs addtty addeth;" \ | |
213 | " tftpboot ${loadaddr} ${kernelfile};" \ | |
214 | " bootm\0" | |
215 | ||
216 | #endif /* __CONFIG_H */ |