[thirdparty/u-boot.git] / include / configs / am43xx_evm.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * am43xx_evm.h
 *
 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
 */

#ifndef __CONFIG_AM43XX_EVM_H
#define __CONFIG_AM43XX_EVM_H

#define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 21)	/* 2GB */
#define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */

#include <asm/arch/omap.h>

/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_CLK		48000000
#if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
#define CONFIG_SYS_NS16550_REG_SIZE    (-4)
#define CONFIG_SYS_NS16550_SERIAL
#endif

/* I2C Configuration */
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2

/* Power */
#ifndef CONFIG_DM_I2C
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#endif
#define CONFIG_POWER_TPS65218
#define CONFIG_POWER_TPS62362

/* SPL defines. */
#define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_SDRAM_BASE + \
					 (128 << 20))

/* Enabling L2 Cache */
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_PL310_BASE	0x48242000

/*
 * Since SPL did pll and ddr initialization for us,
 * we don't need to do it twice.
 */
#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT)
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif

/*
 * When building U-Boot such that there is no previous loader
 * we need to call board_early_init_f.  This is taken care of in
 * s_init when we have SPL used.
 */

/* Now bring in the rest of the common code. */
#include <configs/ti_armv7_omap.h>

/* Clock Defines */
#define V_OSCK				24000000  /* Clock output from T2 */
#define V_SCLK				(V_OSCK)

/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */

/* SPL USB Support */

#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION		1
#define CONFIG_USB_XHCI_OMAP

#define CONFIG_AM437X_USB2PHY2_HOST
#endif

#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USB_ETHER)
#undef CONFIG_USB_DWC3_PHY_OMAP
#undef CONFIG_USB_DWC3_OMAP
#undef CONFIG_USB_DWC3
#undef CONFIG_USB_DWC3_GADGET

#undef CONFIG_USB_GADGET_DOWNLOAD
#undef CONFIG_USB_GADGET_VBUS_DRAW
#undef CONFIG_USB_GADGET_MANUFACTURER
#undef CONFIG_USB_GADGET_VENDOR_NUM
#undef CONFIG_USB_GADGET_PRODUCT_NUM
#undef CONFIG_USB_GADGET_DUALSPEED
#endif

/*
 * Disable MMC DM for SPL build and can be re-enabled after adding
 * DM support in SPL
 */
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_TIMER
#endif

#ifndef CONFIG_SPL_BUILD
/* USB Device Firmware Update support */
#define DFUARGS \
	"dfu_bufsiz=0x10000\0" \
	DFU_ALT_INFO_MMC \
	DFU_ALT_INFO_EMMC \
	DFU_ALT_INFO_RAM \
	DFU_ALT_INFO_QSPI_XIP
#else
#define DFUARGS
#endif

#ifndef CONFIG_SPL_BUILD
#include <environment/ti/dfu.h>
#include <environment/ti/mmc.h>

#define CONFIG_EXTRA_ENV_SETTINGS \
	DEFAULT_LINUX_BOOT_ENV \
	DEFAULT_MMC_TI_ARGS \
	DEFAULT_FIT_TI_ARGS \
	"fdtfile=undefined\0" \
	"bootpart=0:2\0" \
	"bootdir=/boot\0" \
	"bootfile=zImage\0" \
	"console=ttyO0,115200n8\0" \
	"partitions=" \
		"uuid_disk=${uuid_gpt_disk};" \
		"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
	"optargs=\0" \
	"usbroot=/dev/sda2 rw\0" \
	"usbrootfstype=ext4 rootwait\0" \
	"usbdev=0\0" \
	"ramroot=/dev/ram0 rw\0" \
	"ramrootfstype=ext2\0" \
	"usbargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${usbroot} " \
		"rootfstype=${usbrootfstype}\0" \
	"ramargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${ramroot} " \
		"rootfstype=${ramrootfstype}\0" \
	"loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \
	"usbboot=" \
		"setenv devnum ${usbdev}; " \
		"setenv devtype usb; " \
		"usb start ${usbdev}; " \
		"if usb dev ${usbdev}; then " \
			"if run loadbootenv; then " \
				"echo Loaded environment from ${bootenv};" \
				"run importbootenv;" \
			"fi;" \
			"if test -n $uenvcmd; then " \
				"echo Running uenvcmd ...;" \
				"run uenvcmd;" \
			"fi;" \
			"if run loadimage; then " \
				"run loadfdt; " \
				"echo Booting from usb ${usbdev}...; " \
				"run usbargs;" \
				"bootz ${loadaddr} - ${fdtaddr}; " \
			"fi;" \
		"fi\0" \
		"fi;" \
		"usb stop ${usbdev};\0" \
	"findfdt="\
		"if test $board_name = AM43EPOS; then " \
			"setenv fdtfile am43x-epos-evm.dtb; fi; " \
		"if test $board_name = AM43__GP; then " \
			"setenv fdtfile am437x-gp-evm.dtb; fi; " \
		"if test $board_name = AM43XXHS; then " \
			"setenv fdtfile am437x-gp-evm.dtb; fi; " \
		"if test $board_name = AM43__SK; then " \
			"setenv fdtfile am437x-sk-evm.dtb; fi; " \
		"if test $board_name = AM43_IDK; then " \
			"setenv fdtfile am437x-idk-evm.dtb; fi; " \
		"if test $fdtfile = undefined; then " \
			"echo WARNING: Could not determine device tree; fi; \0" \
	NANDARGS \
	NETARGS \
	DFUARGS \

#define CONFIG_BOOTCOMMAND \
	"if test ${boot_fit} -eq 1; then "	\
		"run update_to_fit;"	\
	"fi;"	\
	"run findfdt; " \
	"run envboot;" \
	"run mmcboot;" \
	"run usbboot;" \
	NANDBOOT \

#endif

#ifndef CONFIG_SPL_BUILD
/* CPSW Ethernet */
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT		10
#endif

#define PHY_ANEG_TIMEOUT	8000 /* PHY needs longer aneg time at 1G */

#define CONFIG_SYS_RX_ETH_BUFFER	64

/* NAND support */
#ifdef CONFIG_NAND
/* NAND: device related configs */
#define CONFIG_SYS_NAND_PAGE_SIZE	4096
#define CONFIG_SYS_NAND_OOBSIZE		224
#define CONFIG_SYS_NAND_BLOCK_SIZE	(256*1024)
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
					 CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
/* NAND: driver related configs */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH16_CODE_HW
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS	{ 2, 3, 4, 5, 6, 7, 8, 9, \
				10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
				20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
				30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
				40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
				50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
				60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
				70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
				80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
				90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
			100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
			110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
			120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
			130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
			140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
			150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
			160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
			170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
			180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
			190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
			200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
			}
#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	26
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x00180000
/* NAND: SPL related configs */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00300000 /* kernel offset */
#endif
#define NANDARGS \
	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
	"nandargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype}\0" \
	"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \
	"nandrootfstype=ubifs rootwait=1\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"nand read ${fdtaddr} NAND.u-boot-spl-os; " \
		"nand read ${loadaddr} NAND.kernel; " \
		"bootz ${loadaddr} - ${fdtaddr}\0"
#define NANDBOOT			"run nandboot; "
#else /* !CONFIG_NAND */
#define NANDARGS
#define NANDBOOT
#endif /* CONFIG_NAND */

#if defined(CONFIG_TI_SECURE_DEVICE)
/* Avoid relocating onto firewalled area at end of DRAM */
#define CONFIG_PRAM (64 * 1024)
#endif /* CONFIG_TI_SECURE_DEVICE */

#endif	/* __CONFIG_AM43XX_EVM_H */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
8d0afcd7 LV	2	/*
	3	* am43xx_evm.h
	4	*
	5	* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
8d0afcd7 LV	6	*/
	7
	8	#ifndef __CONFIG_AM43XX_EVM_H
	9	#define __CONFIG_AM43XX_EVM_H
	10
42da5adf	11	#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */
8d0afcd7	12	#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
369cbe1e LV	13
369cbe1e LV	14	#include <asm/arch/omap.h>
8d0afcd7 LV	15
8d0afcd7 LV	16	/* NS16550 Configuration */
c7b9686d	17	#define CONFIG_SYS_NS16550_CLK 48000000
19c1c700 LV	18	#if !defined(CONFIG_SPL_DM) \|\| !defined(CONFIG_DM_SERIAL)
19c1c700 LV	19	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
8d0afcd7	20	#define CONFIG_SYS_NS16550_SERIAL
2a429d23	21	#endif
8d0afcd7	22
9f1a8cd3	23	/* I2C Configuration */
9f1a8cd3 SN	24	#define CONFIG_ENV_EEPROM_IS_ON_I2C
	25	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
	26	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
9f1a8cd3	27
83bad102	28	/* Power */
1514244c	29	#ifndef CONFIG_DM_I2C
7aa5598a TR	30	#define CONFIG_POWER
7aa5598a TR	31	#define CONFIG_POWER_I2C
1514244c	32	#endif
83bad102	33	#define CONFIG_POWER_TPS65218
403d70ab	34	#define CONFIG_POWER_TPS62362
83bad102	35
369cbe1e	36	/* SPL defines. */
d3289aac TR	37	#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
d3289aac TR	38	(128 << 20))
8d0afcd7	39
573b020e LV	40	/* Enabling L2 Cache */
	41	#define CONFIG_SYS_L2_PL310
	42	#define CONFIG_SYS_PL310_BASE 0x48242000
573b020e	43
8d0afcd7	44	/*
369cbe1e LV	45	* Since SPL did pll and ddr initialization for us,
369cbe1e LV	46	* we don't need to do it twice.
8d0afcd7	47	*/
7a5f71bc	48	#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT)
8d0afcd7 LV	49	#define CONFIG_SKIP_LOWLEVEL_INIT
	50	#endif
	51
196311dc TR	52	/*
	53	* When building U-Boot such that there is no previous loader
	54	* we need to call board_early_init_f. This is taken care of in
	55	* s_init when we have SPL used.
	56	*/
196311dc	57
369cbe1e	58	/* Now bring in the rest of the common code. */
9a0f4004	59	#include <configs/ti_armv7_omap.h>
8d0afcd7	60
369cbe1e LV	61	/* Clock Defines */
	62	#define V_OSCK 24000000 /* Clock output from T2 */
	63	#define V_SCLK (V_OSCK)
8d0afcd7	64
369cbe1e LV	65	/* NS16550 Configuration */
	66	#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
	67
2b36fe57	68	/* SPL USB Support */
2b36fe57	69
592bc5e2 M	70	#if defined(CONFIG_SPL_USB_HOST_SUPPORT) \|\| !defined(CONFIG_SPL_BUILD)
592bc5e2 M	71	#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
3d799c7f	72	#define CONFIG_USB_XHCI_OMAP
3d799c7f	73
3d799c7f	74	#define CONFIG_AM437X_USB2PHY2_HOST
aee119bd	75	#endif
3d799c7f	76
b432b1eb	77	#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USB_ETHER)
b142729d	78	#undef CONFIG_USB_DWC3_PHY_OMAP
c16bf621	79	#undef CONFIG_USB_DWC3_OMAP
3457bbaf	80	#undef CONFIG_USB_DWC3
65403f30	81	#undef CONFIG_USB_DWC3_GADGET
3457bbaf	82
aaa4a9e3	83	#undef CONFIG_USB_GADGET_DOWNLOAD
a59a77f8	84	#undef CONFIG_USB_GADGET_VBUS_DRAW
a95aee6a MR	85	#undef CONFIG_USB_GADGET_MANUFACTURER
	86	#undef CONFIG_USB_GADGET_VENDOR_NUM
	87	#undef CONFIG_USB_GADGET_PRODUCT_NUM
3457bbaf	88	#undef CONFIG_USB_GADGET_DUALSPEED
a59a77f8 SP	89	#endif
a59a77f8 SP	90
8aff39e3 M	91	/*
	92	* Disable MMC DM for SPL build and can be re-enabled after adding
	93	* DM support in SPL
	94	*/
	95	#ifdef CONFIG_SPL_BUILD
1ce32ba7	96	#undef CONFIG_TIMER
8aff39e3 M	97	#endif
8aff39e3 M	98
a69e2c22 KVA	99	#ifndef CONFIG_SPL_BUILD
a69e2c22 KVA	100	/* USB Device Firmware Update support */
a69e2c22 KVA	101	#define DFUARGS \
	102	"dfu_bufsiz=0x10000\0" \
	103	DFU_ALT_INFO_MMC \
	104	DFU_ALT_INFO_EMMC \
42d1b818	105	DFU_ALT_INFO_RAM \
f843770a	106	DFU_ALT_INFO_QSPI_XIP
a69e2c22 KVA	107	#else
	108	#define DFUARGS
	109	#endif
	110
1564dba7	111	#ifndef CONFIG_SPL_BUILD
88fdfcd2 SN	112	#include <environment/ti/dfu.h>
	113	#include <environment/ti/mmc.h>
	114
1564dba7	115	#define CONFIG_EXTRA_ENV_SETTINGS \
fb3ad9bd	116	DEFAULT_LINUX_BOOT_ENV \
85d17be3	117	DEFAULT_MMC_TI_ARGS \
1e93cc84	118	DEFAULT_FIT_TI_ARGS \
1564dba7 LV	119	"fdtfile=undefined\0" \
	120	"bootpart=0:2\0" \
	121	"bootdir=/boot\0" \
	122	"bootfile=zImage\0" \
	123	"console=ttyO0,115200n8\0" \
0f1b0443 TR	124	"partitions=" \
	125	"uuid_disk=${uuid_gpt_disk};" \
	126	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
1564dba7	127	"optargs=\0" \
2b36fe57 DM	128	"usbroot=/dev/sda2 rw\0" \
	129	"usbrootfstype=ext4 rootwait\0" \
	130	"usbdev=0\0" \
bea0fd5e	131	"ramroot=/dev/ram0 rw\0" \
1564dba7	132	"ramrootfstype=ext2\0" \
2b36fe57 DM	133	"usbargs=setenv bootargs console=${console} " \
	134	"${optargs} " \
	135	"root=${usbroot} " \
	136	"rootfstype=${usbrootfstype}\0" \
1564dba7 LV	137	"ramargs=setenv bootargs console=${console} " \
	138	"${optargs} " \
	139	"root=${ramroot} " \
	140	"rootfstype=${ramrootfstype}\0" \
2b36fe57	141	"loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \
2b36fe57 DM	142	"usbboot=" \
	143	"setenv devnum ${usbdev}; " \
	144	"setenv devtype usb; " \
	145	"usb start ${usbdev}; " \
	146	"if usb dev ${usbdev}; then " \
	147	"if run loadbootenv; then " \
	148	"echo Loaded environment from ${bootenv};" \
	149	"run importbootenv;" \
	150	"fi;" \
	151	"if test -n $uenvcmd; then " \
	152	"echo Running uenvcmd ...;" \
	153	"run uenvcmd;" \
	154	"fi;" \
	155	"if run loadimage; then " \
	156	"run loadfdt; " \
	157	"echo Booting from usb ${usbdev}...; " \
	158	"run usbargs;" \
	159	"bootz ${loadaddr} - ${fdtaddr}; " \
	160	"fi;" \
	161	"fi\0" \
bf0385d7 KVA	162	"fi;" \
bf0385d7 KVA	163	"usb stop ${usbdev};\0" \
1564dba7 LV	164	"findfdt="\
	165	"if test $board_name = AM43EPOS; then " \
	166	"setenv fdtfile am43x-epos-evm.dtb; fi; " \
	167	"if test $board_name = AM43__GP; then " \
	168	"setenv fdtfile am437x-gp-evm.dtb; fi; " \
a5051b72 MS	169	"if test $board_name = AM43XXHS; then " \
a5051b72 MS	170	"setenv fdtfile am437x-gp-evm.dtb; fi; " \
9cb9f333 FB	171	"if test $board_name = AM43__SK; then " \
9cb9f333 FB	172	"setenv fdtfile am437x-sk-evm.dtb; fi; " \
403d70ab FB	173	"if test $board_name = AM43_IDK; then " \
403d70ab FB	174	"setenv fdtfile am437x-idk-evm.dtb; fi; " \
1564dba7	175	"if test $fdtfile = undefined; then " \
a69e2c22	176	"echo WARNING: Could not determine device tree; fi; \0" \
0ad5eaa4	177	NANDARGS \
2320866b	178	NETARGS \
a69e2c22	179	DFUARGS \
1564dba7 LV	180
1564dba7 LV	181	#define CONFIG_BOOTCOMMAND \
1e93cc84 LV	182	"if test ${boot_fit} -eq 1; then " \
	183	"run update_to_fit;" \
	184	"fi;" \
1564dba7	185	"run findfdt; " \
18c534bb	186	"run envboot;" \
2b36fe57	187	"run mmcboot;" \
0ad5eaa4 TR	188	"run usbboot;" \
0ad5eaa4 TR	189	NANDBOOT \
1564dba7	190
3a3939bf M	191	#endif
3a3939bf M	192
f4787eab	193	#ifndef CONFIG_SPL_BUILD
4cdd7fda	194	/* CPSW Ethernet */
4cdd7fda	195	#define CONFIG_BOOTP_DEFAULT
4cdd7fda M	196	#define CONFIG_BOOTP_DNS2
4cdd7fda M	197	#define CONFIG_BOOTP_SEND_HOSTNAME
4cdd7fda	198	#define CONFIG_NET_RETRY_COUNT 10
f4787eab M	199	#endif
f4787eab M	200
d9da26ec	201	#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
3a3939bf	202
4cdd7fda	203	#define CONFIG_SYS_RX_ETH_BUFFER 64
4cdd7fda	204
e53ad4b4	205	/* NAND support */
	206	#ifdef CONFIG_NAND
	207	/* NAND: device related configs */
	208	#define CONFIG_SYS_NAND_PAGE_SIZE 4096
	209	#define CONFIG_SYS_NAND_OOBSIZE 224
	210	#define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024)
	211	#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
	212	CONFIG_SYS_NAND_PAGE_SIZE)
	213	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	214	/* NAND: driver related configs */
e53ad4b4	215	#define CONFIG_SYS_NAND_ONFI_DETECTION
	216	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW
	217	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	218	#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
	219	10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
	220	20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
	221	30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
	222	40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
	223	50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
	224	60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
	225	70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
	226	80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
	227	90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
	228	100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
	229	110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
	230	120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
	231	130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
	232	140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
	233	150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
	234	160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
	235	170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
	236	180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
	237	190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
	238	200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
	239	}
	240	#define CONFIG_SYS_NAND_ECCSIZE 512
	241	#define CONFIG_SYS_NAND_ECCBYTES 26
e53ad4b4	242	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000
e53ad4b4	243	/* NAND: SPL related configs */
e53ad4b4	244	/* NAND: SPL falcon mode configs */
e53ad4b4	245	#ifdef CONFIG_SPL_OS_BOOT
e53ad4b4	246	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */
e53ad4b4	247	#endif
0ad5eaa4	248	#define NANDARGS \
43ede0bc TR	249	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
43ede0bc TR	250	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
0ad5eaa4 TR	251	"nandargs=setenv bootargs console=${console} " \
	252	"${optargs} " \
	253	"root=${nandroot} " \
	254	"rootfstype=${nandrootfstype}\0" \
	255	"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \
	256	"nandrootfstype=ubifs rootwait=1\0" \
	257	"nandboot=echo Booting from nand ...; " \
	258	"run nandargs; " \
	259	"nand read ${fdtaddr} NAND.u-boot-spl-os; " \
	260	"nand read ${loadaddr} NAND.kernel; " \
	261	"bootz ${loadaddr} - ${fdtaddr}\0"
	262	#define NANDBOOT "run nandboot; "
	263	#else /* !CONFIG_NAND */
	264	#define NANDARGS
	265	#define NANDBOOT
	266	#endif /* CONFIG_NAND */
e53ad4b4	267
373358f2 AD	268	#if defined(CONFIG_TI_SECURE_DEVICE)
	269	/* Avoid relocating onto firewalled area at end of DRAM */
	270	#define CONFIG_PRAM (64 * 1024)
	271	#endif /* CONFIG_TI_SECURE_DEVICE */
	272
8d0afcd7	273	#endif /* __CONFIG_AM43XX_EVM_H */