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1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * Copyright 2020 Toradex | |
4 | */ | |
5 | ||
6 | #ifndef __APALIS_IMX8X_H | |
7 | #define __APALIS_IMX8X_H | |
8 | ||
9 | #include <asm/arch/imx-regs.h> | |
10 | #include <linux/sizes.h> | |
11 | #include <linux/stringify.h> | |
12 | ||
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13 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
14 | #define USDHC1_BASE_ADDR 0x5b010000 | |
15 | #define USDHC2_BASE_ADDR 0x5b020000 | |
a51fdba3 | 16 | |
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17 | #define CONFIG_IPADDR 192.168.10.2 |
18 | #define CONFIG_NETMASK 255.255.255.0 | |
19 | #define CONFIG_SERVERIP 192.168.10.1 | |
20 | ||
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21 | #define MEM_LAYOUT_ENV_SETTINGS \ |
22 | "kernel_addr_r=0x80280000\0" \ | |
23 | "fdt_addr_r=0x83100000\0" \ | |
24 | "ramdisk_addr_r=0x8a000000\0" \ | |
25 | "scriptaddr=0x83200000\0" | |
26 | ||
27 | #ifdef CONFIG_AHAB_BOOT | |
28 | #define AHAB_ENV "sec_boot=yes\0" | |
29 | #else | |
30 | #define AHAB_ENV "sec_boot=no\0" | |
31 | #endif | |
32 | ||
33 | /* Boot M4 */ | |
34 | #define M4_BOOT_ENV \ | |
35 | "m4_0_image=m4_0.bin\0" \ | |
36 | "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ | |
37 | "${m4_0_image}\0" \ | |
38 | "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ | |
39 | ||
40 | #define MFG_NAND_PARTITION "" | |
41 | ||
42 | #define BOOT_TARGET_DEVICES(func) \ | |
43 | func(MMC, mmc, 1) \ | |
44 | func(MMC, mmc, 0) \ | |
45 | func(DHCP, dhcp, na) | |
46 | #include <config_distro_bootcmd.h> | |
47 | #undef BOOTENV_RUN_NET_USB_START | |
48 | #define BOOTENV_RUN_NET_USB_START "" | |
49 | ||
50 | #define CONFIG_MFG_ENV_SETTINGS \ | |
51 | "mfgtool_args=setenv bootargs ${consoleargs} " \ | |
52 | "rdinit=/linuxrc g_mass_storage.stall=0 " \ | |
53 | "g_mass_storage.removable=1 g_mass_storage.idVendor=0x066F " \ | |
54 | "g_mass_storage.idProduct=0x37FF " \ | |
55 | "g_mass_storage.iSerialNumber=\"\" " MFG_NAND_PARTITION \ | |
56 | "${vidargs} clk_ignore_unused\0" \ | |
57 | "initrd_addr=0x83800000\0" \ | |
58 | "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} " \ | |
59 | "${fdt_addr};\0" \ | |
60 | ||
61 | /* Initial environment variables */ | |
62 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
63 | AHAB_ENV \ | |
64 | BOOTENV \ | |
65 | CONFIG_MFG_ENV_SETTINGS \ | |
66 | M4_BOOT_ENV \ | |
67 | MEM_LAYOUT_ENV_SETTINGS \ | |
68 | "boot_file=Image\0" \ | |
69 | "consoleargs=console=ttyLP3,${baudrate} earlycon\0" \ | |
70 | "fdt_file=imx8qxp-apalis-eval.dtb\0" \ | |
71 | "fdtfile=imx8qxp-apalis-eval.dtb\0" \ | |
72 | "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ | |
73 | "image=Image\0" \ | |
74 | "initrd_addr=0x83800000\0" \ | |
75 | "mmcargs=setenv bootargs ${consoleargs} " \ | |
76 | "root=PARTUUID=${uuid} rootwait " \ | |
77 | "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ | |
de35b8f9 | 78 | "mmcpart=1\0" \ |
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79 | "netargs=setenv bootargs ${consoleargs} " \ |
80 | "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \ | |
81 | "${vidargs}\0" \ | |
82 | "nfsboot=run netargs; dhcp ${loadaddr} ${image}; tftp ${fdt_addr} " \ | |
83 | "apalis-imx8x/${fdt_file}; booti ${loadaddr} - " \ | |
84 | "${fdt_addr}\0" \ | |
85 | "panel=NULL\0" \ | |
86 | "script=boot.scr\0" \ | |
87 | "update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \ | |
88 | "if test \"$confirm\" = \"y\"; then " \ | |
89 | "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \ | |
90 | "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \ | |
91 | "${blkcnt}; fi\0" \ | |
92 | "vidargs=video=imxdpufb5:off video=imxdpufb6:off video=imxdpufb7:off\0" | |
93 | ||
94 | /* Link Definitions */ | |
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95 | |
96 | #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 | |
97 | ||
98 | /* Environment in eMMC, before config block at the end of 1st "boot sector" */ | |
99 | ||
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100 | /* On Apalis iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ |
101 | #define CONFIG_SYS_FSL_USDHC_NUM 2 | |
102 | ||
103 | #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */ | |
104 | ||
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105 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
106 | #define PHYS_SDRAM_1 0x80000000 | |
107 | #define PHYS_SDRAM_2 0x880000000 | |
108 | #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ | |
109 | #define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ | |
110 | ||
111 | /* Monitor Command Prompt */ | |
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112 | #define CONFIG_SYS_CBSIZE SZ_2K |
113 | #define CONFIG_SYS_MAXARGS 64 | |
114 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
115 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
116 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
117 | ||
118 | /* Generic Timer Definitions */ | |
119 | #define COUNTER_FREQUENCY 8000000 /* 8MHz */ | |
120 | ||
121 | /* Networking */ | |
122 | #define CONFIG_FEC_ENET_DEV 0 | |
123 | #define IMX_FEC_BASE 0x5b040000 | |
124 | #define CONFIG_FEC_MXC_PHYADDR 0x4 | |
a51fdba3 | 125 | #define CONFIG_FEC_XCV_TYPE RGMII |
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126 | #define PHY_ANEG_TIMEOUT 20000 |
127 | ||
128 | #endif /* __APALIS_IMX8X_H */ |