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1a31ca4a HS |
1 | /* |
2 | * Configuation settings for the bonito board | |
3 | * | |
4 | * Copyright (C) 2012 Renesas Solutions Corp. | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
1a31ca4a HS |
7 | */ |
8 | ||
9 | #ifndef __ARMADILLO_800EVA_H | |
10 | #define __ARMADILLO_800EVA_H | |
11 | ||
12 | #undef DEBUG | |
1a31ca4a | 13 | #define CONFIG_R8A7740 |
1cc95f6e | 14 | #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Armadillo-800EVA Board\n" |
1a31ca4a HS |
15 | #define CONFIG_SH_GPIO_PFC |
16 | ||
17 | #include <asm/arch/rmobile.h> | |
18 | ||
1a31ca4a | 19 | #define CONFIG_CMD_SDRAM |
09a3be08 | 20 | |
1a31ca4a HS |
21 | #define BOARD_LATE_INIT |
22 | ||
1a31ca4a HS |
23 | #define CONFIG_BOOTARGS "" |
24 | ||
1a31ca4a HS |
25 | #undef CONFIG_SHOW_BOOT_PROGRESS |
26 | ||
27 | #define CONFIG_ARCH_CPU_INIT | |
1a31ca4a HS |
28 | #define CONFIG_TMU_TIMER |
29 | #define CONFIG_SYS_DCACHE_OFF | |
30 | ||
31 | /* STACK */ | |
32 | #define CONFIG_SYS_INIT_SP_ADDR 0xE8083000 | |
33 | #define STACK_AREA_SIZE 0xC000 | |
34 | #define LOW_LEVEL_MERAM_STACK \ | |
35 | (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) | |
36 | ||
37 | /* MEMORY */ | |
38 | #define ARMADILLO_800EVA_SDRAM_BASE 0x40000000 | |
39 | #define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024) | |
40 | ||
41 | #define CONFIG_SYS_LONGHELP | |
1a31ca4a HS |
42 | #define CONFIG_SYS_CBSIZE 256 |
43 | #define CONFIG_SYS_PBSIZE 256 | |
44 | #define CONFIG_SYS_MAXARGS 16 | |
45 | #define CONFIG_SYS_BARGSIZE 512 | |
46 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } | |
47 | ||
48 | /* SCIF */ | |
49 | #define CONFIG_SCIF_CONSOLE | |
50 | #define CONFIG_CONS_SCIF1 | |
51 | #define SCIF0_BASE 0xe6c40000 | |
52 | #define SCIF1_BASE 0xe6c50000 | |
53 | #define SCIF2_BASE 0xe6c60000 | |
54 | #define SCIF4_BASE 0xe6c80000 | |
55 | #define CONFIG_SCIF_A | |
1a31ca4a HS |
56 | |
57 | #define CONFIG_SYS_MEMTEST_START (ARMADILLO_800EVA_SDRAM_BASE) | |
58 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ | |
59 | 504 * 1024 * 1024) | |
60 | #undef CONFIG_SYS_ALT_MEMTEST | |
61 | #undef CONFIG_SYS_MEMTEST_SCRATCH | |
62 | #undef CONFIG_SYS_LOADS_BAUD_CHANGE | |
63 | ||
64 | #define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE) | |
65 | #define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE) | |
66 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ | |
67 | 64 * 1024 * 1024) | |
68 | #define CONFIG_NR_DRAM_BANKS 1 | |
69 | ||
70 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
71 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) | |
72 | #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) | |
1a31ca4a HS |
73 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
74 | #define CONFIG_SYS_TEXT_BASE 0xE80C0000 | |
75 | ||
76 | /* FLASH */ | |
1a31ca4a HS |
77 | #define CONFIG_SYS_FLASH_CFI |
78 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT | |
79 | #define CONFIG_SYS_FLASH_BASE 0x00000000 | |
80 | #define CONFIG_SYS_MAX_FLASH_SECT 512 | |
81 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
82 | #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } | |
83 | ||
84 | #define CONFIG_SYS_FLASH_ERASE_TOUT 3000 | |
85 | #define CONFIG_SYS_FLASH_WRITE_TOUT 3000 | |
86 | #define CONFIG_SYS_FLASH_LOCK_TOUT 3000 | |
87 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000 | |
88 | ||
89 | /* ENV setting */ | |
90 | #define CONFIG_ENV_IS_IN_FLASH | |
91 | #define CONFIG_ENV_OVERWRITE 1 | |
92 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
93 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ | |
94 | CONFIG_SYS_MONITOR_LEN) | |
95 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) | |
96 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) | |
97 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) | |
98 | ||
99 | /* SH Ether */ | |
1a31ca4a HS |
100 | #define CONFIG_SH_ETHER |
101 | #define CONFIG_SH_ETHER_USE_PORT 0 | |
102 | #define CONFIG_SH_ETHER_PHY_ADDR 0x0 | |
103 | #define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000 | |
104 | #define CONFIG_SH_ETHER_SH7734_MII (0x01) | |
105 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII | |
106 | #define CONFIG_PHYLIB | |
107 | #define CONFIG_PHY_SMSC | |
108 | #define CONFIG_BITBANGMII | |
109 | #define CONFIG_BITBANGMII_MULTI | |
110 | ||
111 | /* Board Clock */ | |
112 | #define CONFIG_SYS_CLK_FREQ 50000000 | |
717ceb63 NI |
113 | #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ |
114 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ | |
1a31ca4a | 115 | #define CONFIG_SYS_TMU_CLK_DIV 4 |
1a31ca4a HS |
116 | |
117 | #endif /* __ARMADILLO_800EVA_H */ |