[people/ms/u-boot.git] / include / configs / astro_mcf5373l.h

/*
 * Configuration settings for the Sentec Cobra Board.
 *
 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * configuration for ASTRO "Urmel" board.
 * Originating from Cobra5272 configuration, messed up by
 * Wolfgang Wegner <w.wegner@astro-kom.de>
 * Please do not bother the original author with bug reports
 * concerning this file.
 */

#ifndef _CONFIG_ASTRO_MCF5373L_H
#define _CONFIG_ASTRO_MCF5373L_H

#include <linux/stringify.h>

/*
 * set the card type to actually compile for; either of
 * the possibilities listed below has to be used!
 */
#define CONFIG_ASTRO_V532	1

#if CONFIG_ASTRO_V532
#define ASTRO_ID	0xF8
#elif CONFIG_ASTRO_V512
#define ASTRO_ID	0xFA
#elif CONFIG_ASTRO_TWIN7S2
#define ASTRO_ID	0xF9
#elif CONFIG_ASTRO_V912
#define ASTRO_ID	0xFC
#elif CONFIG_ASTRO_COFDMDUOS2
#define ASTRO_ID	0xFB
#else
#error No card type defined!
#endif

/*
 * Define processor
 * possible values for Urmel board: only Coldfire M5373 processor supported
 * (please do not change)
 */

/* it seems not clear yet which processor defines we should use */
#define CONFIG_MCF537x			/* define processor family */
#define CONFIG_MCF532x			/* define processor family */
#define CONFIG_M5373			/* define processor type */
#define CONFIG_ASTRO5373L		/* define board type */

/* Command line configuration */
#include <config_cmd_default.h>

/*
 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
 * a different bootloader that has already performed RAM setup) or
 * started directly from flash, which is the regular case for production
 * boards.
 */
#ifdef CONFIG_RAM
#define CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_SYS_TEXT_BASE		0x40020000
#define ENABLE_JFFS	0
#else
#define CONFIG_SYS_TEXT_BASE		0x00000000
#define ENABLE_JFFS	1
#endif

/* Define which commmands should be available at u-boot command prompt */

#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DATE
#define CONFIG_CMD_ELF
#define CONFIG_CMD_FLASH
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_XIMG
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#if ENABLE_JFFS
#define CONFIG_CMD_JFFS2
#endif
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_FPGA
#define CONFIG_CMDLINE_EDITING

#define CONFIG_SYS_HUSH_PARSER

#define CONFIG_MCFRTC
#undef RTC_DEBUG

/* Timer */
#define CONFIG_MCFTMR
#undef CONFIG_MCFPIT

/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SPEED	80000
#define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET	0x58000
#define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR

/*
 * Defines processor clock - important for correct timings concerning serial
 * interface etc.
 * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
 */

#define CONFIG_SYS_HZ			1000
#define CONFIG_SYS_CLK			80000000
#define CONFIG_SYS_CPU_CLK		(CONFIG_SYS_CLK * 3)
#define CONFIG_SYS_SDRAM_SIZE		32		/* SDRAM size in MB */

#define CONFIG_SYS_CORE_SRAM_SIZE	0x8000
#define CONFIG_SYS_CORE_SRAM		0x80000000

#define CONFIG_SYS_UNIFY_CACHE

/*
 * Define baudrate for UART1 (console output, tftp, ...)
 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
 * in u-boot command interface
 */

#define CONFIG_BAUDRATE		115200

#define CONFIG_MCFUART
#define CONFIG_SYS_UART_PORT		(2)
#define CONFIG_SYS_UART2_ALT3_GPIO

/*
 * Watchdog configuration; Watchdog is disabled for running from RAM
 * and set to highest possible value else. Beware there is no check
 * in the watchdog code to validate the timeout value set here!
 */

#ifndef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 3355	/* timeout in milliseconds */
#endif

/*
 * Configuration for environment
 * Environment is located in the last sector of the flash
 */

#ifndef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_ENV_OFFSET		0x1FF8000
#define CONFIG_ENV_SECT_SIZE		0x8000
#define CONFIG_ENV_IS_IN_FLASH		1
#else
/*
 * environment in RAM - This is used to use a single PC-based application
 * to load an image, load U-Boot, load an environment and then start U-Boot
 * to execute the commands from the environment. Feedback is done via setting
 * and reading memory locations.
 */
#define CONFIG_ENV_ADDR		0x40060000
#define CONFIG_ENV_SECT_SIZE	0x8000
#define CONFIG_ENV_IS_IN_FLASH	1
#endif

/* here we put our FPGA configuration... */
#define CONFIG_MISC_INIT_R	1

/* Define user parameters that have to be customized most likely */

/* AUTOBOOT settings - booting images automatically by u-boot after power on */

/*
 * used for autoboot, delay in seconds u-boot will wait before starting
 * defined (auto-)boot command, setting to -1 disables delay, setting to
 * 0 will too prevent access to u-boot command interface: u-boot then has
 * to be reflashed
 * beware - watchdog is not serviced during autoboot delay time!
 */
#ifdef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_BOOTDELAY	1
#else
#define CONFIG_BOOTDELAY	1
#endif

/*
 * The following settings will be contained in the environment block ; if you
 * want to use a neutral environment all those settings can be manually set in
 * u-boot: 'set' command
 */

#define CONFIG_EXTRA_ENV_SETTINGS			\
	"loaderversion=11\0"				\
	"card_id="__stringify(ASTRO_ID)"\0"			\
	"alterafile=0\0"				\
	"xilinxfile=0\0"				\
	"xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
		"fpga load 0 0x41000000 $filesize\0" \
	"alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
		"fpga load 1 0x41000000 $filesize\0" \
	"env_default=1\0"				\
	"env_check=if test $env_default -eq 1;"\
		" then setenv env_default 0;saveenv;fi\0"

/*
 * "update" is a non-standard command that has to be supplied
 * by external update.c; This is not included in mainline because
 * it needs non-blocking CFI routines.
 */
#ifdef CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_BOOTCOMMAND	""	/* no autoboot in this case */
#else
#if CONFIG_ASTRO_V532
#define CONFIG_BOOTCOMMAND	"protect off 0x80000 0x1ffffff;run env_check;"\
				"run xilinxload&&run alteraload&&bootm 0x80000;"\
				"update;reset"
#else
#define CONFIG_BOOTCOMMAND	"protect off 0x80000 0x1ffffff;run env_check;"\
				"run xilinxload&&bootm 0x80000;update;reset"
#endif
#endif

/* default bootargs that are considered during boot */
#define CONFIG_BOOTARGS		" console=ttyS2,115200 rootfstype=romfs"\
				" loaderversion=$loaderversion"

#define CONFIG_SYS_PROMPT	"URMEL > "

/* default RAM address for user programs */
#define CONFIG_SYS_LOAD_ADDR	0x20000

#define CONFIG_SYS_LONGHELP

#if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE		1024
#else
#define CONFIG_SYS_CBSIZE		256
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

#define CONFIG_FPGA_COUNT	1
#define CONFIG_FPGA
#define	CONFIG_FPGA_XILINX
#define	CONFIG_FPGA_SPARTAN3
#define CONFIG_FPGA_ALTERA
#define CONFIG_FPGA_CYCLON2
#define CONFIG_SYS_FPGA_PROG_FEEDBACK
#define CONFIG_SYS_FPGA_WAIT		1000

/* End of user parameters to be customized */

/* Defines memory range for test */

#define CONFIG_SYS_MEMTEST_START	0x40020000
#define CONFIG_SYS_MEMTEST_END		0x41ffffff

/*
 * Low Level Configuration Settings
 * (address mappings, register initial values, etc.)
 * You should know what you are doing if you make changes here.
 */

/* Base register address */

#define CONFIG_SYS_MBAR		0xFC000000	/* Register Base Addrs */

/* System Conf. Reg. & System Protection Reg. */

#define CONFIG_SYS_SCR		0x0003;
#define CONFIG_SYS_SPR		0xffff;

/*
 * Definitions for initial stack pointer and data area (in internal SRAM)
 */
#define CONFIG_SYS_INIT_RAM_ADDR	0x80000000
#define CONFIG_SYS_INIT_RAM_SIZE		0x8000
#define CONFIG_SYS_INIT_RAM_CTRL	0x221
#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
					 GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET

/*
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
 */
#define CONFIG_SYS_SDRAM_BASE		0x40000000

/*
 * Chipselect bank definitions
 *
 * CS0 - Flash 32MB (first 16MB)
 * CS1 - Flash 32MB (second half)
 * CS2 - FPGA
 * CS3 - FPGA
 * CS4 - unused
 * CS5 - unused
 */
#define CONFIG_SYS_CS0_BASE		0
#define CONFIG_SYS_CS0_MASK		0x00ff0001
#define CONFIG_SYS_CS0_CTRL		0x00001fc0

#define CONFIG_SYS_CS1_BASE		0x01000000
#define CONFIG_SYS_CS1_MASK		0x00ff0001
#define CONFIG_SYS_CS1_CTRL		0x00001fc0

#define CONFIG_SYS_CS2_BASE		0x20000000
#define CONFIG_SYS_CS2_MASK		0x00ff0001
#define CONFIG_SYS_CS2_CTRL		0x0000fec0

#define CONFIG_SYS_CS3_BASE		0x21000000
#define CONFIG_SYS_CS3_MASK		0x00ff0001
#define CONFIG_SYS_CS3_CTRL		0x0000fec0

#define CONFIG_SYS_FLASH_BASE		0x00000000

#ifdef	CONFIG_MONITOR_IS_IN_RAM
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
#else
/* This is mainly used during relocation in start.S */
#define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
#endif
/* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MONITOR_LEN		(256 << 10)

#define CONFIG_SYS_BOOTPARAMS_LEN	(64 * 1024)
/* Reserve 128 kB for malloc() */
#define CONFIG_SYS_MALLOC_LEN		(128 << 10)

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization ??
 */
#define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_BASE + \
						(CONFIG_SYS_SDRAM_SIZE << 20))

/* FLASH organization */
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_MAX_FLASH_SECT	259
#define CONFIG_SYS_FLASH_ERASE_TOUT	1000

#define CONFIG_SYS_FLASH_CFI		1
#define CONFIG_FLASH_CFI_DRIVER		1
#define CONFIG_SYS_FLASH_SIZE		0x2000000
#define CONFIG_SYS_FLASH_PROTECTION	1
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
#define CONFIG_SYS_FLASH_CFI_NONBLOCK	1

#if ENABLE_JFFS
/* JFFS Partition offset set */
#define CONFIG_SYS_JFFS2_FIRST_BANK    0
#define CONFIG_SYS_JFFS2_NUM_BANKS     1
/* 512k reserved for u-boot */
#define CONFIG_SYS_JFFS2_FIRST_SECTOR  0x40
#endif

/* Cache Configuration */
#define CONFIG_SYS_CACHELINE_SIZE	16

#define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - 8)
#define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - 4)
#define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINVA)
#define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
					 CF_ACR_EN | CF_ACR_SM_ALL)
#define CONFIG_SYS_CACHE_ICACR		(CF_CACR_EC | CF_CACR_CINVA | \
					 CF_CACR_DCM_P)

#endif	/* _CONFIG_ASTRO_MCF5373L_H */
Commit	Line	Data
9d79e575 WW	1	/*
	2	* Configuration settings for the Sentec Cobra Board.
	3	*
	4	* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
	5	*
	6	* See file CREDITS for list of people who contributed to this
	7	* project.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	22	* MA 02111-1307 USA
	23	*/
	24
	25	/*
	26	* configuration for ASTRO "Urmel" board.
	27	* Originating from Cobra5272 configuration, messed up by
	28	* Wolfgang Wegner <w.wegner@astro-kom.de>
	29	* Please do not bother the original author with bug reports
	30	* concerning this file.
	31	*/
	32
	33	#ifndef _CONFIG_ASTRO_MCF5373L_H
	34	#define _CONFIG_ASTRO_MCF5373L_H
	35
51926d5e MV	36	#include <linux/stringify.h>
51926d5e MV	37
9d79e575 WW	38	/*
	39	* set the card type to actually compile for; either of
	40	* the possibilities listed below has to be used!
	41	*/
	42	#define CONFIG_ASTRO_V532 1
	43
	44	#if CONFIG_ASTRO_V532
	45	#define ASTRO_ID 0xF8
	46	#elif CONFIG_ASTRO_V512
	47	#define ASTRO_ID 0xFA
	48	#elif CONFIG_ASTRO_TWIN7S2
	49	#define ASTRO_ID 0xF9
	50	#elif CONFIG_ASTRO_V912
	51	#define ASTRO_ID 0xFC
	52	#elif CONFIG_ASTRO_COFDMDUOS2
	53	#define ASTRO_ID 0xFB
	54	#else
	55	#error No card type defined!
	56	#endif
	57
	58	/*
	59	* Define processor
	60	* possible values for Urmel board: only Coldfire M5373 processor supported
	61	* (please do not change)
	62	*/
	63
	64	/* it seems not clear yet which processor defines we should use */
	65	#define CONFIG_MCF537x /* define processor family */
	66	#define CONFIG_MCF532x /* define processor family */
	67	#define CONFIG_M5373 /* define processor type */
	68	#define CONFIG_ASTRO5373L /* define board type */
	69
	70	/* Command line configuration */
	71	#include <config_cmd_default.h>
	72
	73	/*
d24f2d32	74	* CONFIG_RAM defines if u-boot is loaded via BDM (or started from
9d79e575 WW	75	* a different bootloader that has already performed RAM setup) or
	76	* started directly from flash, which is the regular case for production
	77	* boards.
	78	*/
d24f2d32	79	#ifdef CONFIG_RAM
9d79e575	80	#define CONFIG_MONITOR_IS_IN_RAM
14d0a02a	81	#define CONFIG_SYS_TEXT_BASE 0x40020000
9d79e575 WW	82	#define ENABLE_JFFS 0
9d79e575 WW	83	#else
14d0a02a	84	#define CONFIG_SYS_TEXT_BASE 0x00000000
9d79e575 WW	85	#define ENABLE_JFFS 1
	86	#endif
	87
	88	/* Define which commmands should be available at u-boot command prompt */
	89
	90	#define CONFIG_CMD_CACHE
	91	#define CONFIG_CMD_DATE
	92	#define CONFIG_CMD_ELF
	93	#define CONFIG_CMD_FLASH
	94	#define CONFIG_CMD_I2C
	95	#define CONFIG_CMD_MEMORY
	96	#define CONFIG_CMD_MISC
	97	#define CONFIG_CMD_XIMG
	98	#undef CONFIG_CMD_NET
	99	#undef CONFIG_CMD_NFS
	100	#if ENABLE_JFFS
	101	#define CONFIG_CMD_JFFS2
	102	#endif
	103	#define CONFIG_CMD_REGINFO
	104	#define CONFIG_CMD_LOADS
	105	#define CONFIG_CMD_LOADB
	106	#define CONFIG_CMD_FPGA
	107	#define CONFIG_CMDLINE_EDITING
	108
	109	#define CONFIG_SYS_HUSH_PARSER
9d79e575 WW	110
	111	#define CONFIG_MCFRTC
	112	#undef RTC_DEBUG
	113
	114	/* Timer */
	115	#define CONFIG_MCFTMR
	116	#undef CONFIG_MCFPIT
	117
	118	/* I2C */
00f792e0 HS	119	#define CONFIG_SYS_I2C
	120	#define CONFIG_SYS_I2C_FSL
	121	#define CONFIG_SYS_FSL_I2C_SPEED 80000
	122	#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
	123	#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
9d79e575 WW	124	#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
	125
	126	/*
	127	* Defines processor clock - important for correct timings concerning serial
	128	* interface etc.
	129	* CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms
	130	*/
	131
	132	#define CONFIG_SYS_HZ 1000
	133	#define CONFIG_SYS_CLK 80000000
	134	#define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
	135	#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
	136
	137	#define CONFIG_SYS_CORE_SRAM_SIZE 0x8000
	138	#define CONFIG_SYS_CORE_SRAM 0x80000000
	139
	140	#define CONFIG_SYS_UNIFY_CACHE
	141
	142	/*
	143	* Define baudrate for UART1 (console output, tftp, ...)
	144	* default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
	145	* CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
	146	* in u-boot command interface
	147	*/
	148
	149	#define CONFIG_BAUDRATE 115200
9d79e575 WW	150
	151	#define CONFIG_MCFUART
	152	#define CONFIG_SYS_UART_PORT (2)
	153	#define CONFIG_SYS_UART2_ALT3_GPIO
	154
	155	/*
	156	* Watchdog configuration; Watchdog is disabled for running from RAM
	157	* and set to highest possible value else. Beware there is no check
	158	* in the watchdog code to validate the timeout value set here!
	159	*/
	160
	161	#ifndef CONFIG_MONITOR_IS_IN_RAM
	162	#define CONFIG_WATCHDOG
	163	#define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */
	164	#endif
	165
	166	/*
	167	* Configuration for environment
	168	* Environment is located in the last sector of the flash
	169	*/
	170
	171	#ifndef CONFIG_MONITOR_IS_IN_RAM
	172	#define CONFIG_ENV_OFFSET 0x1FF8000
	173	#define CONFIG_ENV_SECT_SIZE 0x8000
	174	#define CONFIG_ENV_IS_IN_FLASH 1
	175	#else
	176	/*
	177	* environment in RAM - This is used to use a single PC-based application
	178	* to load an image, load U-Boot, load an environment and then start U-Boot
	179	* to execute the commands from the environment. Feedback is done via setting
	180	* and reading memory locations.
	181	*/
	182	#define CONFIG_ENV_ADDR 0x40060000
	183	#define CONFIG_ENV_SECT_SIZE 0x8000
	184	#define CONFIG_ENV_IS_IN_FLASH 1
	185	#endif
	186
	187	/* here we put our FPGA configuration... */
	188	#define CONFIG_MISC_INIT_R 1
	189
	190	/* Define user parameters that have to be customized most likely */
	191
	192	/* AUTOBOOT settings - booting images automatically by u-boot after power on */
	193
	194	/*
	195	* used for autoboot, delay in seconds u-boot will wait before starting
	196	* defined (auto-)boot command, setting to -1 disables delay, setting to
	197	* 0 will too prevent access to u-boot command interface: u-boot then has
	198	* to be reflashed
	199	* beware - watchdog is not serviced during autoboot delay time!
	200	*/
	201	#ifdef CONFIG_MONITOR_IS_IN_RAM
	202	#define CONFIG_BOOTDELAY 1
	203	#else
	204	#define CONFIG_BOOTDELAY 1
	205	#endif
	206
	207	/*
	208	* The following settings will be contained in the environment block ; if you
	209	* want to use a neutral environment all those settings can be manually set in
	210	* u-boot: 'set' command
	211	*/
	212
9d79e575 WW	213	#define CONFIG_EXTRA_ENV_SETTINGS \
9d79e575 WW	214	"loaderversion=11\0" \
51926d5e	215	"card_id="__stringify(ASTRO_ID)"\0" \
9d79e575 WW	216	"alterafile=0\0" \
	217	"xilinxfile=0\0" \
	218	"xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
	219	"fpga load 0 0x41000000 $filesize\0" \
	220	"alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
	221	"fpga load 1 0x41000000 $filesize\0" \
	222	"env_default=1\0" \
	223	"env_check=if test $env_default -eq 1;"\
	224	" then setenv env_default 0;saveenv;fi\0"
	225
	226	/*
	227	* "update" is a non-standard command that has to be supplied
	228	* by external update.c; This is not included in mainline because
	229	* it needs non-blocking CFI routines.
	230	*/
	231	#ifdef CONFIG_MONITOR_IS_IN_RAM
	232	#define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */
	233	#else
	234	#if CONFIG_ASTRO_V532
	235	#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
	236	"run xilinxload&&run alteraload&&bootm 0x80000;"\
	237	"update;reset"
	238	#else
	239	#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
	240	"run xilinxload&&bootm 0x80000;update;reset"
	241	#endif
	242	#endif
	243
	244	/* default bootargs that are considered during boot */
	245	#define CONFIG_BOOTARGS " console=ttyS2,115200 rootfstype=romfs"\
	246	" loaderversion=$loaderversion"
	247
	248	#define CONFIG_SYS_PROMPT "URMEL > "
	249
	250	/* default RAM address for user programs */
	251	#define CONFIG_SYS_LOAD_ADDR 0x20000
	252
	253	#define CONFIG_SYS_LONGHELP
	254
	255	#if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
	256	#define CONFIG_SYS_CBSIZE 1024
	257	#else
	258	#define CONFIG_SYS_CBSIZE 256
	259	#endif
	260	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
	261	#define CONFIG_SYS_MAXARGS 16
	262	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	263
	264	#define CONFIG_FPGA_COUNT 1
	265	#define CONFIG_FPGA
	266	#define CONFIG_FPGA_XILINX
	267	#define CONFIG_FPGA_SPARTAN3
	268	#define CONFIG_FPGA_ALTERA
	269	#define CONFIG_FPGA_CYCLON2
	270	#define CONFIG_SYS_FPGA_PROG_FEEDBACK
	271	#define CONFIG_SYS_FPGA_WAIT 1000
	272
	273	/* End of user parameters to be customized */
	274
	275	/* Defines memory range for test */
	276
	277	#define CONFIG_SYS_MEMTEST_START 0x40020000
	278	#define CONFIG_SYS_MEMTEST_END 0x41ffffff
	279
280	/*
281	* Low Level Configuration Settings
282	* (address mappings, register initial values, etc.)
283	* You should know what you are doing if you make changes here.
284	*/
285
286	/* Base register address */
287
288	#define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */
289
290	/* System Conf. Reg. & System Protection Reg. */
291
292	#define CONFIG_SYS_SCR 0x0003;
293	#define CONFIG_SYS_SPR 0xffff;
294
295	/*
296	* Definitions for initial stack pointer and data area (in internal SRAM)
297	*/
298	#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
553f0982	299	#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
9d79e575	300	#define CONFIG_SYS_INIT_RAM_CTRL 0x221
553f0982	301	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
25ddd1fb	302	GENERATED_GBL_DATA_SIZE)
9d79e575 WW	303	#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
	304
	305	/*
	306	* Start addresses for the final memory configuration
	307	* (Set up by the startup code)
	308	* for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
	309	*/
	310	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	311
	312	/*
	313	* Chipselect bank definitions
	314	*
	315	* CS0 - Flash 32MB (first 16MB)
	316	* CS1 - Flash 32MB (second half)
	317	* CS2 - FPGA
	318	* CS3 - FPGA
	319	* CS4 - unused
	320	* CS5 - unused
	321	*/
	322	#define CONFIG_SYS_CS0_BASE 0
	323	#define CONFIG_SYS_CS0_MASK 0x00ff0001
	324	#define CONFIG_SYS_CS0_CTRL 0x00001fc0
	325
	326	#define CONFIG_SYS_CS1_BASE 0x01000000
	327	#define CONFIG_SYS_CS1_MASK 0x00ff0001
	328	#define CONFIG_SYS_CS1_CTRL 0x00001fc0
	329
	330	#define CONFIG_SYS_CS2_BASE 0x20000000
	331	#define CONFIG_SYS_CS2_MASK 0x00ff0001
	332	#define CONFIG_SYS_CS2_CTRL 0x0000fec0
	333
	334	#define CONFIG_SYS_CS3_BASE 0x21000000
	335	#define CONFIG_SYS_CS3_MASK 0x00ff0001
	336	#define CONFIG_SYS_CS3_CTRL 0x0000fec0
	337
	338	#define CONFIG_SYS_FLASH_BASE 0x00000000
	339
	340	#ifdef CONFIG_MONITOR_IS_IN_RAM
14d0a02a	341	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
9d79e575 WW	342	#else
	343	/* This is mainly used during relocation in start.S */
	344	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
	345	#endif
	346	/* Reserve 256 kB for Monitor */
	347	#define CONFIG_SYS_MONITOR_LEN (256 << 10)
	348
	349	#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
	350	/* Reserve 128 kB for malloc() */
	351	#define CONFIG_SYS_MALLOC_LEN (128 << 10)
	352
	353	/*
	354	* For booting Linux, the board info and command line data
	355	* have to be in the first 8 MB of memory, since this is
	356	* the maximum mapped by the Linux kernel during initialization ??
	357	*/
	358	#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
	359	(CONFIG_SYS_SDRAM_SIZE << 20))
	360
	361	/* FLASH organization */
	362	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	363	#define CONFIG_SYS_MAX_FLASH_SECT 259
	364	#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
	365
	366	#define CONFIG_SYS_FLASH_CFI 1
	367	#define CONFIG_FLASH_CFI_DRIVER 1
	368	#define CONFIG_SYS_FLASH_SIZE 0x2000000
	369	#define CONFIG_SYS_FLASH_PROTECTION 1
	370	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
	371	#define CONFIG_SYS_FLASH_CFI_NONBLOCK 1
	372
	373	#if ENABLE_JFFS
	374	/* JFFS Partition offset set */
	375	#define CONFIG_SYS_JFFS2_FIRST_BANK 0
	376	#define CONFIG_SYS_JFFS2_NUM_BANKS 1
	377	/* 512k reserved for u-boot */
	378	#define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40
	379	#endif
	380
	381	/* Cache Configuration */
	382	#define CONFIG_SYS_CACHELINE_SIZE 16
	383
dd9f054e	384	#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
553f0982	385	CONFIG_SYS_INIT_RAM_SIZE - 8)
dd9f054e	386	#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
553f0982	387	CONFIG_SYS_INIT_RAM_SIZE - 4)
dd9f054e TL	388	#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA)
	389	#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE \| \
	390	CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) \| \
	391	CF_ACR_EN \| CF_ACR_SM_ALL)
	392	#define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC \| CF_CACR_CINVA \| \
	393	CF_CACR_DCM_P)
	394
9d79e575	395	#endif /* _CONFIG_ASTRO_MCF5373L_H */