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9d79e575 WW |
1 | /* |
2 | * Configuration settings for the Sentec Cobra Board. | |
3 | * | |
4 | * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> | |
5 | * | |
6 | * See file CREDITS for list of people who contributed to this | |
7 | * project. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of | |
12 | * the License, or (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
22 | * MA 02111-1307 USA | |
23 | */ | |
24 | ||
25 | /* | |
26 | * configuration for ASTRO "Urmel" board. | |
27 | * Originating from Cobra5272 configuration, messed up by | |
28 | * Wolfgang Wegner <w.wegner@astro-kom.de> | |
29 | * Please do not bother the original author with bug reports | |
30 | * concerning this file. | |
31 | */ | |
32 | ||
33 | #ifndef _CONFIG_ASTRO_MCF5373L_H | |
34 | #define _CONFIG_ASTRO_MCF5373L_H | |
35 | ||
51926d5e MV |
36 | #include <linux/stringify.h> |
37 | ||
9d79e575 WW |
38 | /* |
39 | * set the card type to actually compile for; either of | |
40 | * the possibilities listed below has to be used! | |
41 | */ | |
42 | #define CONFIG_ASTRO_V532 1 | |
43 | ||
44 | #if CONFIG_ASTRO_V532 | |
45 | #define ASTRO_ID 0xF8 | |
46 | #elif CONFIG_ASTRO_V512 | |
47 | #define ASTRO_ID 0xFA | |
48 | #elif CONFIG_ASTRO_TWIN7S2 | |
49 | #define ASTRO_ID 0xF9 | |
50 | #elif CONFIG_ASTRO_V912 | |
51 | #define ASTRO_ID 0xFC | |
52 | #elif CONFIG_ASTRO_COFDMDUOS2 | |
53 | #define ASTRO_ID 0xFB | |
54 | #else | |
55 | #error No card type defined! | |
56 | #endif | |
57 | ||
58 | /* | |
59 | * Define processor | |
60 | * possible values for Urmel board: only Coldfire M5373 processor supported | |
61 | * (please do not change) | |
62 | */ | |
63 | ||
64 | /* it seems not clear yet which processor defines we should use */ | |
65 | #define CONFIG_MCF537x /* define processor family */ | |
66 | #define CONFIG_MCF532x /* define processor family */ | |
67 | #define CONFIG_M5373 /* define processor type */ | |
68 | #define CONFIG_ASTRO5373L /* define board type */ | |
69 | ||
70 | /* Command line configuration */ | |
71 | #include <config_cmd_default.h> | |
72 | ||
73 | /* | |
d24f2d32 | 74 | * CONFIG_RAM defines if u-boot is loaded via BDM (or started from |
9d79e575 WW |
75 | * a different bootloader that has already performed RAM setup) or |
76 | * started directly from flash, which is the regular case for production | |
77 | * boards. | |
78 | */ | |
d24f2d32 | 79 | #ifdef CONFIG_RAM |
9d79e575 | 80 | #define CONFIG_MONITOR_IS_IN_RAM |
14d0a02a | 81 | #define CONFIG_SYS_TEXT_BASE 0x40020000 |
9d79e575 WW |
82 | #define ENABLE_JFFS 0 |
83 | #else | |
14d0a02a | 84 | #define CONFIG_SYS_TEXT_BASE 0x00000000 |
9d79e575 WW |
85 | #define ENABLE_JFFS 1 |
86 | #endif | |
87 | ||
88 | /* Define which commmands should be available at u-boot command prompt */ | |
89 | ||
90 | #define CONFIG_CMD_CACHE | |
91 | #define CONFIG_CMD_DATE | |
92 | #define CONFIG_CMD_ELF | |
93 | #define CONFIG_CMD_FLASH | |
94 | #define CONFIG_CMD_I2C | |
95 | #define CONFIG_CMD_MEMORY | |
96 | #define CONFIG_CMD_MISC | |
97 | #define CONFIG_CMD_XIMG | |
98 | #undef CONFIG_CMD_NET | |
99 | #undef CONFIG_CMD_NFS | |
100 | #if ENABLE_JFFS | |
101 | #define CONFIG_CMD_JFFS2 | |
102 | #endif | |
103 | #define CONFIG_CMD_REGINFO | |
104 | #define CONFIG_CMD_LOADS | |
105 | #define CONFIG_CMD_LOADB | |
106 | #define CONFIG_CMD_FPGA | |
107 | #define CONFIG_CMDLINE_EDITING | |
108 | ||
109 | #define CONFIG_SYS_HUSH_PARSER | |
9d79e575 WW |
110 | |
111 | #define CONFIG_MCFRTC | |
112 | #undef RTC_DEBUG | |
113 | ||
114 | /* Timer */ | |
115 | #define CONFIG_MCFTMR | |
116 | #undef CONFIG_MCFPIT | |
117 | ||
118 | /* I2C */ | |
119 | #define CONFIG_FSL_I2C | |
120 | #define CONFIG_HARD_I2C /* I2C with hw support */ | |
121 | #undef CONFIG_SOFT_I2C /* I2C bit-banged */ | |
122 | #define CONFIG_SYS_I2C_SPEED 80000 | |
123 | #define CONFIG_SYS_I2C_SLAVE 0x7F | |
124 | #define CONFIG_SYS_I2C_OFFSET 0x58000 | |
125 | #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR | |
126 | ||
127 | /* | |
128 | * Defines processor clock - important for correct timings concerning serial | |
129 | * interface etc. | |
130 | * CONFIG_SYS_HZ gives unit: 1000 -> 1 Hz ^= 1000 ms | |
131 | */ | |
132 | ||
133 | #define CONFIG_SYS_HZ 1000 | |
134 | #define CONFIG_SYS_CLK 80000000 | |
135 | #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3) | |
136 | #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ | |
137 | ||
138 | #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000 | |
139 | #define CONFIG_SYS_CORE_SRAM 0x80000000 | |
140 | ||
141 | #define CONFIG_SYS_UNIFY_CACHE | |
142 | ||
143 | /* | |
144 | * Define baudrate for UART1 (console output, tftp, ...) | |
145 | * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud | |
146 | * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected | |
147 | * in u-boot command interface | |
148 | */ | |
149 | ||
150 | #define CONFIG_BAUDRATE 115200 | |
9d79e575 WW |
151 | |
152 | #define CONFIG_MCFUART | |
153 | #define CONFIG_SYS_UART_PORT (2) | |
154 | #define CONFIG_SYS_UART2_ALT3_GPIO | |
155 | ||
156 | /* | |
157 | * Watchdog configuration; Watchdog is disabled for running from RAM | |
158 | * and set to highest possible value else. Beware there is no check | |
159 | * in the watchdog code to validate the timeout value set here! | |
160 | */ | |
161 | ||
162 | #ifndef CONFIG_MONITOR_IS_IN_RAM | |
163 | #define CONFIG_WATCHDOG | |
164 | #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */ | |
165 | #endif | |
166 | ||
167 | /* | |
168 | * Configuration for environment | |
169 | * Environment is located in the last sector of the flash | |
170 | */ | |
171 | ||
172 | #ifndef CONFIG_MONITOR_IS_IN_RAM | |
173 | #define CONFIG_ENV_OFFSET 0x1FF8000 | |
174 | #define CONFIG_ENV_SECT_SIZE 0x8000 | |
175 | #define CONFIG_ENV_IS_IN_FLASH 1 | |
176 | #else | |
177 | /* | |
178 | * environment in RAM - This is used to use a single PC-based application | |
179 | * to load an image, load U-Boot, load an environment and then start U-Boot | |
180 | * to execute the commands from the environment. Feedback is done via setting | |
181 | * and reading memory locations. | |
182 | */ | |
183 | #define CONFIG_ENV_ADDR 0x40060000 | |
184 | #define CONFIG_ENV_SECT_SIZE 0x8000 | |
185 | #define CONFIG_ENV_IS_IN_FLASH 1 | |
186 | #endif | |
187 | ||
188 | /* here we put our FPGA configuration... */ | |
189 | #define CONFIG_MISC_INIT_R 1 | |
190 | ||
191 | /* Define user parameters that have to be customized most likely */ | |
192 | ||
193 | /* AUTOBOOT settings - booting images automatically by u-boot after power on */ | |
194 | ||
195 | /* | |
196 | * used for autoboot, delay in seconds u-boot will wait before starting | |
197 | * defined (auto-)boot command, setting to -1 disables delay, setting to | |
198 | * 0 will too prevent access to u-boot command interface: u-boot then has | |
199 | * to be reflashed | |
200 | * beware - watchdog is not serviced during autoboot delay time! | |
201 | */ | |
202 | #ifdef CONFIG_MONITOR_IS_IN_RAM | |
203 | #define CONFIG_BOOTDELAY 1 | |
204 | #else | |
205 | #define CONFIG_BOOTDELAY 1 | |
206 | #endif | |
207 | ||
208 | /* | |
209 | * The following settings will be contained in the environment block ; if you | |
210 | * want to use a neutral environment all those settings can be manually set in | |
211 | * u-boot: 'set' command | |
212 | */ | |
213 | ||
9d79e575 WW |
214 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
215 | "loaderversion=11\0" \ | |
51926d5e | 216 | "card_id="__stringify(ASTRO_ID)"\0" \ |
9d79e575 WW |
217 | "alterafile=0\0" \ |
218 | "xilinxfile=0\0" \ | |
219 | "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\ | |
220 | "fpga load 0 0x41000000 $filesize\0" \ | |
221 | "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\ | |
222 | "fpga load 1 0x41000000 $filesize\0" \ | |
223 | "env_default=1\0" \ | |
224 | "env_check=if test $env_default -eq 1;"\ | |
225 | " then setenv env_default 0;saveenv;fi\0" | |
226 | ||
227 | /* | |
228 | * "update" is a non-standard command that has to be supplied | |
229 | * by external update.c; This is not included in mainline because | |
230 | * it needs non-blocking CFI routines. | |
231 | */ | |
232 | #ifdef CONFIG_MONITOR_IS_IN_RAM | |
233 | #define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */ | |
234 | #else | |
235 | #if CONFIG_ASTRO_V532 | |
236 | #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ | |
237 | "run xilinxload&&run alteraload&&bootm 0x80000;"\ | |
238 | "update;reset" | |
239 | #else | |
240 | #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ | |
241 | "run xilinxload&&bootm 0x80000;update;reset" | |
242 | #endif | |
243 | #endif | |
244 | ||
245 | /* default bootargs that are considered during boot */ | |
246 | #define CONFIG_BOOTARGS " console=ttyS2,115200 rootfstype=romfs"\ | |
247 | " loaderversion=$loaderversion" | |
248 | ||
249 | #define CONFIG_SYS_PROMPT "URMEL > " | |
250 | ||
251 | /* default RAM address for user programs */ | |
252 | #define CONFIG_SYS_LOAD_ADDR 0x20000 | |
253 | ||
254 | #define CONFIG_SYS_LONGHELP | |
255 | ||
256 | #if (CONFIG_COMMANDS & CONFIG_CMD_KGDB) | |
257 | #define CONFIG_SYS_CBSIZE 1024 | |
258 | #else | |
259 | #define CONFIG_SYS_CBSIZE 256 | |
260 | #endif | |
261 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) | |
262 | #define CONFIG_SYS_MAXARGS 16 | |
263 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
264 | ||
265 | #define CONFIG_FPGA_COUNT 1 | |
266 | #define CONFIG_FPGA | |
267 | #define CONFIG_FPGA_XILINX | |
268 | #define CONFIG_FPGA_SPARTAN3 | |
269 | #define CONFIG_FPGA_ALTERA | |
270 | #define CONFIG_FPGA_CYCLON2 | |
271 | #define CONFIG_SYS_FPGA_PROG_FEEDBACK | |
272 | #define CONFIG_SYS_FPGA_WAIT 1000 | |
273 | ||
274 | /* End of user parameters to be customized */ | |
275 | ||
276 | /* Defines memory range for test */ | |
277 | ||
278 | #define CONFIG_SYS_MEMTEST_START 0x40020000 | |
279 | #define CONFIG_SYS_MEMTEST_END 0x41ffffff | |
280 | ||
281 | /* | |
282 | * Low Level Configuration Settings | |
283 | * (address mappings, register initial values, etc.) | |
284 | * You should know what you are doing if you make changes here. | |
285 | */ | |
286 | ||
287 | /* Base register address */ | |
288 | ||
289 | #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */ | |
290 | ||
291 | /* System Conf. Reg. & System Protection Reg. */ | |
292 | ||
293 | #define CONFIG_SYS_SCR 0x0003; | |
294 | #define CONFIG_SYS_SPR 0xffff; | |
295 | ||
296 | /* | |
297 | * Definitions for initial stack pointer and data area (in internal SRAM) | |
298 | */ | |
299 | #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 | |
553f0982 | 300 | #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 |
9d79e575 | 301 | #define CONFIG_SYS_INIT_RAM_CTRL 0x221 |
553f0982 | 302 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ |
25ddd1fb | 303 | GENERATED_GBL_DATA_SIZE) |
9d79e575 WW |
304 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
305 | ||
306 | /* | |
307 | * Start addresses for the final memory configuration | |
308 | * (Set up by the startup code) | |
309 | * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000 | |
310 | */ | |
311 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 | |
312 | ||
313 | /* | |
314 | * Chipselect bank definitions | |
315 | * | |
316 | * CS0 - Flash 32MB (first 16MB) | |
317 | * CS1 - Flash 32MB (second half) | |
318 | * CS2 - FPGA | |
319 | * CS3 - FPGA | |
320 | * CS4 - unused | |
321 | * CS5 - unused | |
322 | */ | |
323 | #define CONFIG_SYS_CS0_BASE 0 | |
324 | #define CONFIG_SYS_CS0_MASK 0x00ff0001 | |
325 | #define CONFIG_SYS_CS0_CTRL 0x00001fc0 | |
326 | ||
327 | #define CONFIG_SYS_CS1_BASE 0x01000000 | |
328 | #define CONFIG_SYS_CS1_MASK 0x00ff0001 | |
329 | #define CONFIG_SYS_CS1_CTRL 0x00001fc0 | |
330 | ||
331 | #define CONFIG_SYS_CS2_BASE 0x20000000 | |
332 | #define CONFIG_SYS_CS2_MASK 0x00ff0001 | |
333 | #define CONFIG_SYS_CS2_CTRL 0x0000fec0 | |
334 | ||
335 | #define CONFIG_SYS_CS3_BASE 0x21000000 | |
336 | #define CONFIG_SYS_CS3_MASK 0x00ff0001 | |
337 | #define CONFIG_SYS_CS3_CTRL 0x0000fec0 | |
338 | ||
339 | #define CONFIG_SYS_FLASH_BASE 0x00000000 | |
340 | ||
341 | #ifdef CONFIG_MONITOR_IS_IN_RAM | |
14d0a02a | 342 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
9d79e575 WW |
343 | #else |
344 | /* This is mainly used during relocation in start.S */ | |
345 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) | |
346 | #endif | |
347 | /* Reserve 256 kB for Monitor */ | |
348 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) | |
349 | ||
350 | #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) | |
351 | /* Reserve 128 kB for malloc() */ | |
352 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) | |
353 | ||
354 | /* | |
355 | * For booting Linux, the board info and command line data | |
356 | * have to be in the first 8 MB of memory, since this is | |
357 | * the maximum mapped by the Linux kernel during initialization ?? | |
358 | */ | |
359 | #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ | |
360 | (CONFIG_SYS_SDRAM_SIZE << 20)) | |
361 | ||
362 | /* FLASH organization */ | |
363 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
364 | #define CONFIG_SYS_MAX_FLASH_SECT 259 | |
365 | #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 | |
366 | ||
367 | #define CONFIG_SYS_FLASH_CFI 1 | |
368 | #define CONFIG_FLASH_CFI_DRIVER 1 | |
369 | #define CONFIG_SYS_FLASH_SIZE 0x2000000 | |
370 | #define CONFIG_SYS_FLASH_PROTECTION 1 | |
371 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 | |
372 | #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1 | |
373 | ||
374 | #if ENABLE_JFFS | |
375 | /* JFFS Partition offset set */ | |
376 | #define CONFIG_SYS_JFFS2_FIRST_BANK 0 | |
377 | #define CONFIG_SYS_JFFS2_NUM_BANKS 1 | |
378 | /* 512k reserved for u-boot */ | |
379 | #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40 | |
380 | #endif | |
381 | ||
382 | /* Cache Configuration */ | |
383 | #define CONFIG_SYS_CACHELINE_SIZE 16 | |
384 | ||
dd9f054e | 385 | #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ |
553f0982 | 386 | CONFIG_SYS_INIT_RAM_SIZE - 8) |
dd9f054e | 387 | #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ |
553f0982 | 388 | CONFIG_SYS_INIT_RAM_SIZE - 4) |
dd9f054e TL |
389 | #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) |
390 | #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ | |
391 | CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ | |
392 | CF_ACR_EN | CF_ACR_SM_ALL) | |
393 | #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ | |
394 | CF_CACR_DCM_P) | |
395 | ||
9d79e575 | 396 | #endif /* _CONFIG_ASTRO_MCF5373L_H */ |