[people/ms/u-boot.git] / include / configs / at91rm9200ek.h

/*
 * Ulf Samuelsson <ulf@atmel.com>
 * Rick Bronson <rick@efn.org>
 *
 * Configuration settings for the AT91RM9200EK board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_AT91_LEGACY

/* ARM asynchronous clock */
/*
 * from 18.432 MHz crystal
 * (18432000 / 4 * 39)
 */
#define AT91C_MAIN_CLOCK	179712000
/*
 * peripheral clock
 * (AT91C_MASTER_CLOCK / 3)
 */
#define AT91C_MASTER_CLOCK	59904000

#define AT91_SLOW_CLOCK		32768	/* slow clock */

#define CONFIG_ARM920T		1	/* This is an ARM920T Core	*/
#define CONFIG_AT91RM9200	1	/* It's an Atmel AT91RM9200 SoC	*/
#define CONFIG_AT91RM9200EK	1	/* on an AT91RM9200EK Board	*/
#undef  CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
#define USE_920T_MMU		1

#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	1

/*
 * LowLevel Init
 */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_USE_MAIN_OSCILLATOR		1
/* flash */
#define CONFIG_SYS_EBI_CFGR_VAL	0x00000000
#define CONFIG_SYS_SMC_CSR0_VAL	0x00003284 /* 16bit, 2 TDF, 4 WS */

/* clocks */
#define CONFIG_SYS_PLLAR_VAL	0x20263E04 /* 179.712000 MHz for PCK */
#define CONFIG_SYS_PLLBR_VAL	0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
#define CONFIG_SYS_MCKR_VAL	0x00000202

/* sdram */
#define CONFIG_SYS_PIOC_ASR_VAL	0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
#define CONFIG_SYS_PIOC_BSR_VAL	0x00000000
#define CONFIG_SYS_PIOC_PDR_VAL	0xFFFF0000
#define CONFIG_SYS_EBI_CSA_VAL	0x00000002 /* CS1=CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRC_CR_VAL	0x2188c155 /* set up the CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRAM	0x20000000 /* address of the CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRAM1	0x20000080 /* address of the CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRAM_VAL	0x00000000 /* value written to CONFIG_SYS_SDRAM */
#define CONFIG_SYS_SDRC_MR_VAL	0x00000002 /* Precharge All */
#define CONFIG_SYS_SDRC_MR_VAL1	0x00000004 /* refresh */
#define CONFIG_SYS_SDRC_MR_VAL2	0x00000003 /* Load Mode Register */
#define CONFIG_SYS_SDRC_MR_VAL3	0x00000000 /* Normal Mode */
#define CONFIG_SYS_SDRC_TR_VAL	0x000002E0 /* Write refresh rate */
#else
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif	/* CONFIG_SKIP_LOWLEVEL_INIT */

/* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
#define CONFIG_SYS_AT91C_BRGR_DIVISOR	33

/*
 * Memory Configuration
 */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			0x20000000
#define PHYS_SDRAM_SIZE			0x02000000	/* 32 megs */

#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
#define CONFIG_SYS_MEMTEST_END		\
		(CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144)

/*
 * Hardware drivers
 */

/*
 * UART Configuration
 *
 * define one of these to choose the DBGU,
 * USART0 or USART1 as console
 */
#define CONFIG_AT91RM9200_USART
#define CONFIG_DBGU
#undef CONFIG_USART0
#undef CONFIG_USART1
/* don't include RTS/CTS flow control support	*/
#undef	CONFIG_HWFLOW
/* disable modem initialization stuff */
#undef	CONFIG_MODEM_SUPPORT

#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
#define CONFIG_BAUDRATE			115200

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_DHCP
#define CONFIG_CMD_FAT
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING

#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_MISC
#undef CONFIG_CMD_LOADS

#include <asm/arch/AT91RM9200.h>	/* needed for port definitions */
/* Options for MMC/SD Card */
#define CONFIG_DOS_PARTITION	1
#undef CONFIG_MMC
#define CONFIG_SYS_MMC_BASE		0xFFFB4000
#define CONFIG_SYS_MMC_BLOCKSIZE	512

/*
 * Network Driver Setting
 */
#define CONFIG_NET_MULTI		1
#ifdef CONFIG_NET_MULTI
#define CONFIG_DRIVER_AT91EMAC		1
#define CONFIG_SYS_RX_ETH_BUFFER	8
#else
#define CONFIG_DRIVER_ETHER		1
#endif
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_AT91C_USE_RMII

/*
 * AC Characteristics
 * DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns
 */
#define DATAFLASH_TCSS	(0xC << 16)
#define DATAFLASH_TCHS	(0x1 << 24)

#if defined(CONFIG_HAS_DATAFLASH)
#define CONFIG_SYS_SPI_WRITE_TOUT		(5 * CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
#define CONFIG_SYS_MAX_DATAFLASH_PAGES		16384
/* Logical adress for CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000
/* Logical adress for CS3 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000
#define	CONFIG_SYS_SUPPORT_BLOCK_ERASE		1
#define	CONFIG_SYS_DATAFLASH_MMC_PIO		AT91C_PIO_PB22
#endif

/*
 * NOR Flash
 */
#define CONFIG_SYS_FLASH_BASE			0x10000000
#define PHYS_FLASH_SIZE				0x800000	/* 8MB */
#define CONFIG_SYS_FLASH_CFI			1
#define CONFIG_FLASH_CFI_DRIVER			1
#define CONFIG_SYS_MAX_FLASH_BANKS		1
#define CONFIG_SYS_MAX_FLASH_SECT		256
#define CONFIG_SYS_FLASH_PROTECTION

/*
 * Environment Settings
 */
#ifdef CONFIG_ENV_IS_IN_DATAFLASH
/*
 * Datasflash Environment Settings
 */
#define CONFIG_ENV_OFFSET			0x4200
#define CONFIG_ENV_ADDR			\
		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
/* 8 * 1056 really , but start.s is not OK with this*/
#define CONFIG_ENV_SIZE			0x2000

#else
/*
 * NOR Flash Environment Settings
 */
#define CONFIG_ENV_IS_IN_FLASH		1

#ifdef CONFIG_SKIP_LOWLEVEL_INIT
/*
 * between boot.bin and u-boot.bin.gz
 */
#define CONFIG_ENV_ADDR			(CONFIG_SYS_FLASH_BASE + 0xe000)
#define CONFIG_ENV_SIZE			0x10000 /* sectors are 64K here */
#else
/*
 * after u-boot.bin
 */
#define CONFIG_ENV_ADDR			\
		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
#define CONFIG_ENV_SIZE			0x10000 /* sectors are 64K here */
/* The following #defines are needed to get flash environment right */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_MONITOR_LEN		\
		(CONFIG_SYS_BOOT_SIZE + CONFIG_SYS_U_BOOT_SIZE)
#endif	/* CONFIG_SKIP_LOWLEVEL_INIT */

#endif	/* CONFIG_ENV_IS_IN_DATAFLASH */

/*
 * Boot option
 */
#define CONFIG_BOOTDELAY		3

#ifdef CONFIG_SKIP_LOWLEVEL_INIT
/* boot.bin, env, u-boot.bin.gz */
#define CONFIG_SYS_BOOT_SIZE		0x6000 /* 24 KBytes */
#define CONFIG_SYS_U_BOOT_BASE		(CONFIG_SYS_FLASH_BASE + 0x10000)
#define CONFIG_SYS_U_BOOT_SIZE		0x10000 /* 64 KBytes */
#else
/* u-boot.bin */
#define CONFIG_SYS_BOOT_SIZE		0x0 /* 0 KBytes */
#define CONFIG_SYS_U_BOOT_BASE		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_U_BOOT_SIZE		0x40000 /* 128 KBytes */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

#define CONFIG_SYS_LOAD_ADDR		0x21000000 /* default load address */
#define CONFIG_ENV_OVERWRITE	1

/*
 * USB Config
 */
#define CONFIG_CMD_USB
#define CONFIG_USB_OHCI_NEW	1
#define CONFIG_USB_KEYBOARD	1
#define CONFIG_USB_STORAGE	1
#define CONFIG_DOS_PARTITION	1

#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
#define CONFIG_SYS_USB_OHCI_REGS_BASE		AT91_USB_HOST_BASE
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91rm9200"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	15

/*
 * I2C
 */
#define CONFIG_HARD_I2C

#ifdef CONFIG_HARD_I2C
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C_SPEED		0	/* not used */
#define CONFIG_SYS_I2C_SLAVE		0	/* not used */
#endif

/*
 * Shell Settings
 */
#define CONFIG_CMDLINE_EDITING		1
#define CONFIG_SYS_LONGHELP		1
#define CONFIG_AUTO_COMPLETE		1
#define CONFIG_SYS_HUSH_PARSER		1
#define CONFIG_SYS_PROMPT		"U-Boot> "
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		\
		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)

#ifndef __ASSEMBLY__
/*-----------------------------------------------------------------------
 * Board specific extension for bd_info
 *
 * This structure is embedded in the global bd_info (bd_t) structure
 * and can be used by the board specific code (eg board/...)
 */

struct bd_info_ext {
	/* helper variable for board environment handling
	 *
	 * env_crc_valid == 0	=>	uninitialised
	 * env_crc_valid > 0	=>	environment crc in flash is valid
	 * env_crc_valid < 0	=>	environment crc in flash is invalid
	 */
	int env_crc_valid;
};
#endif

#define CONFIG_SYS_HZ 1000
/*
 * AT91C_TC0_CMR is implicitly set to
 * AT91C_TC_TIMER_DIV1_CLOCK
 */
#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024 \
					     , 0x1000)
/* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_SIZE	128

#define CONFIG_STACKSIZE		(32 * 1024)	/* regular stack */
#define CONFIG_STACKSIZE_IRQ		(4 * 1024) /* Unsure if to big or to small*/
#define CONFIG_STACKSIZE_FIQ		(4 * 1024) /* Unsure if to big or to small*/
#endif
Commit	Line	Data
cb82a532 US	1	/*
	2	* Ulf Samuelsson <ulf@atmel.com>
	3	* Rick Bronson <rick@efn.org>
	4	*
	5	* Configuration settings for the AT91RM9200EK board.
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
425de62d JS	29	#define CONFIG_AT91_LEGACY
425de62d JS	30
cb82a532 US	31	/* ARM asynchronous clock */
	32	/*
	33	* from 18.432 MHz crystal
	34	* (18432000 / 4 * 39)
	35	*/
	36	#define AT91C_MAIN_CLOCK 179712000
	37	/*
	38	* peripheral clock
	39	* (AT91C_MASTER_CLOCK / 3)
	40	*/
	41	#define AT91C_MASTER_CLOCK 59904000
	42
	43	#define AT91_SLOW_CLOCK 32768 /* slow clock */
	44
	45	#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
	46	#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
	47	#define CONFIG_AT91RM9200EK 1 /* on an AT91RM9200EK Board */
	48	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	49	#define USE_920T_MMU 1
	50
	51	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	52	#define CONFIG_SETUP_MEMORY_TAGS 1
	53	#define CONFIG_INITRD_TAG 1
	54
	55	/*
	56	* LowLevel Init
	57	*/
	58	#ifndef CONFIG_SKIP_LOWLEVEL_INIT
	59	#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
	60	/* flash */
cb82a532 US	61	#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
	62	#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
	63
	64	/* clocks */
	65	#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
	66	#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
	67	/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
	68	#define CONFIG_SYS_MCKR_VAL 0x00000202
	69
	70	/* sdram */
	71	#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
	72	#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
	73	#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
	74	#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */
	75	#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */
	76	#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */
	77	#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */
	78	#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */
	79	#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
	80	#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
	81	#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
	82	#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
	83	#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
	84	#else
	85	#define CONFIG_SKIP_RELOCATE_UBOOT
	86	#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
	87
	88	/* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
	89	#define CONFIG_SYS_AT91C_BRGR_DIVISOR 33
	90
	91	/*
	92	* Memory Configuration
	93	*/
	94	#define CONFIG_NR_DRAM_BANKS 1
	95	#define PHYS_SDRAM 0x20000000
	96	#define PHYS_SDRAM_SIZE 0x02000000 /* 32 megs */
	97
	98	#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
	99	#define CONFIG_SYS_MEMTEST_END \
	100	(CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144)
	101
	102	/*
	103	* Hardware drivers
	104	*/
	105
	106	/*
	107	* UART Configuration
	108	*
	109	* define one of these to choose the DBGU,
	110	* USART0 or USART1 as console
	111	*/
beebd851	112	#define CONFIG_AT91RM9200_USART
cb82a532 US	113	#define CONFIG_DBGU
	114	#undef CONFIG_USART0
	115	#undef CONFIG_USART1
	116	/* don't include RTS/CTS flow control support */
	117	#undef CONFIG_HWFLOW
	118	/* disable modem initialization stuff */
	119	#undef CONFIG_MODEM_SUPPORT
	120
	121	#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
	122	#define CONFIG_BAUDRATE 115200
	123
	124	/*
	125	* Command line configuration.
	126	*/
	127	#include <config_cmd_default.h>
	128
	129	#define CONFIG_CMD_DHCP
	130	#define CONFIG_CMD_FAT
	131	#define CONFIG_CMD_MII
	132	#define CONFIG_CMD_PING
	133
	134	#undef CONFIG_CMD_BDI
	135	#undef CONFIG_CMD_IMI
	136	#undef CONFIG_CMD_FPGA
	137	#undef CONFIG_CMD_MISC
	138	#undef CONFIG_CMD_LOADS
	139
	140	#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
	141	/* Options for MMC/SD Card */
	142	#define CONFIG_DOS_PARTITION 1
	143	#undef CONFIG_MMC
	144	#define CONFIG_SYS_MMC_BASE 0xFFFB4000
	145	#define CONFIG_SYS_MMC_BLOCKSIZE 512
	146
	147	/*
	148	* Network Driver Setting
	149	*/
c041e9d2 JS	150	#define CONFIG_NET_MULTI 1
	151	#ifdef CONFIG_NET_MULTI
	152	#define CONFIG_DRIVER_AT91EMAC 1
	153	#define CONFIG_SYS_RX_ETH_BUFFER 8
	154	#else
	155	#define CONFIG_DRIVER_ETHER 1
	156	#endif
cb82a532 US	157	#define CONFIG_NET_RETRY_COUNT 20
	158	#define CONFIG_AT91C_USE_RMII
	159
	160	/*
	161	* AC Characteristics
	162	* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns
	163	*/
	164	#define DATAFLASH_TCSS (0xC << 16)
	165	#define DATAFLASH_TCHS (0x1 << 24)
	166
	167	#if defined(CONFIG_HAS_DATAFLASH)
	168	#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
	169	#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
	170	#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
	171	/* Logical adress for CS0 */
	172	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
	173	/* Logical adress for CS3 */
	174	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000
	175	#define CONFIG_SYS_SUPPORT_BLOCK_ERASE 1
	176	#define CONFIG_SYS_DATAFLASH_MMC_PIO AT91C_PIO_PB22
	177	#endif
	178
	179	/*
	180	* NOR Flash
	181	*/
	182	#define CONFIG_SYS_FLASH_BASE 0x10000000
	183	#define PHYS_FLASH_SIZE 0x800000 /* 8MB */
	184	#define CONFIG_SYS_FLASH_CFI 1
	185	#define CONFIG_FLASH_CFI_DRIVER 1
	186	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	187	#define CONFIG_SYS_MAX_FLASH_SECT 256
	188	#define CONFIG_SYS_FLASH_PROTECTION
	189
	190	/*
	191	* Environment Settings
	192	*/
	193	#ifdef CONFIG_ENV_IS_IN_DATAFLASH
	194	/*
	195	* Datasflash Environment Settings
	196	*/
	197	#define CONFIG_ENV_OFFSET 0x4200
	198	#define CONFIG_ENV_ADDR \
	199	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
	200	/* 8 * 1056 really , but start.s is not OK with this*/
	201	#define CONFIG_ENV_SIZE 0x2000
	202
	203	#else
	204	/*
	205	* NOR Flash Environment Settings
	206	*/
	207	#define CONFIG_ENV_IS_IN_FLASH 1
	208
	209	#ifdef CONFIG_SKIP_LOWLEVEL_INIT
	210	/*
	211	* between boot.bin and u-boot.bin.gz
	212	*/
	213	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xe000)
	214	#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
	215	#else
	216	/*
	217	* after u-boot.bin
	218	*/
	219	#define CONFIG_ENV_ADDR \
	220	(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
221	#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
222	/* The following #defines are needed to get flash environment right */
223	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
224	#define CONFIG_SYS_MONITOR_LEN \
225	(CONFIG_SYS_BOOT_SIZE + CONFIG_SYS_U_BOOT_SIZE)
226	#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
227
228	#endif /* CONFIG_ENV_IS_IN_DATAFLASH */
229
230	/*
231	* Boot option
232	*/
233	#define CONFIG_BOOTDELAY 3
234
235	#ifdef CONFIG_SKIP_LOWLEVEL_INIT
236	/* boot.bin, env, u-boot.bin.gz */
237	#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
238	#define CONFIG_SYS_U_BOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x10000)
239	#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
240	#else
241	/* u-boot.bin */
242	#define CONFIG_SYS_BOOT_SIZE 0x0 /* 0 KBytes */
243	#define CONFIG_SYS_U_BOOT_BASE CONFIG_SYS_FLASH_BASE
244	#define CONFIG_SYS_U_BOOT_SIZE 0x40000 /* 128 KBytes */
245	#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
246
247	#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
248	#define CONFIG_ENV_OVERWRITE 1
249
250	/*
251	* USB Config
252	*/
253	#define CONFIG_CMD_USB
254	#define CONFIG_USB_OHCI_NEW 1
255	#define CONFIG_USB_KEYBOARD 1
256	#define CONFIG_USB_STORAGE 1
257	#define CONFIG_DOS_PARTITION 1
258
259	#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
260	#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
261	#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
262	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200"
263	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
264
265	/*
266	* I2C
267	*/
268	#define CONFIG_HARD_I2C
269
270	#ifdef CONFIG_HARD_I2C
271	#define CONFIG_CMD_I2C
cb82a532 US	272	#define CONFIG_SYS_I2C_SPEED 0 /* not used */
	273	#define CONFIG_SYS_I2C_SLAVE 0 /* not used */
	274	#endif
	275
	276	/*
	277	* Shell Settings
	278	*/
	279	#define CONFIG_CMDLINE_EDITING 1
	280	#define CONFIG_SYS_LONGHELP 1
	281	#define CONFIG_AUTO_COMPLETE 1
	282	#define CONFIG_SYS_HUSH_PARSER 1
	283	#define CONFIG_SYS_PROMPT "U-Boot> "
	284	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	285	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	286	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	287	/* Print Buffer Size */
	288	#define CONFIG_SYS_PBSIZE \
	289	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	290
	291	#ifndef __ASSEMBLY__
	292	/*-----------------------------------------------------------------------
	293	* Board specific extension for bd_info
	294	*
	295	* This structure is embedded in the global bd_info (bd_t) structure
	296	* and can be used by the board specific code (eg board/...)
	297	*/
	298
	299	struct bd_info_ext {
	300	/* helper variable for board environment handling
	301	*
	302	* env_crc_valid == 0 => uninitialised
	303	* env_crc_valid > 0 => environment crc in flash is valid
	304	* env_crc_valid < 0 => environment crc in flash is invalid
	305	*/
	306	int env_crc_valid;
	307	};
	308	#endif
	309
	310	#define CONFIG_SYS_HZ 1000
	311	/*
	312	* AT91C_TC0_CMR is implicitly set to
	313	* AT91C_TC_TIMER_DIV1_CLOCK
	314	*/
	315	#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
	316
cb82a532 US	317	/*
	318	* Size of malloc() pool
	319	*/
	320	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024 \
	321	, 0x1000)
	322	/* size in bytes reserved for initial data */
	323	#define CONFIG_SYS_GBL_DATA_SIZE 128
	324
	325	#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
	326	#define CONFIG_STACKSIZE_IRQ (4 * 1024) /* Unsure if to big or to small*/
	327	#define CONFIG_STACKSIZE_FIQ (4 * 1024) /* Unsure if to big or to small*/
	328	#endif