[people/ms/u-boot.git] / include / configs / at91sam9261ek.h

/*
 * (C) Copyright 2007-2008
 * Stelian Pop <stelian@popies.net>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Configuation settings for the AT91SAM9261EK board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	18432000	/* 18.432 MHz crystal */
#define CONFIG_SYS_HZ			1000

#ifdef CONFIG_AT91SAM9G10
#define CONFIG_AT91SAM9G10EK		/* It's an Atmel AT91SAM9G10 EK*/
#else
#define CONFIG_AT91SAM9261EK		/* It's an Atmel AT91SAM9261 EK*/
#endif

#include <asm/hardware.h>

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

#define CONFIG_SKIP_LOWLEVEL_INIT

#define CONFIG_DISPLAY_CPUINFO

#define CONFIG_OF_LIBFDT

#define CONFIG_ATMEL_LEGACY
#define CONFIG_SYS_TEXT_BASE		0x21f00000

/*
 * Hardware drivers
 */

/* gpio */
#define CONFIG_AT91_GPIO
#define CONFIG_AT91_GPIO_PULLUP		1

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define CONFIG_USART_ID			ATMEL_ID_SYS
#define CONFIG_BAUDRATE			115200

/* LCD */
#define CONFIG_LCD
#define LCD_BPP				LCD_COLOR8
#define CONFIG_LCD_LOGO
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_LCD
#ifdef CONFIG_AT91SAM9261EK
#define CONFIG_ATMEL_LCD_BGR555
#endif

#define CONFIG_SYS_CONSOLE_IS_IN_ENV

/* LED */
#define CONFIG_AT91_LED
#define	CONFIG_RED_LED		AT91_PIN_PA23	/* this is the power led */
#define	CONFIG_GREEN_LED	AT91_PIN_PA13	/* this is the user1 led */
#define	CONFIG_YELLOW_LED	AT91_PIN_PA14	/* this is the user2 led */

#define CONFIG_BOOTDELAY	3

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_SOURCE

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NAND
#define CONFIG_CMD_USB

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_SDRAM_SIZE		0x04000000
#define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH
#define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000	/* CS3 */
#define AT91_SPI_CLK				15000000
#define DATAFLASH_TCSS				(0x1a << 16)
#define DATAFLASH_TCHS				(0x1 << 24)

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE		1
#define CONFIG_SYS_NAND_BASE			0x40000000
#define CONFIG_SYS_NAND_DBW_8
/* our ALE is AD22 */
#define CONFIG_SYS_NAND_MASK_ALE		(1 << 22)
/* our CLE is AD21 */
#define CONFIG_SYS_NAND_MASK_CLE		(1 << 21)
#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC15

#endif

/* NOR flash - no real flash on this board */
#define CONFIG_SYS_NO_FLASH

/* Ethernet */
#define CONFIG_DRIVER_DM9000
#define CONFIG_DM9000_BASE		0x30000000
#define DM9000_IO			CONFIG_DM9000_BASE
#define DM9000_DATA			(CONFIG_DM9000_BASE + 4)
#define CONFIG_DM9000_USE_16BIT
#define CONFIG_DM9000_NO_SROM
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_RESET_PHY_R

/* USB */
#define CONFIG_USB_ATMEL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00500000	/* AT91SAM9261_UHP_BASE */
#ifdef CONFIG_AT91SAM9G10EK
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g10"
#else
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9261"
#endif
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_FAT

#define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */

#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END			0x23e00000

#ifdef CONFIG_SYS_USE_DATAFLASH_CS0

/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_ENV_IS_IN_DATAFLASH
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
#define CONFIG_ENV_OFFSET	0x4200
#define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE		0x4200
#define CONFIG_BOOTCOMMAND	"cp.b 0xC0084000 0x22000000 0x210000; bootm"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
				"root=/dev/mtdblock0 "			\
				"mtdparts=atmel_nand:-(root) "		\
				"rw rootfstype=jffs2"

#elif CONFIG_SYS_USE_DATAFLASH_CS3

/* bootstrap + u-boot + env + linux in dataflash on CS3 */
#define CONFIG_ENV_IS_IN_DATAFLASH
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
#define CONFIG_ENV_OFFSET	0x4200
#define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE		0x4200
#define CONFIG_BOOTCOMMAND	"cp.b 0xD0084000 0x22000000 0x210000; bootm"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
				"root=/dev/mtdblock0 "			\
				"mtdparts=atmel_nand:-(root) "		\
				"rw rootfstype=jffs2"

#else /* CONFIG_SYS_USE_NANDFLASH */

/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		0x60000
#define CONFIG_ENV_OFFSET_REDUND	0x80000
#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0xA0000 0x200000; bootm"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
				"root=/dev/mtdblock5 "			\
				"mtdparts=atmel_nand:128k(bootstrap)ro,"	\
				"256k(uboot)ro,128k(env1)ro,"		\
				"128k(env2)ro,2M(linux),-(root) "	\
				"rw rootfstype=jffs2"

#endif

#define CONFIG_SYS_PROMPT		"U-Boot> "
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)

#endif
Commit	Line	Data
d99a8ff6 SP	1	/*
d99a8ff6 SP	2	* (C) Copyright 2007-2008
c9e798d3	3	* Stelian Pop <stelian@popies.net>
d99a8ff6 SP	4	* Lead Tech Design <www.leadtechdesign.com>
	5	*
	6	* Configuation settings for the AT91SAM9261EK board.
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#ifndef __CONFIG_H
	28	#define __CONFIG_H
	29
	30	/* ARM asynchronous clock */
f7aea46d	31	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
7c966a8b	32	#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
f7aea46d	33	#define CONFIG_SYS_HZ 1000
d99a8ff6	34
f7aea46d XH	35	#ifdef CONFIG_AT91SAM9G10
f7aea46d XH	36	#define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/
5ccc2d99	37	#else
f7aea46d	38	#define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/
5ccc2d99	39	#endif
f7aea46d XH	40
	41	#include <asm/hardware.h>
	42
f7aea46d XH	43	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	44	#define CONFIG_SETUP_MEMORY_TAGS
	45	#define CONFIG_INITRD_TAG
d99a8ff6 SP	46
d99a8ff6 SP	47	#define CONFIG_SKIP_LOWLEVEL_INIT
d99a8ff6	48
f7aea46d XH	49	#define CONFIG_DISPLAY_CPUINFO
f7aea46d XH	50
dc3e30ba BS	51	#define CONFIG_OF_LIBFDT
dc3e30ba BS	52
f7aea46d XH	53	#define CONFIG_ATMEL_LEGACY
	54	#define CONFIG_SYS_TEXT_BASE 0x21f00000
	55
d99a8ff6 SP	56	/*
	57	* Hardware drivers
	58	*/
f7aea46d XH	59
	60	/* gpio */
	61	#define CONFIG_AT91_GPIO
	62	#define CONFIG_AT91_GPIO_PULLUP 1
	63
	64	/* serial console */
	65	#define CONFIG_ATMEL_USART
	66	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	67	#define CONFIG_USART_ID ATMEL_ID_SYS
	68	#define CONFIG_BAUDRATE 115200
d99a8ff6	69
820f2a95	70	/* LCD */
f7aea46d	71	#define CONFIG_LCD
820f2a95	72	#define LCD_BPP LCD_COLOR8
f7aea46d	73	#define CONFIG_LCD_LOGO
820f2a95	74	#undef LCD_TEST_PATTERN
f7aea46d XH	75	#define CONFIG_LCD_INFO
	76	#define CONFIG_LCD_INFO_BELOW_LOGO
	77	#define CONFIG_SYS_WHITE_ON_BLACK
	78	#define CONFIG_ATMEL_LCD
5ccc2d99	79	#ifdef CONFIG_AT91SAM9261EK
f7aea46d	80	#define CONFIG_ATMEL_LCD_BGR555
5ccc2d99	81	#endif
f7aea46d XH	82
f7aea46d XH	83	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
820f2a95	84
a484b00b JCPV	85	/* LED */
	86	#define CONFIG_AT91_LED
	87	#define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
	88	#define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
	89	#define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
	90
d99a8ff6 SP	91	#define CONFIG_BOOTDELAY 3
d99a8ff6 SP	92
d99a8ff6 SP	93	/*
	94	* BOOTP options
	95	*/
f7aea46d XH	96	#define CONFIG_BOOTP_BOOTFILESIZE
	97	#define CONFIG_BOOTP_BOOTPATH
	98	#define CONFIG_BOOTP_GATEWAY
	99	#define CONFIG_BOOTP_HOSTNAME
d99a8ff6 SP	100
	101	/*
	102	* Command line configuration.
	103	*/
	104	#include <config_cmd_default.h>
	105	#undef CONFIG_CMD_BDI
d99a8ff6	106	#undef CONFIG_CMD_FPGA
74de7aef	107	#undef CONFIG_CMD_IMI
d99a8ff6	108	#undef CONFIG_CMD_IMLS
74de7aef WD	109	#undef CONFIG_CMD_LOADS
74de7aef WD	110	#undef CONFIG_CMD_SOURCE
d99a8ff6	111
f7aea46d XH	112	#define CONFIG_CMD_PING
	113	#define CONFIG_CMD_DHCP
	114	#define CONFIG_CMD_NAND
	115	#define CONFIG_CMD_USB
d99a8ff6 SP	116
	117	/* SDRAM */
	118	#define CONFIG_NR_DRAM_BANKS 1
f7aea46d XH	119	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	120	#define CONFIG_SYS_SDRAM_SIZE 0x04000000
	121	#define CONFIG_SYS_INIT_SP_ADDR \
	122	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
d99a8ff6 SP	123
d99a8ff6 SP	124	/* DataFlash */
4758ebdd	125	#define CONFIG_ATMEL_DATAFLASH_SPI
f7aea46d	126	#define CONFIG_HAS_DATAFLASH
6d0f6bcf JCPV	127	#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
	128	#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
	129	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
	130	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
f7aea46d XH	131	#define AT91_SPI_CLK 15000000
	132	#define DATAFLASH_TCSS (0x1a << 16)
	133	#define DATAFLASH_TCHS (0x1 << 24)
d99a8ff6 SP	134
d99a8ff6 SP	135	/* NAND flash */
74c076d6 JCPV	136	#ifdef CONFIG_CMD_NAND
74c076d6 JCPV	137	#define CONFIG_NAND_ATMEL
6d0f6bcf JCPV	138	#define CONFIG_SYS_MAX_NAND_DEVICE 1
6d0f6bcf JCPV	139	#define CONFIG_SYS_NAND_BASE 0x40000000
f7aea46d	140	#define CONFIG_SYS_NAND_DBW_8
74c076d6 JCPV	141	/* our ALE is AD22 */
	142	#define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
	143	/* our CLE is AD21 */
	144	#define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
	145	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
	146	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
2eb99ca8	147
74c076d6	148	#endif
d99a8ff6 SP	149
d99a8ff6 SP	150	/* NOR flash - no real flash on this board */
f7aea46d	151	#define CONFIG_SYS_NO_FLASH
d99a8ff6 SP	152
d99a8ff6 SP	153	/* Ethernet */
f7aea46d	154	#define CONFIG_DRIVER_DM9000
d99a8ff6 SP	155	#define CONFIG_DM9000_BASE 0x30000000
	156	#define DM9000_IO CONFIG_DM9000_BASE
	157	#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
f7aea46d XH	158	#define CONFIG_DM9000_USE_16BIT
f7aea46d XH	159	#define CONFIG_DM9000_NO_SROM
d99a8ff6	160	#define CONFIG_NET_RETRY_COUNT 20
f7aea46d	161	#define CONFIG_RESET_PHY_R
d99a8ff6 SP	162
d99a8ff6 SP	163	/* USB */
2b7178af	164	#define CONFIG_USB_ATMEL
f7aea46d XH	165	#define CONFIG_USB_OHCI_NEW
	166	#define CONFIG_DOS_PARTITION
	167	#define CONFIG_SYS_USB_OHCI_CPU_INIT
6d0f6bcf	168	#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
5ccc2d99 SG	169	#ifdef CONFIG_AT91SAM9G10EK
	170	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
	171	#else
6d0f6bcf	172	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
5ccc2d99	173	#endif
6d0f6bcf	174	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
f7aea46d XH	175	#define CONFIG_USB_STORAGE
f7aea46d XH	176	#define CONFIG_CMD_FAT
d99a8ff6	177
6d0f6bcf	178	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
d99a8ff6	179
f7aea46d	180	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
6d0f6bcf	181	#define CONFIG_SYS_MEMTEST_END 0x23e00000
d99a8ff6	182
6d0f6bcf	183	#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
d99a8ff6 SP	184
d99a8ff6 SP	185	/* bootstrap + u-boot + env + linux in dataflash on CS0 */
f7aea46d	186	#define CONFIG_ENV_IS_IN_DATAFLASH
6d0f6bcf	187	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
89a7a87f	188	#define CONFIG_ENV_OFFSET 0x4200
6d0f6bcf	189	#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
0e8d1586	190	#define CONFIG_ENV_SIZE 0x4200
e139cb31	191	#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
d99a8ff6 SP	192	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
d99a8ff6 SP	193	"root=/dev/mtdblock0 " \
918319c7	194	"mtdparts=atmel_nand:-(root) " \
d99a8ff6 SP	195	"rw rootfstype=jffs2"
d99a8ff6 SP	196
89a7a87f NF	197	#elif CONFIG_SYS_USE_DATAFLASH_CS3
	198
	199	/* bootstrap + u-boot + env + linux in dataflash on CS3 */
f7aea46d	200	#define CONFIG_ENV_IS_IN_DATAFLASH
89a7a87f NF	201	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
	202	#define CONFIG_ENV_OFFSET 0x4200
	203	#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
	204	#define CONFIG_ENV_SIZE 0x4200
e139cb31	205	#define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm"
89a7a87f NF	206	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
89a7a87f NF	207	"root=/dev/mtdblock0 " \
918319c7	208	"mtdparts=atmel_nand:-(root) " \
89a7a87f NF	209	"rw rootfstype=jffs2"
89a7a87f NF	210
6d0f6bcf	211	#else /* CONFIG_SYS_USE_NANDFLASH */
d99a8ff6 SP	212
d99a8ff6 SP	213	/* bootstrap + u-boot + env + linux in nandflash */
f7aea46d	214	#define CONFIG_ENV_IS_IN_NAND
0e8d1586 JCPV	215	#define CONFIG_ENV_OFFSET 0x60000
	216	#define CONFIG_ENV_OFFSET_REDUND 0x80000
	217	#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
d99a8ff6 SP	218	#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
	219	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
	220	"root=/dev/mtdblock5 " \
918319c7	221	"mtdparts=atmel_nand:128k(bootstrap)ro," \
d99a8ff6 SP	222	"256k(uboot)ro,128k(env1)ro," \
	223	"128k(env2)ro,2M(linux),-(root) " \
	224	"rw rootfstype=jffs2"
	225
	226	#endif
	227
6d0f6bcf JCPV	228	#define CONFIG_SYS_PROMPT "U-Boot> "
	229	#define CONFIG_SYS_CBSIZE 256
	230	#define CONFIG_SYS_MAXARGS 16
	231	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
f7aea46d XH	232	#define CONFIG_SYS_LONGHELP
f7aea46d XH	233	#define CONFIG_CMDLINE_EDITING
e139cb31	234	#define CONFIG_AUTO_COMPLETE
d99a8ff6	235
d99a8ff6 SP	236	/*
	237	* Size of malloc() pool
	238	*/
6d0f6bcf	239	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
d99a8ff6	240
d99a8ff6	241	#endif