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22ee6473 SG |
1 | /* |
2 | * (C) Copyright 2007-2008 | |
c9e798d3 | 3 | * Stelian Pop <stelian@popies.net> |
22ee6473 SG |
4 | * Lead Tech Design <www.leadtechdesign.com> |
5 | * | |
6 | * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES). | |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
22ee6473 SG |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
5cfeec51 TP |
14 | #include <asm/hardware.h> |
15 | ||
77461a65 BS |
16 | #define CONFIG_SYS_TEXT_BASE 0x73f00000 |
17 | ||
5cfeec51 | 18 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ |
425de62d | 19 | |
22ee6473 | 20 | /* ARM asynchronous clock */ |
5cfeec51 TP |
21 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
22 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ | |
5cfeec51 TP |
23 | |
24 | #define CONFIG_AT91SAM9M10G45EK | |
22ee6473 | 25 | |
5cfeec51 TP |
26 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
27 | #define CONFIG_SETUP_MEMORY_TAGS | |
28 | #define CONFIG_INITRD_TAG | |
22ee6473 | 29 | #define CONFIG_SKIP_LOWLEVEL_INIT |
5cfeec51 TP |
30 | #define CONFIG_BOARD_EARLY_INIT_F |
31 | #define CONFIG_DISPLAY_CPUINFO | |
32 | ||
f9129fe3 | 33 | #define CONFIG_CMD_BOOTZ |
dc3e30ba BS |
34 | #define CONFIG_OF_LIBFDT |
35 | ||
68f16477 BS |
36 | #define CONFIG_SYS_GENERIC_BOARD |
37 | ||
5cfeec51 TP |
38 | /* general purpose I/O */ |
39 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ | |
40 | #define CONFIG_AT91_GPIO | |
41 | #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ | |
42 | ||
43 | /* serial console */ | |
44 | #define CONFIG_ATMEL_USART | |
45 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
46 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
47 | ||
22ee6473 | 48 | /* LCD */ |
5cfeec51 | 49 | #define CONFIG_LCD |
22ee6473 | 50 | #define LCD_BPP LCD_COLOR8 |
5cfeec51 | 51 | #define CONFIG_LCD_LOGO |
22ee6473 | 52 | #undef LCD_TEST_PATTERN |
5cfeec51 TP |
53 | #define CONFIG_LCD_INFO |
54 | #define CONFIG_LCD_INFO_BELOW_LOGO | |
55 | #define CONFIG_SYS_WHITE_ON_BLACK | |
56 | #define CONFIG_ATMEL_LCD | |
57 | #define CONFIG_ATMEL_LCD_RGB565 | |
58 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
22ee6473 SG |
59 | /* board specific(not enough SRAM) */ |
60 | #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 | |
61 | ||
62 | /* LED */ | |
63 | #define CONFIG_AT91_LED | |
64 | #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ | |
65 | #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ | |
66 | ||
67 | #define CONFIG_BOOTDELAY 3 | |
68 | ||
69 | /* | |
70 | * BOOTP options | |
71 | */ | |
5cfeec51 TP |
72 | #define CONFIG_BOOTP_BOOTFILESIZE |
73 | #define CONFIG_BOOTP_BOOTPATH | |
74 | #define CONFIG_BOOTP_GATEWAY | |
75 | #define CONFIG_BOOTP_HOSTNAME | |
22ee6473 SG |
76 | |
77 | /* | |
78 | * Command line configuration. | |
79 | */ | |
782358fb BS |
80 | |
81 | /* No NOR flash */ | |
82 | #define CONFIG_SYS_NO_FLASH | |
83 | ||
22ee6473 SG |
84 | #include <config_cmd_default.h> |
85 | #undef CONFIG_CMD_BDI | |
86 | #undef CONFIG_CMD_FPGA | |
87 | #undef CONFIG_CMD_IMI | |
88 | #undef CONFIG_CMD_IMLS | |
22ee6473 SG |
89 | #undef CONFIG_CMD_LOADS |
90 | ||
5cfeec51 TP |
91 | #define CONFIG_CMD_PING |
92 | #define CONFIG_CMD_DHCP | |
93 | #define CONFIG_CMD_NAND | |
94 | #define CONFIG_CMD_USB | |
22ee6473 SG |
95 | |
96 | /* SDRAM */ | |
97 | #define CONFIG_NR_DRAM_BANKS 1 | |
5cfeec51 TP |
98 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 |
99 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 | |
22ee6473 | 100 | |
5cfeec51 TP |
101 | #define CONFIG_SYS_INIT_SP_ADDR \ |
102 | (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) | |
103 | ||
22ee6473 SG |
104 | /* NAND flash */ |
105 | #ifdef CONFIG_CMD_NAND | |
22ee6473 SG |
106 | #define CONFIG_NAND_ATMEL |
107 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
5cfeec51 TP |
108 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
109 | #define CONFIG_SYS_NAND_DBW_8 | |
22ee6473 SG |
110 | /* our ALE is AD21 */ |
111 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
112 | /* our CLE is AD22 */ | |
113 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
114 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
115 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 | |
2eb99ca8 | 116 | |
22ee6473 SG |
117 | #endif |
118 | ||
cf874c19 WJ |
119 | /* MMC */ |
120 | #define CONFIG_CMD_MMC | |
121 | ||
122 | #ifdef CONFIG_CMD_MMC | |
123 | #define CONFIG_MMC | |
124 | #define CONFIG_GENERIC_MMC | |
125 | #define CONFIG_GENERIC_ATMEL_MCI | |
126 | #endif | |
127 | ||
128 | #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) | |
129 | #define CONFIG_CMD_FAT | |
130 | #define CONFIG_DOS_PARTITION | |
131 | #endif | |
132 | ||
22ee6473 | 133 | /* Ethernet */ |
5cfeec51 TP |
134 | #define CONFIG_MACB |
135 | #define CONFIG_RMII | |
22ee6473 | 136 | #define CONFIG_NET_RETRY_COUNT 20 |
5cfeec51 | 137 | #define CONFIG_RESET_PHY_R |
4535a24c | 138 | #define CONFIG_AT91_WANTS_COMMON_PHY |
22ee6473 SG |
139 | |
140 | /* USB */ | |
e1edd065 BS |
141 | #define CONFIG_USB_EHCI |
142 | #define CONFIG_USB_EHCI_ATMEL | |
143 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 | |
5cfeec51 | 144 | #define CONFIG_USB_STORAGE |
22ee6473 | 145 | |
5cfeec51 | 146 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
22ee6473 | 147 | |
5cfeec51 TP |
148 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
149 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 | |
22ee6473 | 150 | |
9637a1bb | 151 | #ifdef CONFIG_SYS_USE_NANDFLASH |
5cfeec51 TP |
152 | /* bootstrap + u-boot + env in nandflash */ |
153 | #define CONFIG_ENV_IS_IN_NAND | |
0c58cfa9 BS |
154 | #define CONFIG_ENV_OFFSET 0xc0000 |
155 | #define CONFIG_ENV_OFFSET_REDUND 0x100000 | |
5cfeec51 TP |
156 | #define CONFIG_ENV_SIZE 0x20000 |
157 | ||
0c58cfa9 BS |
158 | #define CONFIG_BOOTCOMMAND \ |
159 | "nand read 0x70000000 0x200000 0x300000;" \ | |
5cfeec51 TP |
160 | "bootm 0x70000000" |
161 | #define CONFIG_BOOTARGS \ | |
162 | "console=ttyS0,115200 earlyprintk " \ | |
0c58cfa9 BS |
163 | "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ |
164 | "256k(env),256k(env_redundant),256k(spare)," \ | |
165 | "512k(dtb),6M(kernel)ro,-(rootfs) " \ | |
166 | "root=/dev/mtdblock7 rw rootfstype=jffs2" | |
9637a1bb WJ |
167 | #elif CONFIG_SYS_USE_MMC |
168 | /* bootstrap + u-boot + env + linux in mmc */ | |
169 | #define FAT_ENV_INTERFACE "mmc" | |
be354c1a WJ |
170 | /* |
171 | * We don't specify the part number, if device 0 has partition table, it means | |
172 | * the first partition; it no partition table, then take whole device as a | |
173 | * FAT file system. | |
174 | */ | |
175 | #define FAT_ENV_DEVICE_AND_PART "0" | |
9637a1bb WJ |
176 | #define FAT_ENV_FILE "uboot.env" |
177 | #define CONFIG_ENV_IS_IN_FAT | |
178 | #define CONFIG_FAT_WRITE | |
179 | #define CONFIG_ENV_SIZE 0x4000 | |
180 | ||
181 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
182 | "mtdparts=atmel_nand:" \ | |
183 | "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ | |
184 | "root=/dev/mmcblk0p2 rw rootwait" | |
185 | #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x71000000 dtb; " \ | |
186 | "fatload mmc 0:1 0x72000000 zImage; " \ | |
187 | "bootz 0x72000000 - 0x71000000" | |
188 | #endif | |
5cfeec51 TP |
189 | |
190 | #define CONFIG_BAUDRATE 115200 | |
22ee6473 SG |
191 | |
192 | #define CONFIG_SYS_PROMPT "U-Boot> " | |
193 | #define CONFIG_SYS_CBSIZE 256 | |
194 | #define CONFIG_SYS_MAXARGS 16 | |
195 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
5cfeec51 TP |
196 | #define CONFIG_SYS_LONGHELP |
197 | #define CONFIG_CMDLINE_EDITING | |
22ee6473 SG |
198 | #define CONFIG_AUTO_COMPLETE |
199 | #define CONFIG_SYS_HUSH_PARSER | |
22ee6473 | 200 | |
22ee6473 SG |
201 | /* |
202 | * Size of malloc() pool | |
203 | */ | |
204 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) | |
22ee6473 | 205 | |
22ee6473 | 206 | #endif |