[people/ms/u-boot.git] / include / configs / at91sam9m10g45ek.h

/*
 * (C) Copyright 2007-2008
 * Stelian Pop <stelian@popies.net>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/hardware.h>

#define CONFIG_AT91_LEGACY
#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
#define CONFIG_SYS_HZ		        1000

#define CONFIG_AT91SAM9M10G45EK
#define CONFIG_AT91FAMILY

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_CPUINFO

#define CONFIG_OF_LIBFDT

/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO
#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define	CONFIG_USART_ID			ATMEL_ID_SYS

/* LCD */
#define CONFIG_LCD
#define LCD_BPP				LCD_COLOR8
#define CONFIG_LCD_LOGO
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_LCD
#define CONFIG_ATMEL_LCD_RGB565
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
/* board specific(not enough SRAM) */
#define CONFIG_AT91SAM9G45_LCD_BASE		0x73E00000

/* LED */
#define CONFIG_AT91_LED
#define	CONFIG_RED_LED		AT91_PIN_PD31	/* this is the user1 led */
#define	CONFIG_GREEN_LED	AT91_PIN_PD0	/* this is the user2 led */

#define CONFIG_BOOTDELAY	3

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_LOADS

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NAND
#define CONFIG_CMD_USB

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS6
#define CONFIG_SYS_SDRAM_SIZE		0x08000000

#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)

/* No NOR flash */
#define CONFIG_SYS_NO_FLASH

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE		1
#define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC8

#endif

/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_RESET_PHY_R

/* USB */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_ATMEL
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
#define CONFIG_DOS_PARTITION
#define CONFIG_USB_STORAGE

#define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		0x23e00000

/* bootstrap + u-boot + env in nandflash */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		0x60000
#define CONFIG_ENV_OFFSET_REDUND	0x80000
#define CONFIG_ENV_SIZE			0x20000

#define CONFIG_BOOTCOMMAND	"nand read 0x70000000 0x100000 0x200000;" \
	"bootm 0x70000000"
#define CONFIG_BOOTARGS							\
	"console=ttyS0,115200 earlyprintk "				\
	"root=/dev/mtdblock5 "						\
	"mtdparts=atmel_nand:128k(bootstrap)ro,"			\
	"256k(uboot)ro,128k(env1)ro,128k(env2)ro,"			\
	"2M@1M(linux),-(root) "						\
	"rw rootfstype=jffs2"

#define CONFIG_BAUDRATE			115200

#define CONFIG_SYS_PROMPT		"U-Boot> "
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)

#endif
Commit	Line	Data
22ee6473 SG	1	/*
22ee6473 SG	2	* (C) Copyright 2007-2008
c9e798d3	3	* Stelian Pop <stelian@popies.net>
22ee6473 SG	4	* Lead Tech Design <www.leadtechdesign.com>
	5	*
	6	* Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#ifndef __CONFIG_H
	28	#define __CONFIG_H
	29
5cfeec51 TP	30	#include <asm/hardware.h>
5cfeec51 TP	31
425de62d	32	#define CONFIG_AT91_LEGACY
5cfeec51	33	#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
425de62d	34
22ee6473	35	/* ARM asynchronous clock */
5cfeec51 TP	36	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
	37	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
	38	#define CONFIG_SYS_HZ 1000
	39
	40	#define CONFIG_AT91SAM9M10G45EK
	41	#define CONFIG_AT91FAMILY
22ee6473	42
5cfeec51 TP	43	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	44	#define CONFIG_SETUP_MEMORY_TAGS
	45	#define CONFIG_INITRD_TAG
22ee6473	46	#define CONFIG_SKIP_LOWLEVEL_INIT
5cfeec51 TP	47	#define CONFIG_BOARD_EARLY_INIT_F
	48	#define CONFIG_DISPLAY_CPUINFO
	49
dc3e30ba BS	50	#define CONFIG_OF_LIBFDT
dc3e30ba BS	51
5cfeec51 TP	52	/* general purpose I/O */
	53	#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
	54	#define CONFIG_AT91_GPIO
	55	#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
	56
	57	/* serial console */
	58	#define CONFIG_ATMEL_USART
	59	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	60	#define CONFIG_USART_ID ATMEL_ID_SYS
	61
22ee6473	62	/* LCD */
5cfeec51	63	#define CONFIG_LCD
22ee6473	64	#define LCD_BPP LCD_COLOR8
5cfeec51	65	#define CONFIG_LCD_LOGO
22ee6473	66	#undef LCD_TEST_PATTERN
5cfeec51 TP	67	#define CONFIG_LCD_INFO
	68	#define CONFIG_LCD_INFO_BELOW_LOGO
	69	#define CONFIG_SYS_WHITE_ON_BLACK
	70	#define CONFIG_ATMEL_LCD
	71	#define CONFIG_ATMEL_LCD_RGB565
	72	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
22ee6473 SG	73	/* board specific(not enough SRAM) */
	74	#define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000
	75
	76	/* LED */
	77	#define CONFIG_AT91_LED
	78	#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
	79	#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
	80
	81	#define CONFIG_BOOTDELAY 3
	82
	83	/*
	84	* BOOTP options
	85	*/
5cfeec51 TP	86	#define CONFIG_BOOTP_BOOTFILESIZE
	87	#define CONFIG_BOOTP_BOOTPATH
	88	#define CONFIG_BOOTP_GATEWAY
	89	#define CONFIG_BOOTP_HOSTNAME
22ee6473 SG	90
	91	/*
	92	* Command line configuration.
	93	*/
	94	#include <config_cmd_default.h>
	95	#undef CONFIG_CMD_BDI
	96	#undef CONFIG_CMD_FPGA
	97	#undef CONFIG_CMD_IMI
	98	#undef CONFIG_CMD_IMLS
22ee6473 SG	99	#undef CONFIG_CMD_LOADS
22ee6473 SG	100
5cfeec51 TP	101	#define CONFIG_CMD_PING
	102	#define CONFIG_CMD_DHCP
	103	#define CONFIG_CMD_NAND
	104	#define CONFIG_CMD_USB
22ee6473 SG	105
	106	/* SDRAM */
	107	#define CONFIG_NR_DRAM_BANKS 1
5cfeec51 TP	108	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6
5cfeec51 TP	109	#define CONFIG_SYS_SDRAM_SIZE 0x08000000
22ee6473	110
5cfeec51 TP	111	#define CONFIG_SYS_INIT_SP_ADDR \
	112	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
	113
	114	/* No NOR flash */
	115	#define CONFIG_SYS_NO_FLASH
22ee6473 SG	116
	117	/* NAND flash */
	118	#ifdef CONFIG_CMD_NAND
22ee6473 SG	119	#define CONFIG_NAND_ATMEL
22ee6473 SG	120	#define CONFIG_SYS_MAX_NAND_DEVICE 1
5cfeec51 TP	121	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
5cfeec51 TP	122	#define CONFIG_SYS_NAND_DBW_8
22ee6473 SG	123	/* our ALE is AD21 */
	124	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	125	/* our CLE is AD22 */
	126	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	127	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
	128	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
2eb99ca8	129
22ee6473 SG	130	#endif
	131
	132	/* Ethernet */
5cfeec51 TP	133	#define CONFIG_MACB
5cfeec51 TP	134	#define CONFIG_RMII
22ee6473	135	#define CONFIG_NET_RETRY_COUNT 20
5cfeec51	136	#define CONFIG_RESET_PHY_R
22ee6473 SG	137
22ee6473 SG	138	/* USB */
e1edd065 BS	139	#define CONFIG_USB_EHCI
	140	#define CONFIG_USB_EHCI_ATMEL
	141	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
5cfeec51	142	#define CONFIG_DOS_PARTITION
5cfeec51	143	#define CONFIG_USB_STORAGE
22ee6473	144
5cfeec51	145	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
22ee6473	146
5cfeec51 TP	147	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
5cfeec51 TP	148	#define CONFIG_SYS_MEMTEST_END 0x23e00000
22ee6473	149
5cfeec51 TP	150	/* bootstrap + u-boot + env in nandflash */
5cfeec51 TP	151	#define CONFIG_ENV_IS_IN_NAND
22ee6473 SG	152	#define CONFIG_ENV_OFFSET 0x60000
22ee6473 SG	153	#define CONFIG_ENV_OFFSET_REDUND 0x80000
5cfeec51 TP	154	#define CONFIG_ENV_SIZE 0x20000
	155
	156	#define CONFIG_BOOTCOMMAND "nand read 0x70000000 0x100000 0x200000;" \
	157	"bootm 0x70000000"
	158	#define CONFIG_BOOTARGS \
	159	"console=ttyS0,115200 earlyprintk " \
	160	"root=/dev/mtdblock5 " \
	161	"mtdparts=atmel_nand:128k(bootstrap)ro," \
	162	"256k(uboot)ro,128k(env1)ro,128k(env2)ro," \
	163	"2M@1M(linux),-(root) " \
	164	"rw rootfstype=jffs2"
	165
	166	#define CONFIG_BAUDRATE 115200
22ee6473 SG	167
	168	#define CONFIG_SYS_PROMPT "U-Boot> "
	169	#define CONFIG_SYS_CBSIZE 256
	170	#define CONFIG_SYS_MAXARGS 16
	171	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
5cfeec51 TP	172	#define CONFIG_SYS_LONGHELP
5cfeec51 TP	173	#define CONFIG_CMDLINE_EDITING
22ee6473 SG	174	#define CONFIG_AUTO_COMPLETE
22ee6473 SG	175	#define CONFIG_SYS_HUSH_PARSER
22ee6473	176
22ee6473 SG	177	/*
	178	* Size of malloc() pool
	179	*/
	180	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
22ee6473	181
22ee6473	182	#endif