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22ee6473 SG |
1 | /* |
2 | * (C) Copyright 2007-2008 | |
c9e798d3 | 3 | * Stelian Pop <stelian@popies.net> |
22ee6473 SG |
4 | * Lead Tech Design <www.leadtechdesign.com> |
5 | * | |
6 | * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES). | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
27 | #ifndef __CONFIG_H | |
28 | #define __CONFIG_H | |
29 | ||
5cfeec51 TP |
30 | #include <asm/hardware.h> |
31 | ||
425de62d | 32 | #define CONFIG_AT91_LEGACY |
5cfeec51 | 33 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ |
425de62d | 34 | |
22ee6473 | 35 | /* ARM asynchronous clock */ |
5cfeec51 TP |
36 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
37 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ | |
38 | #define CONFIG_SYS_HZ 1000 | |
39 | ||
40 | #define CONFIG_AT91SAM9M10G45EK | |
41 | #define CONFIG_AT91FAMILY | |
22ee6473 SG |
42 | #define CONFIG_ARCH_CPU_INIT |
43 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ | |
44 | ||
5cfeec51 TP |
45 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
46 | #define CONFIG_SETUP_MEMORY_TAGS | |
47 | #define CONFIG_INITRD_TAG | |
22ee6473 | 48 | #define CONFIG_SKIP_LOWLEVEL_INIT |
5cfeec51 TP |
49 | #define CONFIG_BOARD_EARLY_INIT_F |
50 | #define CONFIG_DISPLAY_CPUINFO | |
51 | ||
52 | /* general purpose I/O */ | |
53 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ | |
54 | #define CONFIG_AT91_GPIO | |
55 | #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ | |
56 | ||
57 | /* serial console */ | |
58 | #define CONFIG_ATMEL_USART | |
59 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
60 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
61 | ||
62 | /* | |
63 | * This needs to be defined for the OHCI code to work but it is defined as | |
64 | * ATMEL_ID_UHPHS in the CPU specific header files. | |
65 | */ | |
66 | #define ATMEL_ID_UHP ATMEL_ID_UHPHS | |
22ee6473 SG |
67 | |
68 | /* | |
5cfeec51 | 69 | * Specify the clock enable bit in the PMC_SCER register. |
22ee6473 | 70 | */ |
5cfeec51 | 71 | #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP |
22ee6473 SG |
72 | |
73 | /* LCD */ | |
5cfeec51 | 74 | #define CONFIG_LCD |
22ee6473 | 75 | #define LCD_BPP LCD_COLOR8 |
5cfeec51 | 76 | #define CONFIG_LCD_LOGO |
22ee6473 | 77 | #undef LCD_TEST_PATTERN |
5cfeec51 TP |
78 | #define CONFIG_LCD_INFO |
79 | #define CONFIG_LCD_INFO_BELOW_LOGO | |
80 | #define CONFIG_SYS_WHITE_ON_BLACK | |
81 | #define CONFIG_ATMEL_LCD | |
82 | #define CONFIG_ATMEL_LCD_RGB565 | |
83 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
22ee6473 SG |
84 | /* board specific(not enough SRAM) */ |
85 | #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 | |
86 | ||
87 | /* LED */ | |
88 | #define CONFIG_AT91_LED | |
89 | #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ | |
90 | #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ | |
91 | ||
92 | #define CONFIG_BOOTDELAY 3 | |
93 | ||
94 | /* | |
95 | * BOOTP options | |
96 | */ | |
5cfeec51 TP |
97 | #define CONFIG_BOOTP_BOOTFILESIZE |
98 | #define CONFIG_BOOTP_BOOTPATH | |
99 | #define CONFIG_BOOTP_GATEWAY | |
100 | #define CONFIG_BOOTP_HOSTNAME | |
22ee6473 SG |
101 | |
102 | /* | |
103 | * Command line configuration. | |
104 | */ | |
105 | #include <config_cmd_default.h> | |
106 | #undef CONFIG_CMD_BDI | |
107 | #undef CONFIG_CMD_FPGA | |
108 | #undef CONFIG_CMD_IMI | |
109 | #undef CONFIG_CMD_IMLS | |
110 | #undef CONFIG_CMD_AUTOSCRIPT | |
111 | #undef CONFIG_CMD_LOADS | |
112 | ||
5cfeec51 TP |
113 | #define CONFIG_CMD_PING |
114 | #define CONFIG_CMD_DHCP | |
115 | #define CONFIG_CMD_NAND | |
116 | #define CONFIG_CMD_USB | |
22ee6473 SG |
117 | |
118 | /* SDRAM */ | |
119 | #define CONFIG_NR_DRAM_BANKS 1 | |
5cfeec51 TP |
120 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 |
121 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 | |
22ee6473 | 122 | |
5cfeec51 TP |
123 | #define CONFIG_SYS_INIT_SP_ADDR \ |
124 | (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) | |
125 | ||
126 | /* No NOR flash */ | |
127 | #define CONFIG_SYS_NO_FLASH | |
22ee6473 SG |
128 | |
129 | /* NAND flash */ | |
130 | #ifdef CONFIG_CMD_NAND | |
22ee6473 SG |
131 | #define CONFIG_NAND_ATMEL |
132 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
5cfeec51 TP |
133 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
134 | #define CONFIG_SYS_NAND_DBW_8 | |
22ee6473 SG |
135 | /* our ALE is AD21 */ |
136 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
137 | /* our CLE is AD22 */ | |
138 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
139 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
140 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 | |
2eb99ca8 | 141 | |
22ee6473 SG |
142 | #endif |
143 | ||
144 | /* Ethernet */ | |
5cfeec51 TP |
145 | #define CONFIG_MACB |
146 | #define CONFIG_RMII | |
22ee6473 | 147 | #define CONFIG_NET_RETRY_COUNT 20 |
5cfeec51 | 148 | #define CONFIG_RESET_PHY_R |
22ee6473 SG |
149 | |
150 | /* USB */ | |
151 | #define CONFIG_USB_ATMEL | |
5cfeec51 TP |
152 | #define CONFIG_USB_OHCI_NEW |
153 | #define CONFIG_DOS_PARTITION | |
154 | #define CONFIG_SYS_USB_OHCI_CPU_INIT | |
155 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_HCI | |
156 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g45" | |
22ee6473 | 157 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
5cfeec51 | 158 | #define CONFIG_USB_STORAGE |
22ee6473 | 159 | |
5cfeec51 | 160 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
22ee6473 | 161 | |
5cfeec51 TP |
162 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
163 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 | |
22ee6473 | 164 | |
5cfeec51 TP |
165 | /* bootstrap + u-boot + env in nandflash */ |
166 | #define CONFIG_ENV_IS_IN_NAND | |
22ee6473 SG |
167 | #define CONFIG_ENV_OFFSET 0x60000 |
168 | #define CONFIG_ENV_OFFSET_REDUND 0x80000 | |
5cfeec51 TP |
169 | #define CONFIG_ENV_SIZE 0x20000 |
170 | ||
171 | #define CONFIG_BOOTCOMMAND "nand read 0x70000000 0x100000 0x200000;" \ | |
172 | "bootm 0x70000000" | |
173 | #define CONFIG_BOOTARGS \ | |
174 | "console=ttyS0,115200 earlyprintk " \ | |
175 | "root=/dev/mtdblock5 " \ | |
176 | "mtdparts=atmel_nand:128k(bootstrap)ro," \ | |
177 | "256k(uboot)ro,128k(env1)ro,128k(env2)ro," \ | |
178 | "2M@1M(linux),-(root) " \ | |
179 | "rw rootfstype=jffs2" | |
180 | ||
181 | #define CONFIG_BAUDRATE 115200 | |
22ee6473 SG |
182 | #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
183 | ||
184 | #define CONFIG_SYS_PROMPT "U-Boot> " | |
185 | #define CONFIG_SYS_CBSIZE 256 | |
186 | #define CONFIG_SYS_MAXARGS 16 | |
187 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
5cfeec51 TP |
188 | #define CONFIG_SYS_LONGHELP |
189 | #define CONFIG_CMDLINE_EDITING | |
22ee6473 SG |
190 | #define CONFIG_AUTO_COMPLETE |
191 | #define CONFIG_SYS_HUSH_PARSER | |
192 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
193 | ||
22ee6473 SG |
194 | /* |
195 | * Size of malloc() pool | |
196 | */ | |
197 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) | |
22ee6473 SG |
198 | |
199 | #define CONFIG_STACKSIZE (32*1024) /* regular stack */ | |
200 | ||
201 | #ifdef CONFIG_USE_IRQ | |
202 | #error CONFIG_USE_IRQ not supported | |
203 | #endif | |
204 | ||
205 | #endif |