projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| f7fa2f37 BS |
1 | /* |
| 2 | * Copyright (C) 2012 Atmel Corporation | |
| 3 | * | |
| 4 | * Configuation settings for the AT91SAM9X5EK board. | |
| 5 | * | |
| 1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
| f7fa2f37 BS |
7 | */ |
| 8 | ||
| 9 | #ifndef __CONFIG_H__ | |
| 10 | #define __CONFIG_H__ | |
| 11 | ||
| 12 | #include <asm/hardware.h> | |
| 13 | ||
| 77461a65 BS |
14 | #define CONFIG_SYS_TEXT_BASE 0x26f00000 |
| 15 | ||
| f7fa2f37 BS |
16 | /* ARM asynchronous clock */ |
| 17 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 | |
| 18 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ | |
| f7fa2f37 BS |
19 | |
| 20 | #define CONFIG_AT91SAM9X5EK | |
| f7fa2f37 | 21 | |
| f7fa2f37 BS |
22 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 23 | #define CONFIG_SETUP_MEMORY_TAGS | |
| 24 | #define CONFIG_INITRD_TAG | |
| 25 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
| 26 | #define CONFIG_BOARD_EARLY_INIT_F | |
| 27 | #define CONFIG_DISPLAY_CPUINFO | |
| 28 | ||
| f9129fe3 | 29 | #define CONFIG_CMD_BOOTZ |
| dc3e30ba BS |
30 | #define CONFIG_OF_LIBFDT |
| 31 | ||
| 49527592 BS |
32 | #define CONFIG_SYS_GENERIC_BOARD |
| 33 | ||
| f7fa2f37 BS |
34 | /* general purpose I/O */ |
| 35 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ | |
| 36 | #define CONFIG_AT91_GPIO | |
| 37 | ||
| 38 | /* serial console */ | |
| 39 | #define CONFIG_ATMEL_USART | |
| 40 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
| 41 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
| 42 | ||
| 43 | /* LCD */ | |
| 44 | #define CONFIG_LCD | |
| 45 | #define LCD_BPP LCD_COLOR16 | |
| 46 | #define LCD_OUTPUT_BPP 24 | |
| 47 | #define CONFIG_LCD_LOGO | |
| f7fa2f37 BS |
48 | #define CONFIG_LCD_INFO |
| 49 | #define CONFIG_LCD_INFO_BELOW_LOGO | |
| 50 | #define CONFIG_SYS_WHITE_ON_BLACK | |
| 51 | #define CONFIG_ATMEL_HLCD | |
| 52 | #define CONFIG_ATMEL_LCD_RGB565 | |
| 53 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
| 54 | ||
| 55 | #define CONFIG_BOOTDELAY 3 | |
| 56 | ||
| 57 | /* | |
| 58 | * BOOTP options | |
| 59 | */ | |
| 60 | #define CONFIG_BOOTP_BOOTFILESIZE | |
| 61 | #define CONFIG_BOOTP_BOOTPATH | |
| 62 | #define CONFIG_BOOTP_GATEWAY | |
| 63 | #define CONFIG_BOOTP_HOSTNAME | |
| 64 | ||
| d51a2a2d BS |
65 | /* no NOR flash */ |
| 66 | #define CONFIG_SYS_NO_FLASH | |
| 67 | ||
| f7fa2f37 BS |
68 | /* |
| 69 | * Command line configuration. | |
| 70 | */ | |
| f7fa2f37 BS |
71 | #define CONFIG_CMD_PING |
| 72 | #define CONFIG_CMD_DHCP | |
| 73 | #define CONFIG_CMD_NAND | |
| 1d7442e6 | 74 | #define CONFIG_CMD_SF |
| 3a49cd7e | 75 | #define CONFIG_CMD_MMC |
| 419fba0c | 76 | #define CONFIG_CMD_FAT |
| b030e731 RG |
77 | #define CONFIG_CMD_USB |
| 78 | ||
| 79 | /* | |
| 80 | * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0) | |
| 81 | * NB: in this case, USB 1.1 devices won't be recognized. | |
| 82 | */ | |
| 83 | ||
| f7fa2f37 BS |
84 | |
| 85 | /* SDRAM */ | |
| 86 | #define CONFIG_NR_DRAM_BANKS 1 | |
| 87 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 | |
| 88 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ | |
| 89 | ||
| 90 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
| 91 | (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) | |
| 92 | ||
| 93 | /* DataFlash */ | |
| 1d7442e6 BS |
94 | #ifdef CONFIG_CMD_SF |
| 95 | #define CONFIG_ATMEL_SPI | |
| f7fa2f37 | 96 | #define CONFIG_SPI_FLASH_ATMEL |
| 1d7442e6 | 97 | #define CONFIG_SF_DEFAULT_SPEED 30000000 |
| f7fa2f37 BS |
98 | #endif |
| 99 | ||
| f7fa2f37 BS |
100 | /* NAND flash */ |
| 101 | #ifdef CONFIG_CMD_NAND | |
| 102 | #define CONFIG_NAND_ATMEL | |
| 103 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
| 104 | #define CONFIG_SYS_NAND_BASE 0x40000000 | |
| 105 | #define CONFIG_SYS_NAND_DBW_8 1 | |
| 106 | /* our ALE is AD21 */ | |
| 107 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
| 108 | /* our CLE is AD22 */ | |
| 109 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
| 110 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 | |
| 111 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 | |
| 112 | ||
| df95321c WJ |
113 | /* PMECC & PMERRLOC */ |
| 114 | #define CONFIG_ATMEL_NAND_HWECC 1 | |
| 115 | #define CONFIG_ATMEL_NAND_HW_PMECC 1 | |
| 116 | #define CONFIG_PMECC_CAP 2 | |
| 117 | #define CONFIG_PMECC_SECTOR_SIZE 512 | |
| df95321c | 118 | |
| ce76f0aa BS |
119 | #define CONFIG_CMD_NAND_TRIMFFS |
| 120 | ||
| f7fa2f37 BS |
121 | #define CONFIG_MTD_DEVICE |
| 122 | #define CONFIG_CMD_MTDPARTS | |
| 123 | #define CONFIG_MTD_PARTITIONS | |
| 124 | #define CONFIG_RBTREE | |
| 125 | #define CONFIG_LZO | |
| 126 | #define CONFIG_CMD_UBI | |
| 127 | #define CONFIG_CMD_UBIFS | |
| 128 | #endif | |
| 129 | ||
| 3a49cd7e WJ |
130 | /* MMC */ |
| 131 | #ifdef CONFIG_CMD_MMC | |
| 132 | #define CONFIG_MMC | |
| 3a49cd7e WJ |
133 | #define CONFIG_GENERIC_MMC |
| 134 | #define CONFIG_GENERIC_ATMEL_MCI | |
| 419fba0c RG |
135 | #endif |
| 136 | ||
| 137 | /* FAT */ | |
| 138 | #ifdef CONFIG_CMD_FAT | |
| 3a49cd7e WJ |
139 | #define CONFIG_DOS_PARTITION |
| 140 | #endif | |
| 141 | ||
| f7fa2f37 BS |
142 | /* Ethernet */ |
| 143 | #define CONFIG_MACB | |
| 144 | #define CONFIG_RMII | |
| 145 | #define CONFIG_NET_RETRY_COUNT 20 | |
| 146 | #define CONFIG_MACB_SEARCH_PHY | |
| 147 | ||
| b030e731 RG |
148 | /* USB */ |
| 149 | #ifdef CONFIG_CMD_USB | |
| 150 | #ifdef CONFIG_USB_EHCI | |
| 151 | #define CONFIG_USB_EHCI_ATMEL | |
| 152 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 | |
| 153 | #else | |
| dcd2f1a0 BS |
154 | #define CONFIG_USB_ATMEL |
| 155 | #define CONFIG_USB_ATMEL_CLK_SEL_UPLL | |
| b030e731 RG |
156 | #define CONFIG_USB_OHCI_NEW |
| 157 | #define CONFIG_SYS_USB_OHCI_CPU_INIT | |
| 158 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI | |
| 159 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5" | |
| 160 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3 | |
| 161 | #endif | |
| b030e731 RG |
162 | #define CONFIG_USB_STORAGE |
| 163 | #endif | |
| 164 | ||
| f7fa2f37 BS |
165 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
| 166 | ||
| 167 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
| 168 | #define CONFIG_SYS_MEMTEST_END 0x26e00000 | |
| 169 | ||
| 170 | #ifdef CONFIG_SYS_USE_NANDFLASH | |
| 171 | /* bootstrap + u-boot + env + linux in nandflash */ | |
| 172 | #define CONFIG_ENV_IS_IN_NAND | |
| 173 | #define CONFIG_ENV_OFFSET 0xc0000 | |
| 174 | #define CONFIG_ENV_OFFSET_REDUND 0x100000 | |
| 175 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ | |
| 176 | #define CONFIG_BOOTCOMMAND "nand read " \ | |
| 177 | "0x22000000 0x200000 0x300000; " \ | |
| 178 | "bootm 0x22000000" | |
| b7e3129e | 179 | #elif defined(CONFIG_SYS_USE_SPIFLASH) |
| 1d7442e6 BS |
180 | /* bootstrap + u-boot + env + linux in spi flash */ |
| 181 | #define CONFIG_ENV_IS_IN_SPI_FLASH | |
| 182 | #define CONFIG_ENV_OFFSET 0x5000 | |
| 183 | #define CONFIG_ENV_SIZE 0x3000 | |
| 184 | #define CONFIG_ENV_SECT_SIZE 0x1000 | |
| 185 | #define CONFIG_ENV_SPI_MAX_HZ 30000000 | |
| 186 | #define CONFIG_BOOTCOMMAND "sf probe 0; " \ | |
| 187 | "sf read 0x22000000 0x100000 0x300000; " \ | |
| 188 | "bootm 0x22000000" | |
| 961ffc77 BS |
189 | #elif defined(CONFIG_SYS_USE_DATAFLASH) |
| 190 | /* bootstrap + u-boot + env + linux in data flash */ | |
| 191 | #define CONFIG_ENV_IS_IN_SPI_FLASH | |
| 192 | #define CONFIG_ENV_OFFSET 0x4200 | |
| 193 | #define CONFIG_ENV_SIZE 0x4200 | |
| 194 | #define CONFIG_ENV_SECT_SIZE 0x210 | |
| 195 | #define CONFIG_ENV_SPI_MAX_HZ 30000000 | |
| 196 | #define CONFIG_BOOTCOMMAND "sf probe 0; " \ | |
| 197 | "sf read 0x22000000 0x84000 0x294000; " \ | |
| 198 | "bootm 0x22000000" | |
| b7e3129e WJ |
199 | #else /* CONFIG_SYS_USE_MMC */ |
| 200 | /* bootstrap + u-boot + env + linux in mmc */ | |
| 26961772 WJ |
201 | #define CONFIG_ENV_IS_IN_FAT |
| 202 | #define CONFIG_FAT_WRITE | |
| 203 | #define FAT_ENV_INTERFACE "mmc" | |
| 204 | #define FAT_ENV_FILE "uboot.env" | |
| 205 | #define FAT_ENV_DEVICE_AND_PART "0" | |
| 206 | #define CONFIG_ENV_SIZE 0x4000 | |
| f7fa2f37 BS |
207 | #endif |
| 208 | ||
| b7e3129e WJ |
209 | #ifdef CONFIG_SYS_USE_MMC |
| 210 | #define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \ | |
| 211 | "mtdparts=atmel_nand:" \ | |
| 212 | "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \ | |
| 213 | "root=/dev/mmcblk0p2 " \ | |
| 214 | "rw rootfstype=ext4 rootwait" | |
| 215 | #else | |
| 0c58cfa9 BS |
216 | #define CONFIG_BOOTARGS \ |
| 217 | "console=ttyS0,115200 earlyprintk " \ | |
| 218 | "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ | |
| 219 | "256k(env),256k(env_redundant),256k(spare)," \ | |
| 220 | "512k(dtb),6M(kernel)ro,-(rootfs) " \ | |
| 221 | "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw" | |
| b7e3129e | 222 | #endif |
| f7fa2f37 BS |
223 | |
| 224 | #define CONFIG_BAUDRATE 115200 | |
| 225 | ||
| f7fa2f37 BS |
226 | #define CONFIG_SYS_CBSIZE 256 |
| 227 | #define CONFIG_SYS_MAXARGS 16 | |
| 228 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \ | |
| 229 | + 16) | |
| 230 | #define CONFIG_SYS_LONGHELP | |
| 231 | #define CONFIG_CMDLINE_EDITING | |
| 232 | #define CONFIG_AUTO_COMPLETE | |
| 233 | #define CONFIG_SYS_HUSH_PARSER | |
| 234 | ||
| 235 | /* | |
| 236 | * Size of malloc() pool | |
| 237 | */ | |
| 238 | #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) | |
| 239 | ||
| d85e8914 BS |
240 | /* SPL */ |
| 241 | #define CONFIG_SPL_FRAMEWORK | |
| 242 | #define CONFIG_SPL_TEXT_BASE 0x300000 | |
| 243 | #define CONFIG_SPL_MAX_SIZE 0x6000 | |
| 244 | #define CONFIG_SPL_STACK 0x308000 | |
| 245 | ||
| 246 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 | |
| 247 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 | |
| 248 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 | |
| 249 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 | |
| 250 | ||
| 251 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
| 252 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
| 253 | #define CONFIG_SPL_GPIO_SUPPORT | |
| 254 | #define CONFIG_SPL_SERIAL_SUPPORT | |
| 255 | ||
| 256 | #define CONFIG_SPL_BOARD_INIT | |
| 257 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) | |
| 258 | ||
| 259 | #define CONFIG_SYS_MASTER_CLOCK 132096000 | |
| 260 | #define CONFIG_SYS_AT91_PLLA 0x20c73f03 | |
| 261 | #define CONFIG_SYS_MCKR 0x1301 | |
| 262 | #define CONFIG_SYS_MCKR_CSS 0x1302 | |
| 263 | ||
| 264 | #define ATMEL_BASE_MPDDRC ATMEL_BASE_DDRSDRC | |
| 265 | ||
| 266 | #ifdef CONFIG_SYS_USE_MMC | |
| 267 | #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | |
| 268 | #define CONFIG_SPL_MMC_SUPPORT | |
| 269 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 | |
| 270 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 | |
| 271 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 | |
| 272 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" | |
| 273 | #define CONFIG_SPL_FAT_SUPPORT | |
| 274 | #define CONFIG_SPL_LIBDISK_SUPPORT | |
| 275 | ||
| 276 | #elif CONFIG_SYS_USE_NANDFLASH | |
| 277 | #define CONFIG_SPL_NAND_SUPPORT | |
| 278 | #define CONFIG_SPL_NAND_DRIVERS | |
| 279 | #define CONFIG_SPL_NAND_BASE | |
| 280 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 | |
| 281 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
| 282 | #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 | |
| 283 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 | |
| 284 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
| 285 | #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 | |
| 286 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 | |
| 287 | #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER | |
| 288 | ||
| 289 | #elif CONFIG_SYS_USE_SPIFLASH | |
| 290 | #define CONFIG_SPL_SPI_SUPPORT | |
| 291 | #define CONFIG_SPL_SPI_FLASH_SUPPORT | |
| 292 | #define CONFIG_SPL_SPI_LOAD | |
| 293 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 | |
| 294 | ||
| 295 | #endif | |
| 296 | ||
| f7fa2f37 | 297 | #endif |