[thirdparty/u-boot.git] / include / configs / at91sam9x5ek.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2012 Atmel Corporation
 *
 * Configuation settings for the AT91SAM9X5EK board.
 */

#ifndef __CONFIG_H__
#define __CONFIG_H__

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768
#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE

/*
 * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
 * NB: in this case, USB 1.1 devices won't be recognized.
 */

/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_SDRAM_SIZE		0x08000000	/* 128 megs */

#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_DBW_8		1
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5
#endif

/* USB */
#ifdef CONFIG_CMD_USB
#ifndef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9x5"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
#endif
#endif

#ifdef CONFIG_NAND_BOOT
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_BOOTCOMMAND	"nand read " \
				"0x22000000 0x200000 0x600000; " \
				"nand read 0x21000000 0x180000 0x20000; " \
				"bootz 0x22000000 - 0x21000000"
#elif defined(CONFIG_SPI_BOOT)
/* bootstrap + u-boot + env + linux in spi flash */
#define CONFIG_BOOTCOMMAND	"sf probe 0; " \
				"sf read 0x22000000 0x100000 0x300000; " \
				"bootm 0x22000000"
#elif defined(CONFIG_SYS_USE_DATAFLASH)
/* bootstrap + u-boot + env + linux in data flash */
#define CONFIG_BOOTCOMMAND	"sf probe 0; " \
				"sf read 0x22000000 0x84000 0x294000; " \
				"bootm 0x22000000"
#endif

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(512 * 1024 + 0x1000)

/* SPL */
#define CONFIG_SPL_MAX_SIZE		0x6000
#define CONFIG_SPL_STACK		0x308000

#define CONFIG_SPL_BSS_START_ADDR	0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000

#define CONFIG_SYS_MONITOR_LEN		(512 << 10)

#define CONFIG_SYS_MASTER_CLOCK		132096000
#define CONFIG_SYS_AT91_PLLA		0x20c73f03
#define CONFIG_SYS_MCKR			0x1301
#define CONFIG_SYS_MCKR_CSS		0x1302

#ifdef CONFIG_SD_BOOT
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
#endif
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0

#endif
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
f7fa2f37 BS	2	/*
	3	* Copyright (C) 2012 Atmel Corporation
	4	*
	5	* Configuation settings for the AT91SAM9X5EK board.
f7fa2f37 BS	6	*/
	7
	8	#ifndef __CONFIG_H__
	9	#define __CONFIG_H__
	10
f7fa2f37 BS	11	/* ARM asynchronous clock */
	12	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
	13	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
f7fa2f37	14
f7fa2f37 BS	15	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	16	#define CONFIG_SETUP_MEMORY_TAGS
	17	#define CONFIG_INITRD_TAG
f7fa2f37 BS	18
	19	/* general purpose I/O */
	20	#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
f7fa2f37	21
f7fa2f37 BS	22	/*
	23	* BOOTP options
	24	*/
	25	#define CONFIG_BOOTP_BOOTFILESIZE
f7fa2f37	26
b030e731	27	/*
8850c5d5	28	* define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
b030e731 RG	29	* NB: in this case, USB 1.1 devices won't be recognized.
	30	*/
	31
f7fa2f37	32	/* SDRAM */
f7fa2f37 BS	33	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	34	#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
	35
	36	#define CONFIG_SYS_INIT_SP_ADDR \
74631b69	37	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
f7fa2f37 BS	38
f7fa2f37 BS	39	/* DataFlash */
f7fa2f37	40
f7fa2f37 BS	41	/* NAND flash */
f7fa2f37 BS	42	#ifdef CONFIG_CMD_NAND
f7fa2f37 BS	43	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	44	#define CONFIG_SYS_NAND_BASE 0x40000000
	45	#define CONFIG_SYS_NAND_DBW_8 1
	46	/* our ALE is AD21 */
	47	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	48	/* our CLE is AD22 */
	49	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	50	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
	51	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
8f1a80e9 TR	52	#endif
8f1a80e9 TR	53
b030e731 RG	54	/* USB */
b030e731 RG	55	#ifdef CONFIG_CMD_USB
8850c5d5	56	#ifndef CONFIG_USB_EHCI_HCD
dcd2f1a0 BS	57	#define CONFIG_USB_ATMEL
dcd2f1a0 BS	58	#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
b030e731 RG	59	#define CONFIG_USB_OHCI_NEW
	60	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	61	#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
	62	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5"
	63	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
	64	#endif
b030e731 RG	65	#endif
b030e731 RG	66
5541543f	67	#ifdef CONFIG_NAND_BOOT
f7fa2f37	68	/* bootstrap + u-boot + env + linux in nandflash */
f7fa2f37	69	#define CONFIG_BOOTCOMMAND "nand read " \
6b4dba48 EH	70	"0x22000000 0x200000 0x600000; " \
	71	"nand read 0x21000000 0x180000 0x20000; " \
	72	"bootz 0x22000000 - 0x21000000"
5541543f	73	#elif defined(CONFIG_SPI_BOOT)
1d7442e6	74	/* bootstrap + u-boot + env + linux in spi flash */
1d7442e6 BS	75	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
	76	"sf read 0x22000000 0x100000 0x300000; " \
	77	"bootm 0x22000000"
961ffc77 BS	78	#elif defined(CONFIG_SYS_USE_DATAFLASH)
961ffc77 BS	79	/* bootstrap + u-boot + env + linux in data flash */
961ffc77 BS	80	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
	81	"sf read 0x22000000 0x84000 0x294000; " \
	82	"bootm 0x22000000"
f7fa2f37 BS	83	#endif
f7fa2f37 BS	84
f7fa2f37 BS	85	/*
	86	* Size of malloc() pool
	87	*/
	88	#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
	89
d85e8914	90	/* SPL */
d85e8914 BS	91	#define CONFIG_SPL_MAX_SIZE 0x6000
	92	#define CONFIG_SPL_STACK 0x308000
	93
	94	#define CONFIG_SPL_BSS_START_ADDR 0x20000000
	95	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
	96	#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
	97	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
	98
d85e8914 BS	99	#define CONFIG_SYS_MONITOR_LEN (512 << 10)
	100
	101	#define CONFIG_SYS_MASTER_CLOCK 132096000
	102	#define CONFIG_SYS_AT91_PLLA 0x20c73f03
	103	#define CONFIG_SYS_MCKR 0x1301
	104	#define CONFIG_SYS_MCKR_CSS 0x1302
	105
5541543f	106	#ifdef CONFIG_SD_BOOT
d85e8914	107	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
5541543f	108	#endif
d85e8914 BS	109	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
	110	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	111	#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
	112	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	113	#define CONFIG_SYS_NAND_OOBSIZE 64
	114	#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
	115	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
d85e8914	116
f7fa2f37	117	#endif