[people/ms/u-boot.git] / include / configs / bamboo.h

/*
 * (C) Copyright 2005
 * Stefan Roese, DENX Software Engineering, sr@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/************************************************************************
 * bamboo.h - configuration for BAMBOO board
 ***********************************************************************/
#ifndef __CONFIG_H
#define __CONFIG_H

/*-----------------------------------------------------------------------
 * High Level Configuration Options
 *----------------------------------------------------------------------*/
#define CONFIG_BAMBOO		1	/* Board is BAMBOO              */
#define CONFIG_440_EP		1	/* Specific PPC440EP support    */

#define CONFIG_4xx		1	/* ... PPC4xx family	        */
#define CONFIG_BOARD_EARLY_INIT_F 	1   /* Call board_early_init_f	*/
#define CONFIG_SYS_CLK_FREQ	33333333    /* external freq to pll	*/

/*-----------------------------------------------------------------------
 * Base addresses -- Note these are effective addresses where the
 * actual resources get mapped (not physical addresses)
 *----------------------------------------------------------------------*/
#define CFG_MONITOR_LEN		(512 * 1024)	/* Reserve 512 kB for Monitor	*/
#define CFG_MALLOC_LEN		(256 * 1024)	/* Reserve 256 kB for malloc()	*/
#define CFG_MONITOR_BASE	(-CFG_MONITOR_LEN)
#define CFG_SDRAM_BASE	        0x00000000	    /* _must_ be 0	*/
#define CFG_FLASH_BASE	        0xfff00000	    /* start of FLASH	*/
#define CFG_PCI_MEMBASE	        0xa0000000	    /* mapped pci memory*/
#define CFG_PCI_MEMBASE1        CFG_PCI_MEMBASE  + 0x10000000
#define CFG_PCI_MEMBASE2        CFG_PCI_MEMBASE1 + 0x10000000
#define CFG_PCI_MEMBASE3        CFG_PCI_MEMBASE2 + 0x10000000

/*Don't change either of these*/
#define CFG_PERIPHERAL_BASE     0xef600000	    /* internal peripherals*/
#define CFG_PCI_BASE	        0xe0000000	    /* internal PCI regs*/
/*Don't change either of these*/

#define CFG_USB_DEVICE          0x50000000
#define CFG_NVRAM_BASE_ADDR     0x80000000
#define CFG_BCSR_BASE	        (CFG_NVRAM_BASE_ADDR | 0x2000)

/*-----------------------------------------------------------------------
 * Initial RAM & stack pointer (placed in SDRAM)
 *----------------------------------------------------------------------*/
#define CFG_INIT_RAM_ADDR	0xf0000000		/* DCache       */
#define CFG_INIT_RAM_END	0x1000
#define CFG_GBL_DATA_SIZE	256		    	/* num bytes initial data	*/
#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET

/*-----------------------------------------------------------------------
 * Serial Port
 *----------------------------------------------------------------------*/
#define CFG_EXT_SERIAL_CLOCK	11059200 /* use external 11.059MHz clk	*/
#define CONFIG_BAUDRATE		115200
#define CONFIG_SERIAL_MULTI     1
/* define this if you want console on UART1 */
#undef CONFIG_UART1_CONSOLE

#define CFG_BAUDRATE_TABLE  \
    {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}

/*-----------------------------------------------------------------------
 * NVRAM/RTC
 *
 * NOTE: The RTC registers are located at 0x7FFF0 - 0x7FFFF
 * The DS1558 code assumes this condition
 *
 *----------------------------------------------------------------------*/
#define CFG_NVRAM_SIZE	    (0x2000 - 0x10) /* NVRAM size(8k)- RTC regs */
#define CONFIG_RTC_DS1556	1		         /* DS1556 RTC		*/

/*-----------------------------------------------------------------------
 * Environment
 *----------------------------------------------------------------------*/
/*
 * Define here the location of the environment variables (FLASH or EEPROM).
 * Note: DENX encourages to use redundant environment in FLASH.
 */
#if 1
#define CFG_ENV_IS_IN_FLASH     1	/* use FLASH for environment vars	*/
#else
#define CFG_ENV_IS_IN_EEPROM	1	/* use EEPROM for environment vars	*/
#endif

/*-----------------------------------------------------------------------
 * FLASH related
 *----------------------------------------------------------------------*/
#define CFG_MAX_FLASH_BANKS	3		    /* number of banks	    */
#define CFG_MAX_FLASH_SECT	256		    /* sectors per device   */

#undef	CFG_FLASH_CHECKSUM
#define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
#define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/

#define CFG_FLASH_ADDR0         0x555
#define CFG_FLASH_ADDR1         0x2aa
#define CFG_FLASH_WORD_SIZE     unsigned char

#define CFG_FLASH_2ND_16BIT_DEV 1         /* bamboo has 8 and 16bit device     */
#define CFG_FLASH_2ND_ADDR      0x87800000  /* bamboo has 8 and 16bit device     */

#ifdef CFG_ENV_IS_IN_FLASH
#define CFG_ENV_SECT_SIZE	0x10000 	/* size of one complete sector	*/
#define CFG_ENV_ADDR		(CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
#define	CFG_ENV_SIZE		0x4000	/* Total Size of Environment Sector	*/

#if 0 /* test-only */
/* Address and size of Redundant Environment Sector	*/
#define CFG_ENV_ADDR_REDUND	(CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND	(CFG_ENV_SIZE)
#endif
#endif /* CFG_ENV_IS_IN_FLASH */

/*-----------------------------------------------------------------------
 * DDR SDRAM
 *----------------------------------------------------------------------------- */
#define CONFIG_SPD_EEPROM               /* Use SPD EEPROM for setup             */
#define SPD_EEPROM_ADDRESS      {0x50,0x51}	/* SPD i2c spd addresses	*/
#define CFG_SDRAM_ONBOARD_SIZE  (64 << 20) /* Bamboo has onboard and DIMM-slots!*/

/*-----------------------------------------------------------------------
 * I2C
 *----------------------------------------------------------------------*/
#define CONFIG_HARD_I2C		1	    /* I2C with hardware support	*/
#undef	CONFIG_SOFT_I2C			    /* I2C bit-banged		*/
#define CFG_I2C_SPEED		400000	/* I2C speed and slave address	*/
#define CFG_I2C_SLAVE		0x7F

#define CFG_I2C_MULTI_EEPROMS
#define CFG_I2C_EEPROM_ADDR	(0xa8>>1)
#define CFG_I2C_EEPROM_ADDR_LEN 1
#define CFG_EEPROM_PAGE_WRITE_ENABLE
#define CFG_EEPROM_PAGE_WRITE_BITS 3
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10

#ifdef CFG_ENV_IS_IN_EEPROM
#define CFG_ENV_SIZE		0x200	    /* Size of Environment vars */
#define CFG_ENV_OFFSET		0x0
#endif /* CFG_ENV_IS_IN_EEPROM */

#define CONFIG_PREBOOT	"echo;"	\
	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	"echo"

#undef	CONFIG_BOOTARGS

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"hostname=bamboo\0"						\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=$(serverip):$(rootpath)\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addip=setenv bootargs $(bootargs) "				\
		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"	\
		":$(hostname):$(netdev):off panic=1\0"			\
	"addtty=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0"\
	"flash_nfs=run nfsargs addip addtty;"				\
		"bootm $(kernel_addr)\0"				\
	"flash_self=run ramargs addip addtty;"				\
		"bootm $(kernel_addr) $(ramdisk_addr)\0"		\
	"net_nfs=tftp 200000 $(bootfile);run nfsargs addip addtty;"     \
	        "bootm\0"						\
	"rootpath=/opt/eldk/ppc_4xx\0"					\
	"bootfile=/tftpboot/bamboo/uImage\0"				\
	"kernel_addr=fff00000\0"					\
	"ramdisk_addr=fff10000\0"					\
	"load=tftp 100000 /tftpboot/bamboo/u-boot.bin\0"		\
	"update=protect off fff80000 ffffffff;era fff80000 ffffffff;"	\
		"cp.b 100000 fff80000 80000;"			        \
		"setenv filesize;saveenv\0"				\
	"upd=run load;run update\0"					\
	""
#define CONFIG_BOOTCOMMAND	"run flash_self"

#if 0
#define CONFIG_BOOTDELAY	-1	/* autoboot disabled		*/
#else
#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
#endif

#define CONFIG_BAUDRATE		115200

#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
#define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/

#define CONFIG_MII		1	/* MII PHY management		*/
#define CONFIG_NET_MULTI        1       /* required for netconsole      */
#define CONFIG_PHY_ADDR		0	/* PHY address, See schematics	*/
#define CONFIG_PHY1_ADDR        1
#define CONFIG_HAS_ETH1		1	/* add support for "eth1addr"	*/
#define CONFIG_NO_PHY_RESET     1       /* no PHY reset on bamboo!!!    */

#define CFG_RX_ETH_BUFFER	32	/* Number of ethernet rx buffers & descriptors */

/* Partitions */
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_ISO_PARTITION

#ifdef CONFIG_440_EP
/* USB */
#define CONFIG_USB_OHCI
#define CONFIG_USB_STORAGE

/*Comment this out to enable USB 1.1 device*/
#define USB_2_0_DEVICE
#endif /*CONFIG_440_EP*/

#define CONFIG_COMMANDS	       (CONFIG_CMD_DFL	| \
				CFG_CMD_ASKENV	| \
				CFG_CMD_DATE	| \
				CFG_CMD_DHCP	| \
				CFG_CMD_DIAG	| \
				CFG_CMD_ELF	| \
				CFG_CMD_I2C	| \
				CFG_CMD_IRQ	| \
				CFG_CMD_MII	| \
				CFG_CMD_NET	| \
				CFG_CMD_NFS	| \
				CFG_CMD_PCI	| \
				CFG_CMD_PING	| \
				CFG_CMD_REGINFO	| \
				CFG_CMD_SDRAM	| \
				CFG_CMD_USB	| \
				CFG_CMD_SNTP	)

/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>

/*
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP			/* undef to save memory		*/
#define CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/
#else
#define CFG_CBSIZE	256		/* Console I/O Buffer Size	*/
#endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS	16		/* max number of command args	*/
#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0x0400000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/

#define CFG_LOAD_ADDR		0x100000	/* default load address */
#define CFG_EXTBDINFO		    1	/* To use extended board_into (bd_t) */
#define CONFIG_LYNXKDI          1   /* support kdi files */

#define CFG_HZ		1000		/* decrementer freq: 1 ms ticks */

/*-----------------------------------------------------------------------
 * PCI stuff
 *-----------------------------------------------------------------------
 */
/* General PCI */
#define CONFIG_PCI			            /* include pci support	        */
#undef  CONFIG_PCI_PNP			        /* do (not) pci plug-and-play         */
#define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
#define CFG_PCI_TARGBASE    0x80000000  /* PCIaddr mapped to CFG_PCI_MEMBASE */

/* Board-specific PCI */
#define CFG_PCI_PRE_INIT                /* enable board pci_pre_init()  */
#define CFG_PCI_TARGET_INIT
#define CFG_PCI_MASTER_INIT

#define CFG_PCI_SUBSYS_VENDORID 0x1014  /* IBM */
#define CFG_PCI_SUBSYS_ID 0xcafe        /* Whatever */

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */

/*-----------------------------------------------------------------------
 * Cache Configuration
 */
#define CFG_DCACHE_SIZE		32768	/* For IBM 440 CPUs			*/
#define CFG_CACHELINE_SIZE	32	/* ...			*/
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
#endif

/*
 * Internal Definitions
 *
 * Boot Flags
 */
#define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
#define BOOTFLAG_WARM	0x02		/* Software reboot			*/

#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */
#endif
#endif	/* __CONFIG_H */
Commit	Line	Data
8a316c9b SR	1	/*
	2	* (C) Copyright 2005
	3	* Stefan Roese, DENX Software Engineering, sr@denx.de.
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	/************************************************************************
	25	* bamboo.h - configuration for BAMBOO board
	26	***********************************************************************/
	27	#ifndef __CONFIG_H
	28	#define __CONFIG_H
	29
	30	/*-----------------------------------------------------------------------
	31	* High Level Configuration Options
	32	----------------------------------------------------------------------/
17f50f22 SR	33	#define CONFIG_BAMBOO 1 /* Board is BAMBOO */
17f50f22 SR	34	#define CONFIG_440_EP 1 /* Specific PPC440EP support */
8a316c9b	35
17f50f22 SR	36	#define CONFIG_4xx 1 /* ... PPC4xx family */
17f50f22 SR	37	#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
8a316c9b SR	38	#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
	39
	40	/*-----------------------------------------------------------------------
	41	* Base addresses -- Note these are effective addresses where the
	42	* actual resources get mapped (not physical addresses)
	43	----------------------------------------------------------------------/
17f50f22 SR	44	#define CFG_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
	45	#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
	46	#define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
	47	#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
	48	#define CFG_FLASH_BASE 0xfff00000 /* start of FLASH */
	49	#define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/
	50	#define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
	51	#define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
	52	#define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
8a316c9b SR	53
8a316c9b SR	54	/Don't change either of these/
17f50f22 SR	55	#define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals*/
17f50f22 SR	56	#define CFG_PCI_BASE 0xe0000000 /* internal PCI regs*/
8a316c9b SR	57	/Don't change either of these/
8a316c9b SR	58
17f50f22 SR	59	#define CFG_USB_DEVICE 0x50000000
	60	#define CFG_NVRAM_BASE_ADDR 0x80000000
	61	#define CFG_BCSR_BASE (CFG_NVRAM_BASE_ADDR \| 0x2000)
8a316c9b SR	62
	63	/*-----------------------------------------------------------------------
	64	* Initial RAM & stack pointer (placed in SDRAM)
	65	----------------------------------------------------------------------/
17f50f22 SR	66	#define CFG_INIT_RAM_ADDR 0xf0000000 /* DCache */
	67	#define CFG_INIT_RAM_END 0x1000
	68	#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
8a316c9b SR	69	#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
	70	#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
	71
8a316c9b SR	72	/*-----------------------------------------------------------------------
	73	* Serial Port
	74	----------------------------------------------------------------------/
	75	#define CFG_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
095b8a37	76	#define CONFIG_BAUDRATE 115200
17f50f22 SR	77	#define CONFIG_SERIAL_MULTI 1
17f50f22 SR	78	/* define this if you want console on UART1 */
8a316c9b SR	79	#undef CONFIG_UART1_CONSOLE
	80
	81	#define CFG_BAUDRATE_TABLE \
	82	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
	83
	84	/*-----------------------------------------------------------------------
	85	* NVRAM/RTC
	86	*
	87	* NOTE: The RTC registers are located at 0x7FFF0 - 0x7FFFF
	88	* The DS1558 code assumes this condition
	89	*
	90	----------------------------------------------------------------------/
17f50f22 SR	91	#define CFG_NVRAM_SIZE (0x2000 - 0x10) /* NVRAM size(8k)- RTC regs */
	92	#define CONFIG_RTC_DS1556 1 /* DS1556 RTC */
	93
	94	/*-----------------------------------------------------------------------
	95	* Environment
	96	----------------------------------------------------------------------/
	97	/*
	98	* Define here the location of the environment variables (FLASH or EEPROM).
	99	* Note: DENX encourages to use redundant environment in FLASH.
	100	*/
	101	#if 1
	102	#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
	103	#else
	104	#define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
	105	#endif
8a316c9b SR	106
	107	/*-----------------------------------------------------------------------
	108	* FLASH related
	109	----------------------------------------------------------------------/
17f50f22	110	#define CFG_MAX_FLASH_BANKS 3 /* number of banks */
8a316c9b SR	111	#define CFG_MAX_FLASH_SECT 256 /* sectors per device */
	112
	113	#undef CFG_FLASH_CHECKSUM
	114	#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
17f50f22	115	#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
8a316c9b	116
17f50f22 SR	117	#define CFG_FLASH_ADDR0 0x555
	118	#define CFG_FLASH_ADDR1 0x2aa
	119	#define CFG_FLASH_WORD_SIZE unsigned char
8a316c9b	120
17f50f22 SR	121	#define CFG_FLASH_2ND_16BIT_DEV 1 /* bamboo has 8 and 16bit device */
17f50f22 SR	122	#define CFG_FLASH_2ND_ADDR 0x87800000 /* bamboo has 8 and 16bit device */
8a316c9b	123
17f50f22 SR	124	#ifdef CFG_ENV_IS_IN_FLASH
	125	#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
	126	#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
	127	#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
	128
	129	#if 0 /* test-only */
	130	/* Address and size of Redundant Environment Sector */
	131	#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
	132	#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
8a316c9b	133	#endif
17f50f22	134	#endif /* CFG_ENV_IS_IN_FLASH */
8a316c9b SR	135
	136	/*-----------------------------------------------------------------------
	137	* DDR SDRAM
17f50f22 SR	138	----------------------------------------------------------------------------- /
	139	#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
	140	#define SPD_EEPROM_ADDRESS {0x50,0x51} /* SPD i2c spd addresses */
	141	#define CFG_SDRAM_ONBOARD_SIZE (64 << 20) /* Bamboo has onboard and DIMM-slots!*/
8a316c9b SR	142
	143	/*-----------------------------------------------------------------------
	144	* I2C
	145	----------------------------------------------------------------------/
	146	#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
	147	#undef CONFIG_SOFT_I2C /* I2C bit-banged */
	148	#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
	149	#define CFG_I2C_SLAVE 0x7F
	150
8a316c9b	151	#define CFG_I2C_MULTI_EEPROMS
8a316c9b SR	152	#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
	153	#define CFG_I2C_EEPROM_ADDR_LEN 1
	154	#define CFG_EEPROM_PAGE_WRITE_ENABLE
	155	#define CFG_EEPROM_PAGE_WRITE_BITS 3
	156	#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
	157
17f50f22 SR	158	#ifdef CFG_ENV_IS_IN_EEPROM
	159	#define CFG_ENV_SIZE 0x200 /* Size of Environment vars */
	160	#define CFG_ENV_OFFSET 0x0
	161	#endif /* CFG_ENV_IS_IN_EEPROM */
	162
	163	#define CONFIG_PREBOOT "echo;" \
	164	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	165	"echo"
	166
	167	#undef CONFIG_BOOTARGS
	168
	169	#define CONFIG_EXTRA_ENV_SETTINGS \
	170	"netdev=eth0\0" \
	171	"hostname=bamboo\0" \
	172	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	173	"nfsroot=$(serverip):$(rootpath)\0" \
	174	"ramargs=setenv bootargs root=/dev/ram rw\0" \
	175	"addip=setenv bootargs $(bootargs) " \
	176	"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
	177	":$(hostname):$(netdev):off panic=1\0" \
	178	"addtty=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0"\
	179	"flash_nfs=run nfsargs addip addtty;" \
	180	"bootm $(kernel_addr)\0" \
	181	"flash_self=run ramargs addip addtty;" \
	182	"bootm $(kernel_addr) $(ramdisk_addr)\0" \
	183	"net_nfs=tftp 200000 $(bootfile);run nfsargs addip addtty;" \
	184	"bootm\0" \
	185	"rootpath=/opt/eldk/ppc_4xx\0" \
	186	"bootfile=/tftpboot/bamboo/uImage\0" \
	187	"kernel_addr=fff00000\0" \
	188	"ramdisk_addr=fff10000\0" \
	189	"load=tftp 100000 /tftpboot/bamboo/u-boot.bin\0" \
	190	"update=protect off fff80000 ffffffff;era fff80000 ffffffff;" \
	191	"cp.b 100000 fff80000 80000;" \
	192	"setenv filesize;saveenv\0" \
	193	"upd=run load;run update\0" \
	194	""
	195	#define CONFIG_BOOTCOMMAND "run flash_self"
	196
	197	#if 0
	198	#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
	199	#else
	200	#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
	201	#endif
	202
	203	#define CONFIG_BAUDRATE 115200
8a316c9b	204
095b8a37	205	#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
8a316c9b SR	206	#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
8a316c9b SR	207
095b8a37	208	#define CONFIG_MII 1 /* MII PHY management */
17f50f22 SR	209	#define CONFIG_NET_MULTI 1 /* required for netconsole */
	210	#define CONFIG_PHY_ADDR 0 /* PHY address, See schematics */
	211	#define CONFIG_PHY1_ADDR 1
8a316c9b	212	#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
17f50f22	213	#define CONFIG_NO_PHY_RESET 1 /* no PHY reset on bamboo!!! */
8a316c9b	214
17f50f22	215	#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
8a316c9b SR	216
	217	/* Partitions */
	218	#define CONFIG_MAC_PARTITION
	219	#define CONFIG_DOS_PARTITION
	220	#define CONFIG_ISO_PARTITION
	221
	222	#ifdef CONFIG_440_EP
	223	/* USB */
	224	#define CONFIG_USB_OHCI
	225	#define CONFIG_USB_STORAGE
	226
	227	/Comment this out to enable USB 1.1 device/
	228	#define USB_2_0_DEVICE
	229	#endif /CONFIG_440_EP/
	230
17f50f22 SR	231	#define CONFIG_COMMANDS (CONFIG_CMD_DFL \| \
	232	CFG_CMD_ASKENV \| \
	233	CFG_CMD_DATE \| \
	234	CFG_CMD_DHCP \| \
	235	CFG_CMD_DIAG \| \
	236	CFG_CMD_ELF \| \
	237	CFG_CMD_I2C \| \
	238	CFG_CMD_IRQ \| \
	239	CFG_CMD_MII \| \
	240	CFG_CMD_NET \| \
	241	CFG_CMD_NFS \| \
	242	CFG_CMD_PCI \| \
	243	CFG_CMD_PING \| \
	244	CFG_CMD_REGINFO \| \
	245	CFG_CMD_SDRAM \| \
	246	CFG_CMD_USB \| \
	247	CFG_CMD_SNTP )
8a316c9b SR	248
	249	/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
	250	#include <cmd_confdefs.h>
	251
	252	/*
	253	* Miscellaneous configurable options
	254	*/
	255	#define CFG_LONGHELP /* undef to save memory */
	256	#define CFG_PROMPT "=> " /* Monitor Command Prompt */
	257	#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
	258	#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
	259	#else
	260	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
	261	#endif
	262	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
	263	#define CFG_MAXARGS 16 /* max number of command args */
	264	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
	265
	266	#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
	267	#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
	268
	269	#define CFG_LOAD_ADDR 0x100000 /* default load address */
17f50f22 SR	270	#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
17f50f22 SR	271	#define CONFIG_LYNXKDI 1 /* support kdi files */
8a316c9b SR	272
	273	#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
	274
	275	/*-----------------------------------------------------------------------
	276	* PCI stuff
	277	*-----------------------------------------------------------------------
	278	*/
	279	/* General PCI */
17f50f22 SR	280	#define CONFIG_PCI /* include pci support */
	281	#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
	282	#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
	283	#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
8a316c9b SR	284
8a316c9b SR	285	/* Board-specific PCI */
17f50f22	286	#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
8a316c9b SR	287	#define CFG_PCI_TARGET_INIT
	288	#define CFG_PCI_MASTER_INIT
	289
17f50f22 SR	290	#define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
17f50f22 SR	291	#define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
8a316c9b SR	292
	293	/*
	294	* For booting Linux, the board info and command line data
	295	* have to be in the first 8 MB of memory, since this is
	296	* the maximum mapped by the Linux kernel during initialization.
	297	*/
	298	#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
17f50f22	299
8a316c9b SR	300	/*-----------------------------------------------------------------------
	301	* Cache Configuration
	302	*/
17f50f22	303	#define CFG_DCACHE_SIZE 32768 /* For IBM 440 CPUs */
8a316c9b SR	304	#define CFG_CACHELINE_SIZE 32 /* ... */
	305	#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
	306	#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
	307	#endif
	308
	309	/*
	310	* Internal Definitions
	311	*
	312	* Boot Flags
	313	*/
	314	#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
	315	#define BOOTFLAG_WARM 0x02 /* Software reboot */
	316
	317	#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
	318	#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
	319	#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
	320	#endif
	321	#endif /* __CONFIG_H */