]>
Commit | Line | Data |
---|---|---|
65458987 AL |
1 | /* |
2 | * U-boot - Configuration file for BF561 EZKIT board | |
3 | */ | |
4 | ||
cf6f469e MF |
5 | #ifndef __CONFIG_BF561_EZKIT_H__ |
6 | #define __CONFIG_BF561_EZKIT_H__ | |
65458987 | 7 | |
f348ab85 | 8 | #include <asm/config-pre.h> |
f7ce12cb | 9 | |
65458987 | 10 | |
65458987 | 11 | /* |
cf6f469e | 12 | * Processor Settings |
65458987 | 13 | */ |
cf6f469e MF |
14 | #define CONFIG_BFIN_CPU bf561-0.3 |
15 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS | |
65458987 | 16 | |
65458987 AL |
17 | |
18 | /* | |
cf6f469e MF |
19 | * Clock Settings |
20 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV | |
21 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV | |
65458987 | 22 | */ |
cf6f469e MF |
23 | /* CONFIG_CLKIN_HZ is any value in Hz */ |
24 | #define CONFIG_CLKIN_HZ 30000000 | |
25 | /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ | |
26 | /* 1 = CLKIN / 2 */ | |
27 | #define CONFIG_CLKIN_HALF 0 | |
28 | /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ | |
29 | /* 1 = bypass PLL */ | |
30 | #define CONFIG_PLL_BYPASS 0 | |
31 | /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ | |
32 | /* Values can range from 0-63 (where 0 means 64) */ | |
33 | #define CONFIG_VCO_MULT 20 | |
34 | /* CCLK_DIV controls the core clock divider */ | |
35 | /* Values can be 1, 2, 4, or 8 ONLY */ | |
36 | #define CONFIG_CCLK_DIV 1 | |
37 | /* SCLK_DIV controls the system clock divider */ | |
38 | /* Values can range from 1-15 */ | |
39 | #define CONFIG_SCLK_DIV 6 | |
65458987 | 40 | |
65458987 AL |
41 | |
42 | /* | |
cf6f469e | 43 | * Memory Settings |
65458987 | 44 | */ |
cf6f469e MF |
45 | #define CONFIG_MEM_ADD_WDTH 9 |
46 | #define CONFIG_MEM_SIZE 64 | |
65458987 | 47 | |
cf6f469e MF |
48 | #define CONFIG_EBIU_SDRRC_VAL 0x306 |
49 | #define CONFIG_EBIU_SDGCTL_VAL 0x91114d | |
65458987 | 50 | |
cf6f469e MF |
51 | #define CONFIG_EBIU_AMGCTL_VAL 0x3F |
52 | #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 | |
53 | #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 | |
65458987 | 54 | |
cf6f469e MF |
55 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) |
56 | #define CONFIG_SYS_MALLOC_LEN (128 * 1024) | |
65458987 | 57 | |
65458987 AL |
58 | |
59 | /* | |
cf6f469e | 60 | * Network Settings |
65458987 | 61 | */ |
cf6f469e | 62 | #define ADI_CMDS_NETWORK 1 |
7194ab80 BW |
63 | #define CONFIG_NET_MULTI |
64 | #define CONFIG_SMC91111 1 | |
cf6f469e MF |
65 | #define CONFIG_SMC91111_BASE 0x2C010300 |
66 | #define CONFIG_SMC_USE_32_BIT 1 | |
67 | #define CONFIG_HOSTNAME bf561-ezkit | |
68 | /* Uncomment next line to use fixed MAC address */ | |
69 | /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ | |
65458987 | 70 | |
079a136c | 71 | |
ba2351f9 | 72 | /* |
cf6f469e | 73 | * Flash Settings |
ba2351f9 | 74 | */ |
cf6f469e MF |
75 | #define CONFIG_SYS_FLASH_CFI |
76 | #define CONFIG_FLASH_CFI_DRIVER | |
77 | #define CONFIG_SYS_FLASH_CFI_AMD_RESET | |
78 | #define CONFIG_SYS_FLASH_BASE 0x20000000 | |
79 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
80 | #define CONFIG_SYS_MAX_FLASH_SECT 135 | |
81 | /* The BF561-EZKIT uses a top boot flash */ | |
82 | #define CONFIG_ENV_IS_IN_FLASH 1 | |
83 | #define CONFIG_ENV_ADDR 0x20004000 | |
84 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) | |
85 | #define CONFIG_ENV_SIZE 0x2000 | |
86 | #define CONFIG_ENV_SECT_SIZE 0x10000 | |
87 | #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) | |
88 | #define ENV_IS_EMBEDDED | |
89 | #else | |
76d82187 | 90 | #define CONFIG_ENV_IS_EMBEDDED_IN_LDR |
ba2351f9 | 91 | #endif |
9ff67e5e MF |
92 | #ifdef ENV_IS_EMBEDDED |
93 | /* WARNING - the following is hand-optimized to fit within | |
94 | * the sector before the environment sector. If it throws | |
95 | * an error during compilation remove an object here to get | |
96 | * it linked after the configuration sector. | |
97 | */ | |
98 | # define LDS_BOARD_TEXT \ | |
c6fb83d2 PT |
99 | arch/blackfin/cpu/traps.o (.text .text.*); \ |
100 | arch/blackfin/cpu/interrupt.o (.text .text.*); \ | |
101 | arch/blackfin/cpu/serial.o (.text .text.*); \ | |
9ff67e5e | 102 | common/dlmalloc.o (.text .text.*); \ |
78acc472 PT |
103 | lib/crc32.o (.text .text.*); \ |
104 | lib/zlib.o (.text .text.*); \ | |
9ff67e5e MF |
105 | board/bf561-ezkit/bf561-ezkit.o (.text .text.*); \ |
106 | . = DEFINED(env_offset) ? env_offset : .; \ | |
107 | common/env_embedded.o (.text .text.*); | |
108 | #endif | |
ba2351f9 | 109 | |
cf6f469e | 110 | |
65458987 | 111 | /* |
cf6f469e | 112 | * I2C Settings |
65458987 | 113 | */ |
cf6f469e | 114 | #define CONFIG_SOFT_I2C |
beb60e77 MF |
115 | #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0 |
116 | #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1 | |
65458987 | 117 | |
65458987 AL |
118 | |
119 | /* | |
cf6f469e | 120 | * Misc Settings |
65458987 | 121 | */ |
cf6f469e MF |
122 | #define CONFIG_UART_CONSOLE 0 |
123 | ||
65458987 AL |
124 | |
125 | /* | |
cf6f469e | 126 | * Pull in common ADI header for remaining command/environment setup |
65458987 | 127 | */ |
cf6f469e | 128 | #include <configs/bfin_adi_common.h> |
65458987 | 129 | |
f348ab85 | 130 | #endif |