projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 65458987 AL |
1 | /* |
| 2 | * U-boot - Configuration file for BF561 EZKIT board | |
| 3 | */ | |
| 4 | ||
| 5 | #ifndef __CONFIG_EZKIT561_H__ | |
| 6 | #define __CONFIG_EZKIT561_H__ | |
| 7 | ||
| 8 | #define CONFIG_VDSP 1 | |
| 9 | #define CONFIG_BF561 1 | |
| 10 | ||
| 11 | #define CFG_LONGHELP 1 | |
| 12 | #define CONFIG_CMDLINE_EDITING 1 | |
| 13 | #define CONFIG_BAUDRATE 57600 | |
| 14 | /* Set default serial console for bf537 */ | |
| 15 | #define CONFIG_UART_CONSOLE 0 | |
| 16 | #define CONFIG_EZKIT561 1 | |
| 17 | #define CONFIG_BOOTDELAY 5 | |
| 18 | ||
| 19 | #define CONFIG_PANIC_HANG 1 | |
| 20 | ||
| 21 | /* | |
| 22 | * Boot Mode Set | |
| 23 | * Blackfin can support several boot modes | |
| 24 | */ | |
| 25 | #define BF561_BYPASS_BOOT 0x21 | |
| 26 | #define BF561_PARA_BOOT 0x22 | |
| 27 | #define BF561_SPI_BOOT 0x24 | |
| 28 | /* Define the boot mode */ | |
| 29 | #define BFIN_BOOT_MODE BF561_BYPASS_BOOT | |
| 30 | ||
| 31 | /* This sets the default state of the cache on U-Boot's boot */ | |
| 32 | #define CONFIG_ICACHE_ON | |
| 33 | #define CONFIG_DCACHE_ON | |
| 34 | ||
| 35 | /* Define where the uboot will be loaded by on-chip boot rom */ | |
| 36 | #define APP_ENTRY 0x00001000 | |
| 37 | ||
| 38 | /* | |
| 39 | * Stringize definitions - needed for environmental settings | |
| 40 | */ | |
| 41 | #define STRINGIZE2(x) #x | |
| 42 | #define STRINGIZE(x) STRINGIZE2(x) | |
| 43 | ||
| 44 | /* | |
| 45 | * Board settings | |
| 46 | */ | |
| 47 | #define CONFIG_DRIVER_SMC91111 1 | |
| 48 | #define CONFIG_SMC91111_BASE 0x2C010300 | |
| 49 | #define CONFIG_ASYNC_EBIU_BASE CONFIG_SMC91111_BASE & ~(4*1024*1024) | |
| 50 | #define CONFIG_SMC_USE_32_BIT 1 | |
| 51 | #define CONFIG_MISC_INIT_R 1 | |
| 52 | ||
| 53 | /* | |
| 54 | * Clock settings | |
| 55 | */ | |
| 56 | ||
| 57 | /* CONFIG_CLKIN_HZ is any value in Hz */ | |
| 58 | #define CONFIG_CLKIN_HZ 30000000 | |
| 59 | /* CONFIG_CLKIN_HALF controls what is passed to PLL 0=CLKIN */ | |
| 60 | /* 1=CLKIN/2 */ | |
| 61 | #define CONFIG_CLKIN_HALF 0 | |
| 62 | /* CONFIG_PLL_BYPASS controls if the PLL is used 0=don't bypass */ | |
| 63 | /* 1=bypass PLL */ | |
| 64 | #define CONFIG_PLL_BYPASS 0 | |
| 65 | /* CONFIG_VCO_MULT controls what the multiplier of the PLL is */ | |
| 66 | /* Values can range from 1-64 */ | |
| 67 | #define CONFIG_VCO_MULT 20 | |
| 68 | /* CONFIG_CCLK_DIV controls what the core clock divider is */ | |
| 69 | /* Values can be 1, 2, 4, or 8 ONLY */ | |
| 70 | #define CONFIG_CCLK_DIV 1 | |
| 71 | /* CONFIG_SCLK_DIV controls what the peripheral clock divider is */ | |
| 72 | /* Values can range from 1-15 */ | |
| 73 | #define CONFIG_SCLK_DIV 5 | |
| 74 | /* CONFIG_SPI_BAUD controls the SPI peripheral clock divider */ | |
| 75 | /* Values can range from 2-65535 */ | |
| 76 | /* SCK Frequency = SCLK / (2 * CONFIG_SPI_BAUD) */ | |
| 77 | #define CONFIG_SPI_BAUD 2 | |
| 78 | #define CONFIG_SPI_BAUD_INITBLOCK 4 | |
| 79 | ||
| 80 | /* | |
| 81 | * Network settings | |
| 82 | */ | |
| 83 | #if (CONFIG_DRIVER_SMC91111) | |
| 84 | #define CONFIG_IPADDR 192.168.0.15 | |
| 85 | #define CONFIG_NETMASK 255.255.255.0 | |
| 86 | #define CONFIG_GATEWAYIP 192.168.0.1 | |
| 87 | #define CONFIG_SERVERIP 192.168.0.2 | |
| 88 | #define CONFIG_HOSTNAME ezkit561 | |
| 89 | #define CONFIG_ROOTPATH /arm-cross-build/BF561/uClinux-dist/romfs | |
| 90 | #endif /* CONFIG_DRIVER_SMC91111 */ | |
| 91 | ||
| 92 | /* | |
| 93 | * Flash settings | |
| 94 | */ | |
| 95 | ||
| 96 | #define CFG_FLASH_CFI /* The flash is CFI compatible */ | |
| 97 | #define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ | |
| 98 | #define CFG_FLASH_CFI_AMD_RESET | |
| 99 | #define CFG_ENV_IS_IN_FLASH 1 | |
| 100 | #define CFG_FLASH_BASE 0x20000000 | |
| 101 | #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ | |
| 102 | #define CFG_MAX_FLASH_SECT 135 /* max number of sectors on one chip */ | |
| 103 | #define CFG_ENV_ADDR 0x20020000 | |
| 104 | #define CFG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */ | |
| 105 | /* JFFS Partition offset set */ | |
| 106 | #define CFG_JFFS2_FIRST_BANK 0 | |
| 107 | #define CFG_JFFS2_NUM_BANKS 1 | |
| 108 | /* 512k reserved for u-boot */ | |
| 109 | #define CFG_JFFS2_FIRST_SECTOR 8 | |
| 110 | ||
| 111 | /* | |
| 112 | * SDRAM settings & memory map | |
| 113 | */ | |
| 114 | ||
| 115 | #define CONFIG_MEM_SIZE 64 /* 128, 64, 32, 16 */ | |
| 116 | #define CONFIG_MEM_ADD_WDTH 9 /* 8, 9, 10, 11 */ | |
| 117 | #define CONFIG_MEM_MT48LC16M16A2TG_75 1 | |
| 118 | ||
| 119 | #define CFG_SDRAM_BASE 0x00000000 | |
| 120 | #define CFG_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024) | |
| 121 | ||
| 122 | #define CFG_MEMTEST_START 0x0 /* memtest works on */ | |
| 123 | #define CFG_MEMTEST_END ( (CONFIG_MEM_SIZE - 1) * 1024*1024) /* 1 ... 63 MB in DRAM */ | |
| 124 | ||
| 125 | #define CONFIG_LOADADDR 0x01000000 /* default load address */ | |
| 126 | #define CFG_LOAD_ADDR CONFIG_LOADADDR | |
| 127 | #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ | |
| 128 | #define CFG_MONITOR_BASE (CFG_MAX_RAM_SIZE - CFG_MONITOR_LEN) | |
| 129 | ||
| 130 | #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ | |
| 131 | #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN) | |
| 132 | ||
| 133 | #define CFG_GBL_DATA_SIZE 0x4000 | |
| 134 | #define CFG_GBL_DATA_ADDR (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE) | |
| 135 | #define CONFIG_STACKBASE (CFG_GBL_DATA_ADDR - 4) | |
| 136 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ | |
| 137 | ||
| 138 | #if ( CONFIG_CLKIN_HALF == 0 ) | |
| 139 | #define CONFIG_VCO_HZ ( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT ) | |
| 140 | #else | |
| 141 | #define CONFIG_VCO_HZ (( CONFIG_CLKIN_HZ * CONFIG_VCO_MULT ) / 2 ) | |
| 142 | #endif | |
| 143 | ||
| 144 | #if (CONFIG_PLL_BYPASS == 0) | |
| 145 | #define CONFIG_CCLK_HZ ( CONFIG_VCO_HZ / CONFIG_CCLK_DIV ) | |
| 146 | #define CONFIG_SCLK_HZ ( CONFIG_VCO_HZ / CONFIG_SCLK_DIV ) | |
| 147 | #else | |
| 148 | #define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ | |
| 149 | #define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ | |
| 150 | #endif | |
| 151 | ||
| 152 | /* | |
| 153 | * Command settings | |
| 154 | */ | |
| 155 | ||
| 156 | #define CFG_AUTOLOAD "no" /* rarpb, bootp, dhcp commands will */ | |
| 157 | /* only perform a configuration */ | |
| 158 | /* lookup from the BOOTP/DHCP server */ | |
| 159 | /* but not try to load any image */ | |
| 160 | /* using TFTP */ | |
| 161 | #define CONFIG_BOOT_RETRY_TIME -1 /* Enable this if bootretry required, */ | |
| 162 | /* currently its disabled */ | |
| 163 | #define CONFIG_BOOTCOMMAND "run ramboot" | |
| 164 | #define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw console=ttyBF0,57600" | |
| 165 | ||
| 166 | #if (CONFIG_DRIVER_SMC91111) | |
| 167 | #define CONFIG_COMMANDS1 (CONFIG_CMD_DFL | \ | |
| 168 | CFG_CMD_PING | \ | |
| 169 | CFG_CMD_ELF | \ | |
| 170 | CFG_CMD_CACHE | \ | |
| 171 | CFG_CMD_JFFS2 | \ | |
| 172 | CFG_CMD_DHCP) | |
| 173 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
| 174 | "ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \ | |
| 175 | "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):" \ | |
| 176 | "$(rootpath) console=ttyBF0,57600\0" \ | |
| 177 | "addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(serverip):" \ | |
| 178 | "$(gatewayip):$(netmask):$(hostname):eth0:off\0" \ | |
| 179 | "ramboot=tftpboot $(loadaddr) linux; " \ | |
| 180 | "run ramargs; run addip; bootelf\0" \ | |
| 181 | "nfsboot=tftpboot $(loadaddr) linux; " \ | |
| 182 | "run nfsargs; run addip; bootelf\0" \ | |
| 183 | "update=tftpboot $(loadaddr) u-boot.bin; " \ | |
| 184 | "protect off 0x20000000 0x2003FFFF; " \ | |
| 185 | "erase 0x20000000 0x2003FFFF; " \ | |
| 186 | "cp.b $(loadaddr) 0x20000000 $(filesize)\0" \ | |
| 187 | "" | |
| 188 | #else | |
| 189 | #define CONFIG_COMMANDS1 (CONFIG_CMD_DFL | \ | |
| 190 | CFG_CMD_ELF | \ | |
| 191 | CFG_CMD_CACHE | \ | |
| 192 | CFG_CMD_JFFS2) | |
| 193 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
| 194 | "ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \ | |
| 195 | "flashboot=bootm 0x20100000\0" \ | |
| 196 | "" | |
| 197 | #endif | |
| 198 | ||
| 199 | #define CONFIG_COMMANDS ( CONFIG_COMMANDS1 | CONFIG_COMMANDS2 ) | |
| 200 | ||
| 201 | /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ | |
| 202 | #include <cmd_confdefs.h> | |
| 203 | ||
| 204 | /* | |
| 205 | * Console settings | |
| 206 | */ | |
| 207 | #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } | |
| 208 | ||
| 209 | #define CFG_PROMPT "ezkit> " /* Monitor Command Prompt */ | |
| 210 | ||
| 211 | #if (CONFIG_COMMANDS & CFG_CMD_KGDB) | |
| 212 | #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ | |
| 213 | #else | |
| 214 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ | |
| 215 | #endif | |
| 216 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ | |
| 217 | #define CFG_MAXARGS 16 /* max number of command args */ | |
| 218 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ | |
| 219 | ||
| 220 | #define CONFIG_LOADS_ECHO 1 | |
| 221 | ||
| 222 | /* | |
| 223 | * Miscellaneous configurable options | |
| 224 | */ | |
| 225 | #define CFG_HZ 1000 /* decrementer freq: 10 ms ticks */ | |
| 226 | #define CFG_BOOTM_LEN 0x4000000 /* Large Image Length, set to 64 Meg */ | |
| 227 | ||
| 228 | /* | |
| 229 | * FLASH organization and environment definitions | |
| 230 | */ | |
| 231 | #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ | |
| 232 | ||
| 233 | #define AMGCTLVAL 0x3F | |
| 234 | #define AMBCTL0VAL 0x7BB07BB0 | |
| 235 | #define AMBCTL1VAL 0xFFC27BB0 | |
| 236 | ||
| 237 | #ifdef CONFIG_VDSP | |
| 238 | #define ET_EXEC_VDSP 0x8 | |
| 239 | #define SHT_STRTAB_VDSP 0x1 | |
| 240 | #define ELFSHDRSIZE_VDSP 0x2C | |
| 241 | #define VDSP_ENTRY_ADDR 0xFFA00000 | |
| 242 | #endif | |
| 243 | ||
| 244 | #endif /* __CONFIG_EZKIT561_H__ */ |