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[people/ms/u-boot.git] / include / configs / chromebook_link.h
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8ef07571
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1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2008
4 * Graeme Russ, graeme.russ@gmail.com.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9/*
10 * board/config.h - configuration options, board specific
11 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16#include <configs/x86-common.h>
17
24ef0428 18
8ef07571 19#define CONFIG_SYS_MONITOR_LEN (1 << 20)
24ef0428 20
65dd74a6 21#define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000
437c2b7c 22#define CONFIG_BOARD_EARLY_INIT_F
069f5481 23#define CONFIG_MISC_INIT_R
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24
25#define CONFIG_NR_DRAM_BANKS 8
8c5224c9 26#define CONFIG_X86_MRC_ADDR 0xfffa0000
65dd74a6 27#define CONFIG_CACHE_MRC_SIZE_KB 512
8ef07571 28
41702bac 29#define CONFIG_X86_SERIAL
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30
31#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
32 PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
33 {PCI_VENDOR_ID_INTEL, \
34 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
35 {PCI_VENDOR_ID_INTEL, \
36 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
37 {PCI_VENDOR_ID_INTEL, \
38 PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
39
63faf250 40#define CONFIG_X86_OPTION_ROM_FILE pci8086,0166.bin
62d0c5e1 41#define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000
8ef07571 42
6e5b12b6
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43#define CONFIG_PCI_MEM_BUS 0xe0000000
44#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
45#define CONFIG_PCI_MEM_SIZE 0x10000000
46
47#define CONFIG_PCI_PREF_BUS 0xd0000000
48#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS
49#define CONFIG_PCI_PREF_SIZE 0x10000000
50
51#define CONFIG_PCI_IO_BUS 0x1000
52#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
53#define CONFIG_PCI_IO_SIZE 0xefff
54
b6b4a0ec
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55#define CONFIG_SYS_EARLY_PCI_INIT
56#define CONFIG_PCI_PNP
57
a6fa83f0
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58#define CONFIG_BIOSEMU
59#define VIDEO_IO_OFFSET 0
60#define CONFIG_X86EMU_RAW_IO
61
22e131ca
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62#define CONFIG_CROS_EC
63#define CONFIG_CROS_EC_LPC
64#define CONFIG_CMD_CROS_EC
65#define CONFIG_ARCH_EARLY_INIT_R
66
e43ade37
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67#undef CONFIG_ENV_IS_NOWHERE
68#undef CONFIG_ENV_SIZE
69#define CONFIG_ENV_SIZE 0x1000
70#define CONFIG_ENV_SECT_SIZE 0x1000
71#define CONFIG_ENV_IS_IN_SPI_FLASH
72#define CONFIG_ENV_OFFSET 0x003f8000
73
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74#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \
75 "stdout=vga,serial\0" \
76 "stderr=vga,serial\0"
77
78#endif /* __CONFIG_H */