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16b013e7 WD |
1 | /* |
2 | * (C) Copyright 2005 | |
3 | * Greg Ungerer <greg.ungerer@opengear.com>. | |
4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
5 | * | |
6 | * See file CREDITS for list of people who contributed to this | |
7 | * project. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation; either version 2 of | |
12 | * the License, or (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
22 | * MA 02111-1307 USA | |
23 | */ | |
24 | #ifndef __CONFIG_H | |
25 | #define __CONFIG_H | |
26 | ||
27 | /* | |
28 | * High Level Configuration Options | |
29 | * (easy to change) | |
30 | */ | |
31 | #define CONFIG_KS8695 1 /* it is a KS8695 CPU */ | |
32 | #define CONFIG_CM41xx 1 /* it is an OpenGear CM41xx boad */ | |
33 | ||
2eab48f5 | 34 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
16b013e7 WD |
35 | |
36 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
37 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
38 | #define CONFIG_INITRD_TAG 1 | |
39 | ||
2eab48f5 WD |
40 | #define CONFIG_DRIVER_KS8695ETH /* use KS8695 ethernet driver */ |
41 | ||
16b013e7 WD |
42 | /* |
43 | * Size of malloc() pool | |
44 | */ | |
0e8d1586 | 45 | #define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
16b013e7 WD |
46 | #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
47 | ||
48 | /* | |
49 | * Hardware drivers | |
50 | */ | |
51 | ||
52 | /* | |
53 | * select serial console configuration | |
54 | */ | |
93f6d725 | 55 | #define CONFIG_ENV_IS_NOWHERE |
16b013e7 WD |
56 | #define CONFIG_SERIAL1 |
57 | #define CONFIG_CONS_INDEX 1 | |
58 | #define CONFIG_BAUDRATE 115200 | |
59 | #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } | |
60 | ||
37e4f24b | 61 | |
80ff4f99 JL |
62 | /* |
63 | * BOOTP options | |
64 | */ | |
65 | #define CONFIG_BOOTP_BOOTFILESIZE | |
66 | #define CONFIG_BOOTP_BOOTPATH | |
67 | #define CONFIG_BOOTP_GATEWAY | |
68 | #define CONFIG_BOOTP_HOSTNAME | |
69 | ||
70 | ||
37e4f24b JL |
71 | /* |
72 | * Command line configuration. | |
73 | */ | |
74 | #include <config_cmd_default.h> | |
75 | ||
76 | #undef CONFIG_CMD_ENV | |
77 | ||
16b013e7 WD |
78 | |
79 | #define CONFIG_BOOTDELAY 0 | |
80 | #define CONFIG_BOOTARGS "mem=32M console=ttyAM0,115200" | |
81 | #define CONFIG_BOOTCOMMAND "gofsk 0x02200000" | |
82 | ||
83 | /* | |
84 | * Miscellaneous configurable options | |
85 | */ | |
86 | #define CFG_LONGHELP /* undef to save memory */ | |
87 | #define CFG_PROMPT "boot > " /* Monitor Command Prompt */ | |
88 | #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ | |
89 | #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ | |
90 | #define CFG_MAXARGS 16 /* max number of command args */ | |
91 | #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ | |
92 | ||
93 | #define CFG_MEMTEST_START 0x00800000 /* memtest works on */ | |
94 | #define CFG_MEMTEST_END 0x01000000 /* 16 MB in DRAM */ | |
95 | ||
96 | #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ | |
97 | ||
98 | #define CFG_LOAD_ADDR 0x00008000 /* default load address */ | |
99 | ||
100 | #define CFG_HZ (1000) /* 1ms resolution ticks */ | |
101 | ||
102 | /*----------------------------------------------------------------------- | |
103 | * Stack sizes | |
104 | * | |
105 | * The stack sizes are set up in start.S using the settings below | |
106 | */ | |
107 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ | |
108 | #ifdef CONFIG_USE_IRQ | |
109 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ | |
110 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ | |
111 | #endif | |
112 | ||
113 | /*----------------------------------------------------------------------- | |
114 | * Physical Memory Map | |
115 | */ | |
116 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ | |
117 | #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ | |
118 | #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ | |
119 | ||
120 | #define PHYS_FLASH_1 0x02000000 /* Flash Bank #1 */ | |
121 | #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */ | |
122 | #define CFG_FLASH_BASE PHYS_FLASH_1 | |
123 | ||
124 | /*----------------------------------------------------------------------- | |
125 | * FLASH and environment organization | |
126 | */ | |
127 | #define CFG_MAX_FLASH_BANKS 2 /* max number of flash banks */ | |
128 | #define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ | |
129 | ||
130 | /* timeout values are in ticks */ | |
131 | #define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */ | |
132 | #define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */ | |
133 | ||
0e8d1586 | 134 | #define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment */ |
16b013e7 WD |
135 | |
136 | #endif /* __CONFIG_H */ |