[people/ms/u-boot.git] / include / configs / cm_fx6.h

/*
 * Config file for Compulab CM-FX6 board
 *
 * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
 *
 * Author: Nikita Kiryanov <nikita@compulab.co.il>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_CM_FX6_H
#define __CONFIG_CM_FX6_H

#include <asm/arch/imx-regs.h>
#include <config_distro_defaults.h>
#include "mx6_common.h"

/* Machine config */
#define CONFIG_MX6
#define CONFIG_SYS_LITTLE_ENDIAN
#define CONFIG_MACH_TYPE		4273
#define CONFIG_SYS_HZ			1000

#ifndef CONFIG_SPL_BUILD
#define CONFIG_DM
#define CONFIG_CMD_DM

#define CONFIG_DM_GPIO
#define CONFIG_CMD_GPIO

#define CONFIG_DM_SERIAL
#define CONFIG_SYS_MALLOC_F_LEN		(1 << 10)
#endif

/* Display information on boot */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_TIMESTAMP

/* CMD */
#include <config_cmd_default.h>
#define CONFIG_CMD_GREPENV
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_LOADB
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_XIMG
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMLS

/* MMC */
#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM	3
#define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR

/* RAM */
#define PHYS_SDRAM_1			MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_2			MMDC1_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_NR_DRAM_BANKS		2
#define CONFIG_SYS_MEMTEST_START	0x10000000
#define CONFIG_SYS_MEMTEST_END		0x10010000
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* Serial console */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART4_BASE
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}

/* Shell */
#define CONFIG_SYS_PROMPT	"CM-FX6 # "
#define CONFIG_SYS_CBSIZE	1024
#define CONFIG_SYS_MAXARGS	16
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

/* SPI flash */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_CMD_SF
#define CONFIG_SF_DEFAULT_BUS		0
#define CONFIG_SF_DEFAULT_CS		0
#define CONFIG_SF_DEFAULT_SPEED		25000000
#define CONFIG_SF_DEFAULT_MODE		(SPI_MODE_0)

/* Environment */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SECT_SIZE		(64 * 1024)
#define CONFIG_ENV_SIZE			(8 * 1024)
#define CONFIG_ENV_OFFSET		(768 * 1024)

#define CONFIG_EXTRA_ENV_SETTINGS \
	"kernel=uImage-cm-fx6\0" \
	"autoload=no\0" \
	"loadaddr=0x10800000\0" \
	"fdtaddr=0x11000000\0" \
	"console=ttymxc3,115200\0" \
	"ethprime=FEC0\0" \
	"bootscr=boot.scr\0" \
	"bootm_low=18000000\0" \
	"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
	"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
	"fdtfile=cm-fx6.dtb\0" \
	"doboot=bootm ${loadaddr}\0" \
	"loadfdt=false\0" \
	"setboottypez=setenv kernel zImage-cm-fx6;" \
		"setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
		"setenv loadfdt true;\0" \
	"setboottypem=setenv kernel uImage-cm-fx6;" \
		"setenv doboot bootm ${loadaddr};" \
		"setenv loadfdt false;\0"\
	"run_eboot=echo Starting EBOOT ...; "\
		"mmc dev ${mmcdev} && " \
		"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
	"mmcdev=2\0" \
	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
	"loadmmcbootscript=load mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
	"mmcbootscript=echo Running bootscript from mmc ...; "\
		"source ${loadaddr}\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"root=${mmcroot} " \
		"${video}\0" \
	"mmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
	"mmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"run doboot\0" \
	"satadev=0\0" \
	"sataroot=/dev/sda2 rw rootwait\0" \
	"sataargs=setenv bootargs console=${console} " \
		"root=${sataroot} " \
		"${video}\0" \
	"loadsatabootscript=load sata ${satadev} ${loadaddr} ${bootscr}\0" \
	"satabootscript=echo Running bootscript from sata ...; " \
		"source ${loadaddr}\0" \
	"sataloadkernel=load sata ${satadev} ${loadaddr} ${kernel}\0" \
	"sataloadfdt=load sata ${satadev} ${fdtaddr} ${fdtfile}\0" \
	"sataboot=echo Booting from sata ...; "\
		"run sataargs; " \
		"run doboot\0" \
	"nandroot=/dev/mtdblock4 rw\0" \
	"nandrootfstype=ubifs\0" \
	"nandargs=setenv bootargs console=${console} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype} " \
		"${video}\0" \
	"nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"nand read ${loadaddr} 0 780000; " \
		"if ${loadfdt}; then " \
			"run nandloadfdt;" \
		"fi; " \
		"run doboot\0" \
	"boot=mmc dev ${mmcdev}; " \
		"if mmc rescan; then " \
			"if run loadmmcbootscript; then " \
				"run mmcbootscript;" \
			"else " \
				"if run mmcloadkernel; then " \
					"if ${loadfdt}; then " \
						"run mmcloadfdt;" \
					"fi;" \
					"run mmcboot;" \
				"fi;" \
			"fi;" \
		"fi;" \
		"if sata init; then " \
			"if run loadsatabootscript; then " \
				"run satabootscript;" \
			"else "\
				"if run sataloadkernel; then " \
					"if ${loadfdt}; then " \
						"run sataloadfdt; " \
					"fi;" \
					"run sataboot;" \
				"fi;" \
			"fi;" \
		"fi;" \
		"run nandboot\0"

#define CONFIG_BOOTCOMMAND \
	"run setboottypem; run boot"

/* SPI */
#define CONFIG_SPI
#define CONFIG_MXC_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_ATMEL
#define CONFIG_SPI_FLASH_EON
#define CONFIG_SPI_FLASH_GIGADEVICE
#define CONFIG_SPI_FLASH_MACRONIX
#define CONFIG_SPI_FLASH_SPANSION
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_SST
#define CONFIG_SPI_FLASH_WINBOND

/* NAND */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_CMD_NAND
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_MAX_CHIPS	1
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_NAND_MXS
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* APBH DMA is required for NAND support */
#define CONFIG_APBH_DMA
#define CONFIG_APBH_DMA_BURST
#define CONFIG_APBH_DMA_BURST8
#endif

/* Ethernet */
#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_PHYADDR		0
#define CONFIG_FEC_XCV_TYPE		RGMII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_PHYLIB
#define CONFIG_PHY_ATHEROS
#define CONFIG_MII
#define CONFIG_ETHPRIME			"FEC0"
#define CONFIG_ARP_TIMEOUT		200UL
#define CONFIG_NET_RETRY_COUNT		5

/* USB */
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS		0
#define CONFIG_USB_MAX_CONTROLLER_COUNT	2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */

/* I2C */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_MXC_I2C3_SPEED	400000

#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
#define CONFIG_SYS_I2C_EEPROM_BUS	2

/* SATA */
#define CONFIG_CMD_SATA
#define CONFIG_SYS_SATA_MAX_DEVICE	1
#define CONFIG_LIBATA
#define CONFIG_LBA48
#define CONFIG_DWC_AHSATA
#define CONFIG_DWC_AHSATA_PORT_ID	0
#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR

/* GPIO */
#define CONFIG_MXC_GPIO

/* Boot */
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_LOADADDR			0x10800000
#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SYS_BOOTMAPSZ	        (8 << 20)
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SERIAL_TAG

/* misc */
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_STACKSIZE			(128 * 1024)
#define CONFIG_SYS_MALLOC_LEN			(2 * 1024 * 1024)
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	800 /* 400 KB */
#define CONFIG_OF_BOARD_SETUP

/* SPL */
#include "imx6_spl.h"
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x80 /* offset 64 kb */
#define CONFIG_SYS_MONITOR_LEN	(CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
#define CONFIG_SPL_SPI_LOAD

#endif	/* __CONFIG_CM_FX6_H */
Commit	Line	Data
e32028a7 NK	1	/*
	2	* Config file for Compulab CM-FX6 board
	3	*
	4	* Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
	5	*
	6	* Author: Nikita Kiryanov <nikita@compulab.co.il>
	7	*
	8	* SPDX-License-Identifier: GPL-2.0+
	9	*/
	10
	11	#ifndef __CONFIG_CM_FX6_H
	12	#define __CONFIG_CM_FX6_H
	13
	14	#include <asm/arch/imx-regs.h>
	15	#include <config_distro_defaults.h>
	16	#include "mx6_common.h"
	17
	18	/* Machine config */
	19	#define CONFIG_MX6
	20	#define CONFIG_SYS_LITTLE_ENDIAN
	21	#define CONFIG_MACH_TYPE 4273
	22	#define CONFIG_SYS_HZ 1000
	23
3f0e935f SG	24	#ifndef CONFIG_SPL_BUILD
	25	#define CONFIG_DM
	26	#define CONFIG_CMD_DM
	27
	28	#define CONFIG_DM_GPIO
	29	#define CONFIG_CMD_GPIO
	30
	31	#define CONFIG_DM_SERIAL
	32	#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
	33	#endif
	34
e32028a7 NK	35	/* Display information on boot */
	36	#define CONFIG_DISPLAY_CPUINFO
	37	#define CONFIG_DISPLAY_BOARDINFO
	38	#define CONFIG_TIMESTAMP
	39
	40	/* CMD */
	41	#include <config_cmd_default.h>
	42	#define CONFIG_CMD_GREPENV
	43	#undef CONFIG_CMD_FLASH
	44	#undef CONFIG_CMD_LOADB
	45	#undef CONFIG_CMD_LOADS
	46	#undef CONFIG_CMD_XIMG
	47	#undef CONFIG_CMD_FPGA
	48	#undef CONFIG_CMD_IMLS
e32028a7 NK	49
	50	/* MMC */
	51	#define CONFIG_MMC
	52	#define CONFIG_CMD_MMC
	53	#define CONFIG_GENERIC_MMC
	54	#define CONFIG_FSL_ESDHC
	55	#define CONFIG_FSL_USDHC
	56	#define CONFIG_SYS_FSL_USDHC_NUM 3
	57	#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
	58
	59	/* RAM */
	60	#define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
	61	#define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
	62	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	63	#define CONFIG_NR_DRAM_BANKS 2
	64	#define CONFIG_SYS_MEMTEST_START 0x10000000
	65	#define CONFIG_SYS_MEMTEST_END 0x10010000
	66	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	67	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	68	#define CONFIG_SYS_INIT_SP_OFFSET \
	69	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	70	#define CONFIG_SYS_INIT_SP_ADDR \
	71	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	72
	73	/* Serial console */
	74	#define CONFIG_MXC_UART
	75	#define CONFIG_MXC_UART_BASE UART4_BASE
	76	#define CONFIG_BAUDRATE 115200
	77	#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
	78
	79	/* Shell */
	80	#define CONFIG_SYS_PROMPT "CM-FX6 # "
	81	#define CONFIG_SYS_CBSIZE 1024
	82	#define CONFIG_SYS_MAXARGS 16
	83	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	84	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	85	sizeof(CONFIG_SYS_PROMPT) + 16)
	86
	87	/* SPI flash */
	88	#define CONFIG_SYS_NO_FLASH
	89	#define CONFIG_CMD_SF
	90	#define CONFIG_SF_DEFAULT_BUS 0
	91	#define CONFIG_SF_DEFAULT_CS 0
	92	#define CONFIG_SF_DEFAULT_SPEED 25000000
	93	#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
	94
	95	/* Environment */
	96	#define CONFIG_ENV_OVERWRITE
	97	#define CONFIG_ENV_IS_IN_SPI_FLASH
	98	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	99	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	100	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	101	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	102	#define CONFIG_ENV_SECT_SIZE (64 * 1024)
	103	#define CONFIG_ENV_SIZE (8 * 1024)
	104	#define CONFIG_ENV_OFFSET (768 * 1024)
	105
	106	#define CONFIG_EXTRA_ENV_SETTINGS \
	107	"kernel=uImage-cm-fx6\0" \
	108	"autoload=no\0" \
	109	"loadaddr=0x10800000\0" \
	110	"fdtaddr=0x11000000\0" \
	111	"console=ttymxc3,115200\0" \
	112	"ethprime=FEC0\0" \
113	"bootscr=boot.scr\0" \
114	"bootm_low=18000000\0" \
115	"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
116	"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
117	"fdtfile=cm-fx6.dtb\0" \
118	"doboot=bootm ${loadaddr}\0" \
119	"loadfdt=false\0" \
120	"setboottypez=setenv kernel zImage-cm-fx6;" \
121	"setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
122	"setenv loadfdt true;\0" \
123	"setboottypem=setenv kernel uImage-cm-fx6;" \
124	"setenv doboot bootm ${loadaddr};" \
125	"setenv loadfdt false;\0"\
126	"run_eboot=echo Starting EBOOT ...; "\
127	"mmc dev ${mmcdev} && " \
128	"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
129	"mmcdev=2\0" \
130	"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
131	"loadmmcbootscript=load mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
132	"mmcbootscript=echo Running bootscript from mmc ...; "\
133	"source ${loadaddr}\0" \
134	"mmcargs=setenv bootargs console=${console} " \
135	"root=${mmcroot} " \
136	"${video}\0" \
137	"mmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
138	"mmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
139	"mmcboot=echo Booting from mmc ...; " \
140	"run mmcargs; " \
141	"run doboot\0" \
206f38f7 NK	142	"satadev=0\0" \
	143	"sataroot=/dev/sda2 rw rootwait\0" \
	144	"sataargs=setenv bootargs console=${console} " \
	145	"root=${sataroot} " \
	146	"${video}\0" \
	147	"loadsatabootscript=load sata ${satadev} ${loadaddr} ${bootscr}\0" \
	148	"satabootscript=echo Running bootscript from sata ...; " \
	149	"source ${loadaddr}\0" \
	150	"sataloadkernel=load sata ${satadev} ${loadaddr} ${kernel}\0" \
	151	"sataloadfdt=load sata ${satadev} ${fdtaddr} ${fdtfile}\0" \
	152	"sataboot=echo Booting from sata ...; "\
	153	"run sataargs; " \
	154	"run doboot\0" \
a6b0652b NK	155	"nandroot=/dev/mtdblock4 rw\0" \
	156	"nandrootfstype=ubifs\0" \
	157	"nandargs=setenv bootargs console=${console} " \
	158	"root=${nandroot} " \
	159	"rootfstype=${nandrootfstype} " \
	160	"${video}\0" \
	161	"nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
	162	"nandboot=echo Booting from nand ...; " \
	163	"run nandargs; " \
	164	"nand read ${loadaddr} 0 780000; " \
	165	"if ${loadfdt}; then " \
	166	"run nandloadfdt;" \
	167	"fi; " \
	168	"run doboot\0" \
e32028a7 NK	169	"boot=mmc dev ${mmcdev}; " \
	170	"if mmc rescan; then " \
	171	"if run loadmmcbootscript; then " \
	172	"run mmcbootscript;" \
	173	"else " \
	174	"if run mmcloadkernel; then " \
	175	"if ${loadfdt}; then " \
	176	"run mmcloadfdt;" \
	177	"fi;" \
	178	"run mmcboot;" \
	179	"fi;" \
	180	"fi;" \
a6b0652b	181	"fi;" \
206f38f7 NK	182	"if sata init; then " \
	183	"if run loadsatabootscript; then " \
	184	"run satabootscript;" \
	185	"else "\
	186	"if run sataloadkernel; then " \
	187	"if ${loadfdt}; then " \
	188	"run sataloadfdt; " \
	189	"fi;" \
	190	"run sataboot;" \
	191	"fi;" \
	192	"fi;" \
	193	"fi;" \
a6b0652b	194	"run nandboot\0"
e32028a7 NK	195
	196	#define CONFIG_BOOTCOMMAND \
	197	"run setboottypem; run boot"
	198
	199	/* SPI */
	200	#define CONFIG_SPI
	201	#define CONFIG_MXC_SPI
	202	#define CONFIG_SPI_FLASH
	203	#define CONFIG_SPI_FLASH_ATMEL
	204	#define CONFIG_SPI_FLASH_EON
	205	#define CONFIG_SPI_FLASH_GIGADEVICE
	206	#define CONFIG_SPI_FLASH_MACRONIX
	207	#define CONFIG_SPI_FLASH_SPANSION
	208	#define CONFIG_SPI_FLASH_STMICRO
	209	#define CONFIG_SPI_FLASH_SST
	210	#define CONFIG_SPI_FLASH_WINBOND
	211
a6b0652b NK	212	/* NAND */
	213	#ifndef CONFIG_SPL_BUILD
	214	#define CONFIG_CMD_NAND
	215	#define CONFIG_SYS_NAND_BASE 0x40000000
	216	#define CONFIG_SYS_NAND_MAX_CHIPS 1
	217	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	218	#define CONFIG_NAND_MXS
	219	#define CONFIG_SYS_NAND_ONFI_DETECTION
	220	/* APBH DMA is required for NAND support */
	221	#define CONFIG_APBH_DMA
	222	#define CONFIG_APBH_DMA_BURST
	223	#define CONFIG_APBH_DMA_BURST8
	224	#endif
	225
02b1343e NK	226	/* Ethernet */
	227	#define CONFIG_FEC_MXC
	228	#define CONFIG_FEC_MXC_PHYADDR 0
	229	#define CONFIG_FEC_XCV_TYPE RGMII
	230	#define IMX_FEC_BASE ENET_BASE_ADDR
	231	#define CONFIG_PHYLIB
	232	#define CONFIG_PHY_ATHEROS
	233	#define CONFIG_MII
	234	#define CONFIG_ETHPRIME "FEC0"
	235	#define CONFIG_ARP_TIMEOUT 200UL
02b1343e NK	236	#define CONFIG_NET_RETRY_COUNT 5
02b1343e NK	237
0f3effb9 NK	238	/* USB */
	239	#define CONFIG_CMD_USB
	240	#define CONFIG_USB_EHCI
	241	#define CONFIG_USB_EHCI_MX6
	242	#define CONFIG_USB_STORAGE
	243	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	244	#define CONFIG_MXC_USB_FLAGS 0
	245	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	246	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
	247
f42b2f60 NK	248	/* I2C */
	249	#define CONFIG_CMD_I2C
	250	#define CONFIG_SYS_I2C
	251	#define CONFIG_SYS_I2C_MXC
	252	#define CONFIG_SYS_I2C_SPEED 100000
	253	#define CONFIG_SYS_MXC_I2C3_SPEED 400000
	254
	255	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	256	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	257	#define CONFIG_SYS_I2C_EEPROM_BUS 2
	258
206f38f7 NK	259	/* SATA */
	260	#define CONFIG_CMD_SATA
	261	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	262	#define CONFIG_LIBATA
	263	#define CONFIG_LBA48
	264	#define CONFIG_DWC_AHSATA
	265	#define CONFIG_DWC_AHSATA_PORT_ID 0
	266	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	267
e32028a7 NK	268	/* GPIO */
	269	#define CONFIG_MXC_GPIO
	270
	271	/* Boot */
	272	#define CONFIG_ZERO_BOOTDELAY_CHECK
	273	#define CONFIG_LOADADDR 0x10800000
	274	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	275	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	276	#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
	277	#define CONFIG_SETUP_MEMORY_TAGS
	278	#define CONFIG_INITRD_TAG
f66113c0 NK	279	#define CONFIG_REVISION_TAG
f66113c0 NK	280	#define CONFIG_SERIAL_TAG
e32028a7 NK	281
	282	/* misc */
	283	#define CONFIG_SYS_GENERIC_BOARD
	284	#define CONFIG_STACKSIZE (128 * 1024)
	285	#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
	286	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
02b1343e	287	#define CONFIG_OF_BOARD_SETUP
e32028a7 NK	288
	289	/* SPL */
	290	#include "imx6_spl.h"
	291	#define CONFIG_SPL_BOARD_INIT
	292	#define CONFIG_SPL_MMC_SUPPORT
	293	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
	294	#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
	295	#define CONFIG_SPL_SPI_SUPPORT
	296	#define CONFIG_SPL_SPI_FLASH_SUPPORT
	297	#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
	298	#define CONFIG_SPL_SPI_LOAD
	299
	300	#endif /* __CONFIG_CM_FX6_H */