]>
Commit | Line | Data |
---|---|---|
8883ddaf NK |
1 | /* |
2 | * cm_t43.h | |
3 | * | |
4 | * Copyright (C) 2015 Compulab, Ltd. | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __CONFIG_CM_T43_H | |
10 | #define __CONFIG_CM_T43_H | |
11 | ||
12 | #define CONFIG_AM43XX | |
13 | #define CONFIG_CM_T43 | |
14 | #define CONFIG_ARCH_CPU_INIT | |
15 | #define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */ | |
16 | #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ | |
17 | ||
18 | #include <asm/arch/omap.h> | |
19 | ||
20 | /* Serial support */ | |
8883ddaf NK |
21 | #define CONFIG_SYS_NS16550_SERIAL |
22 | #define CONFIG_SYS_NS16550_CLK 48000000 | |
23 | #define CONFIG_SYS_NS16550_COM1 0x44e09000 | |
7ef77c02 NK |
24 | #ifdef CONFIG_SPL_BUILD |
25 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
26 | #endif | |
8883ddaf NK |
27 | |
28 | /* NAND support */ | |
29 | #define CONFIG_NAND | |
30 | #define CONFIG_NAND_OMAP_ELM | |
31 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
32 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
33 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
34 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
35 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) | |
36 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
37 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
38 | #define CONFIG_SYS_NAND_ECCBYTES 14 | |
39 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW | |
40 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ | |
41 | CONFIG_SYS_NAND_PAGE_SIZE) | |
42 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ | |
43 | 10, 11, 12, 13, 14, 15, 16, 17, \ | |
44 | 18, 19, 20, 21, 22, 23, 24, 25, \ | |
45 | 26, 27, 28, 29, 30, 31, 32, 33, \ | |
46 | 34, 35, 36, 37, 38, 39, 40, 41, \ | |
47 | 42, 43, 44, 45, 46, 47, 48, 49, \ | |
48 | 50, 51, 52, 53, 54, 55, 56, 57, } | |
49 | ||
50 | /* CPSW Ethernet support */ | |
51 | #define CONFIG_DRIVER_TI_CPSW | |
52 | #define CONFIG_MII | |
53 | #define CONFIG_BOOTP_DEFAULT | |
54 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
55 | #define CONFIG_BOOTP_GATEWAY | |
56 | #define CONFIG_NET_MULTI | |
57 | #define CONFIG_PHY_GIGE | |
58 | #define CONFIG_PHY_ATHEROS | |
59 | #define CONFIG_PHYLIB | |
60 | #define CONFIG_SYS_RX_ETH_BUFFER 64 | |
61 | ||
62 | /* USB support */ | |
8883ddaf | 63 | #define CONFIG_USB_XHCI_OMAP |
8883ddaf NK |
64 | #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 |
65 | #define CONFIG_OMAP_USB_PHY | |
66 | #define CONFIG_AM437X_USB2PHY2_HOST | |
67 | ||
68 | /* SPI Flash support */ | |
8883ddaf | 69 | #define CONFIG_TI_SPI_MMAP |
8883ddaf NK |
70 | #define CONFIG_SF_DEFAULT_SPEED 48000000 |
71 | #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 | |
72 | ||
73 | /* Power */ | |
74 | #define CONFIG_POWER | |
75 | #define CONFIG_POWER_I2C | |
76 | #define CONFIG_POWER_TPS65218 | |
77 | ||
78 | /* Enabling L2 Cache */ | |
79 | #define CONFIG_SYS_L2_PL310 | |
80 | #define CONFIG_SYS_PL310_BASE 0x48242000 | |
8883ddaf NK |
81 | |
82 | /* | |
83 | * Since SPL did pll and ddr initialization for us, | |
84 | * we don't need to do it twice. | |
85 | */ | |
86 | #if !defined(CONFIG_SPL_BUILD) | |
87 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
88 | #endif | |
89 | ||
90 | #define CONFIG_HSMMC2_8BIT | |
91 | ||
92 | #include <configs/ti_armv7_omap.h> | |
7d751d66 | 93 | #undef CONFIG_SYS_MONITOR_LEN |
8883ddaf NK |
94 | |
95 | #define CONFIG_ENV_SIZE (16 * 1024) | |
96 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG | |
97 | ||
98 | #define V_OSCK 24000000 /* Clock output from T2 */ | |
99 | #define V_SCLK (V_OSCK) | |
100 | ||
101 | #define CONFIG_ENV_IS_IN_SPI_FLASH | |
102 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) | |
103 | #define CONFIG_ENV_OFFSET (768 * 1024) | |
104 | #define CONFIG_ENV_SPI_MAX_HZ 48000000 | |
105 | ||
983e3700 | 106 | #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" |
8883ddaf | 107 | |
8883ddaf NK |
108 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
109 | "loadaddr=0x80200000\0" \ | |
110 | "fdtaddr=0x81200000\0" \ | |
111 | "bootm_size=0x8000000\0" \ | |
112 | "autoload=no\0" \ | |
113 | "console=ttyO0,115200n8\0" \ | |
114 | "fdtfile=am437x-sb-som-t43.dtb\0" \ | |
115 | "kernel=zImage-cm-t43\0" \ | |
116 | "bootscr=bootscr.img\0" \ | |
117 | "emmcroot=/dev/mmcblk0p2 rw\0" \ | |
118 | "emmcrootfstype=ext4 rootwait\0" \ | |
119 | "emmcargs=setenv bootargs console=${console} " \ | |
120 | "root=${emmcroot} " \ | |
121 | "rootfstype=${emmcrootfstype}\0" \ | |
122 | "loadbootscript=load mmc 0 ${loadaddr} ${bootscr}\0" \ | |
123 | "bootscript=echo Running bootscript from mmc ...; " \ | |
124 | "source ${loadaddr}\0" \ | |
125 | "emmcboot=echo Booting from emmc ... && " \ | |
126 | "run emmcargs && " \ | |
127 | "load mmc 1 ${loadaddr} ${kernel} && " \ | |
128 | "load mmc 1 ${fdtaddr} ${fdtfile} && " \ | |
129 | "bootz ${loadaddr} - ${fdtaddr}\0" | |
130 | ||
131 | #define CONFIG_BOOTCOMMAND \ | |
132 | "mmc dev 0; " \ | |
133 | "if mmc rescan; then " \ | |
134 | "if run loadbootscript; then " \ | |
135 | "run bootscript; " \ | |
136 | "fi; " \ | |
137 | "fi; " \ | |
138 | "mmc dev 1; " \ | |
139 | "if mmc rescan; then " \ | |
140 | "run emmcboot; " \ | |
141 | "fi;" | |
142 | ||
8883ddaf NK |
143 | #define CONFIG_CONS_INDEX 1 |
144 | ||
145 | /* SPL defines. */ | |
146 | #define CONFIG_SPL_TEXT_BASE 0x40300350 | |
8883ddaf | 147 | #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20)) |
8883ddaf | 148 | #define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024) |
7d751d66 | 149 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) |
8883ddaf NK |
150 | #define CONFIG_SPL_SPI_LOAD |
151 | ||
2d9a76b6 NK |
152 | /* EEPROM */ |
153 | #define CONFIG_CMD_EEPROM | |
154 | #define CONFIG_ENV_EEPROM_IS_ON_I2C | |
155 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 | |
156 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 | |
157 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 | |
158 | #define CONFIG_SYS_EEPROM_SIZE 256 | |
159 | ||
160 | #define CONFIG_CMD_EEPROM_LAYOUT | |
161 | #define CONFIG_EEPROM_LAYOUT_HELP_STRING "v2, v3" | |
162 | ||
8883ddaf | 163 | #endif /* __CONFIG_CM_T43_H */ |