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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
e7b860fa | 2 | /* |
9f9ecdff | 3 | * Copyright 2015-2019 Toradex, Inc. |
e7b860fa | 4 | * |
b891d010 | 5 | * Configuration settings for the Toradex VF50/VF61 modules. |
e7b860fa SM |
6 | * |
7 | * Based on vf610twr.h: | |
8 | * Copyright 2013 Freescale Semiconductor, Inc. | |
e7b860fa SM |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
14 | #include <asm/arch/imx-regs.h> | |
c12e415c | 15 | #include <linux/sizes.h> |
e7b860fa | 16 | |
18fb0e3c | 17 | #define CONFIG_SYS_FSL_CLK |
e7b860fa | 18 | |
e7b860fa SM |
19 | #define CONFIG_SKIP_LOWLEVEL_INIT |
20 | ||
80b9c3bb | 21 | #ifdef CONFIG_VIDEO_FSL_DCU_FB |
80b9c3bb SA |
22 | #define CONFIG_SPLASH_SCREEN_ALIGN |
23 | #define CONFIG_VIDEO_LOGO | |
24 | #define CONFIG_VIDEO_BMP_LOGO | |
25 | #define CONFIG_SYS_FSL_DCU_LE | |
26 | ||
27 | #define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR | |
28 | #define DCU_LAYER_MAX_NUM 64 | |
29 | #endif | |
30 | ||
e7b860fa | 31 | /* Size of malloc() pool */ |
c12e415c | 32 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M) |
e7b860fa | 33 | |
e7b860fa SM |
34 | /* Allow to overwrite serial and ethaddr */ |
35 | #define CONFIG_ENV_OVERWRITE | |
e7b860fa SM |
36 | |
37 | /* NAND support */ | |
8fca2d8c | 38 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
e7b860fa | 39 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
e7b860fa SM |
40 | |
41 | #define CONFIG_IPADDR 192.168.10.2 | |
42 | #define CONFIG_NETMASK 255.255.255.0 | |
43 | #define CONFIG_SERVERIP 192.168.10.1 | |
44 | ||
e7b860fa SM |
45 | #define CONFIG_LOADADDR 0x80008000 |
46 | #define CONFIG_FDTADDR 0x84000000 | |
47 | ||
48 | /* We boot from the gfxRAM area of the OCRAM. */ | |
c0f432c3 | 49 | #define CONFIG_BOARD_SIZE_LIMIT 520192 |
e7b860fa | 50 | |
06487fd1 SA |
51 | #define MEM_LAYOUT_ENV_SETTINGS \ |
52 | "bootm_size=0x10000000\0" \ | |
53 | "fdt_addr_r=0x82000000\0" \ | |
06487fd1 SA |
54 | "kernel_addr_r=0x81000000\0" \ |
55 | "pxefile_addr_r=0x87100000\0" \ | |
56 | "ramdisk_addr_r=0x82100000\0" \ | |
57 | "scriptaddr=0x87000000\0" | |
e7b860fa | 58 | |
97c42757 IO |
59 | #define UBOOT_UPDATE \ |
60 | "update_uboot=nand erase.part u-boot && " \ | |
61 | "nand write ${loadaddr} u-boot ${filesize}\0" \ | |
62 | ||
e7b860fa SM |
63 | #define NFS_BOOTCMD \ |
64 | "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ | |
65 | "nfsboot=run setup; " \ | |
66 | "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \ | |
67 | "${setupargs} ${vidargs}; echo Booting from NFS...;" \ | |
68 | "dhcp ${kernel_addr_r} && " \ | |
69 | "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ | |
faf1e62b | 70 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
e7b860fa | 71 | |
06487fd1 | 72 | #define SD_BOOTCMD \ |
95791322 IO |
73 | "set_sdargs=setenv sdargs root=PARTUUID=${uuid} ro rootwait\0" \ |
74 | "sdboot=run setup; run sdfinduuid; run set_sdargs; " \ | |
75 | "setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \ | |
06487fd1 | 76 | "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ |
95791322 IO |
77 | "load mmc ${sddev}:${sdbootpart} ${kernel_addr_r} ${kernel_file} && " \ |
78 | "load mmc ${sddev}:${sdbootpart} ${fdt_addr_r} " \ | |
79 | "${soc}-colibri-${fdt_board}.dtb && " \ | |
06487fd1 | 80 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
95791322 IO |
81 | "sdbootpart=1\0" \ |
82 | "sddev=0\0" \ | |
83 | "sdfinduuid=part uuid mmc ${sddev}:${sdrootpart} uuid\0" \ | |
84 | "sdrootpart=2\0" | |
85 | ||
06487fd1 SA |
86 | |
87 | #define UBI_BOOTCMD \ | |
e7b860fa SM |
88 | "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ |
89 | "ubi.fm_autoconvert=1\0" \ | |
90 | "ubiboot=run setup; " \ | |
91 | "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \ | |
92 | "${setupargs} ${vidargs}; echo Booting from NAND...; " \ | |
3ed82d6f SM |
93 | "ubi part ubi && " \ |
94 | "ubi read ${kernel_addr_r} kernel && " \ | |
95 | "ubi read ${fdt_addr_r} dtb && " \ | |
faf1e62b | 96 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
e7b860fa | 97 | |
304042c1 SA |
98 | #define CONFIG_BOOTCOMMAND "run ubiboot; " \ |
99 | "setenv fdtfile ${soc}-colibri-${fdt_board}.dtb && run distro_bootcmd;" | |
06487fd1 SA |
100 | |
101 | #define BOOT_TARGET_DEVICES(func) \ | |
102 | func(MMC, mmc, 0) \ | |
103 | func(USB, usb, 0) \ | |
104 | func(DHCP, dhcp, na) | |
105 | #include <config_distro_bootcmd.h> | |
106 | #undef BOOTENV_RUN_NET_USB_START | |
107 | #define BOOTENV_RUN_NET_USB_START "" | |
e7b860fa | 108 | |
bba97cd2 SM |
109 | #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" |
110 | ||
e7b860fa | 111 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
06487fd1 SA |
112 | BOOTENV \ |
113 | MEM_LAYOUT_ENV_SETTINGS \ | |
114 | NFS_BOOTCMD \ | |
115 | SD_BOOTCMD \ | |
116 | UBI_BOOTCMD \ | |
97c42757 | 117 | UBOOT_UPDATE \ |
06487fd1 | 118 | "console=ttyLP0\0" \ |
389d680f | 119 | "defargs=user_debug=30\0" \ |
06487fd1 | 120 | "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ |
e7b860fa | 121 | "fdt_board=eval-v3\0" \ |
faf1e62b | 122 | "fdt_fixup=;\0" \ |
06487fd1 SA |
123 | "kernel_file=zImage\0" \ |
124 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ | |
e7b860fa | 125 | "setsdupdate=mmc rescan && set interface mmc && " \ |
06487fd1 SA |
126 | "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ |
127 | "source ${loadaddr}\0" \ | |
128 | "setup=setenv setupargs console=tty1 console=${console}" \ | |
129 | ",${baudrate}n8 ${memargs}\0" \ | |
e7b860fa | 130 | "setupdate=run setsdupdate || run setusbupdate\0" \ |
06487fd1 SA |
131 | "setusbupdate=usb start && set interface usb && " \ |
132 | "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ | |
133 | "source ${loadaddr}\0" \ | |
80b9c3bb | 134 | "splashpos=m,m\0" \ |
06487fd1 | 135 | "video-mode=dcufb:640x480-16@60,monitor=lcd\0" |
e7b860fa SM |
136 | |
137 | /* Miscellaneous configurable options */ | |
aa5a0d98 | 138 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
e7b860fa SM |
139 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
140 | ||
e7b860fa SM |
141 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
142 | #define CONFIG_SYS_HZ 1000 | |
e7b860fa | 143 | |
e7b860fa | 144 | /* Physical memory map */ |
e7b860fa | 145 | #define PHYS_SDRAM (0x80000000) |
c12e415c | 146 | #define PHYS_SDRAM_SIZE (256 * SZ_1M) |
e7b860fa SM |
147 | |
148 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
149 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
150 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
151 | ||
152 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
153 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
154 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
155 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
156 | ||
157 | /* Environment organization */ | |
e7b860fa | 158 | #ifdef CONFIG_ENV_IS_IN_NAND |
e7b860fa | 159 | #define CONFIG_ENV_RANGE (4 * 64 * 2048) |
e7b860fa SM |
160 | #endif |
161 | ||
bba97cd2 | 162 | /* USB Host Support */ |
bba97cd2 SM |
163 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
164 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
165 | ||
bba97cd2 | 166 | /* USB DFU */ |
c12e415c | 167 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) |
bba97cd2 | 168 | |
e7b860fa | 169 | #endif /* __CONFIG_H */ |