]> git.ipfire.org Git - thirdparty/u-boot.git/blame - include/configs/coreboot.h
Add GPL-2.0+ SPDX-License-Identifier to source files
[thirdparty/u-boot.git] / include / configs / coreboot.h
CommitLineData
ef5a5b00
GB
1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2008
4 * Graeme Russ, graeme.russ@gmail.com.
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
ef5a5b00
GB
7 */
8
9#include <asm/ibmpc.h>
10/*
11 * board/config.h - configuration options, board specific
12 */
13
14#ifndef __CONFIG_H
15#define __CONFIG_H
16
17/*
18 * High Level Configuration Options
19 * (easy to change)
20 */
21#define CONFIG_SYS_COREBOOT
300081aa 22#define CONFIG_SHOW_BOOT_PROGRESS
ef5a5b00 23#define CONFIG_LAST_STAGE_INIT
a78d4947 24#define CONFIG_SYS_VSNPRINTF
34d6057b 25#define CONFIG_ZBOOT_32
ac426b72 26#define CONFIG_PHYSMEM
617c246f 27#define CONFIG_SYS_EARLY_PCI_INIT
ef5a5b00 28
fc959081
SG
29#define CONFIG_LMB
30#define CONFIG_OF_LIBFDT
31#define CONFIG_OF_CONTROL
32#define CONFIG_OF_SEPARATE
33#define CONFIG_DEFAULT_DEVICE_TREE link
34
2e65959b
SG
35#define CONFIG_BOOTSTAGE
36#define CONFIG_BOOTSTAGE_REPORT
37#define CONFIG_BOOTSTAGE_FDT
38#define CONFIG_CMD_BOOTSTAGE
39/* Place to stash bootstage data from first-stage U-Boot */
40#define CONFIG_BOOTSTAGE_STASH 0x0110f000
41#define CONFIG_BOOTSTAGE_STASH_SIZE 0x7fc
42#define CONFIG_BOOTSTAGE_USER_COUNT 60
43
04dbf77d
SG
44#define CONFIG_LZO
45#undef CONFIG_ZLIB
46#undef CONFIG_GZIP
47
ef5a5b00
GB
48/*-----------------------------------------------------------------------
49 * Watchdog Configuration
50 */
51#undef CONFIG_WATCHDOG
52#undef CONFIG_HW_WATCHDOG
53
51bdad67
SG
54/* SATA AHCI storage */
55
56#define CONFIG_SCSI_AHCI
57
58#ifdef CONFIG_SCSI_AHCI
59#define CONFIG_SYS_64BIT_LBA
60#define CONFIG_SATA_INTEL 1
61#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
62 PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
63 {PCI_VENDOR_ID_INTEL, \
64 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
65 {PCI_VENDOR_ID_INTEL, \
66 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
67 {PCI_VENDOR_ID_INTEL, \
68 PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
69
70#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
71#define CONFIG_SYS_SCSI_MAX_LUN 1
72#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
73 CONFIG_SYS_SCSI_MAX_LUN)
74#endif
75
d02a568e 76/* Generic TPM interfaced through LPC bus */
5bdf46b7
TWHT
77#define CONFIG_TPM
78#define CONFIG_TPM_TIS_LPC
d02a568e
SG
79#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000
80
ef5a5b00
GB
81/*-----------------------------------------------------------------------
82 * Real Time Clock Configuration
83 */
84#define CONFIG_RTC_MC146818
85#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
cbca883c 86#define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS
ef5a5b00
GB
87
88/*-----------------------------------------------------------------------
89 * Serial Configuration
90 */
ef5a5b00
GB
91#define CONFIG_CONS_INDEX 1
92#define CONFIG_SYS_NS16550
93#define CONFIG_SYS_NS16550_SERIAL
94#define CONFIG_SYS_NS16550_REG_SIZE 1
95#define CONFIG_SYS_NS16550_CLK 1843200
96#define CONFIG_BAUDRATE 9600
97#define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \
98 9600, 19200, 38400, 115200}
99#define CONFIG_SYS_NS16550_COM1 UART0_BASE
100#define CONFIG_SYS_NS16550_COM2 UART1_BASE
101#define CONFIG_SYS_NS16550_PORT_MAPPED
102
420a2ca7
SG
103#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,eserial0\0" \
104 "stdout=vga,eserial0,cbmem\0" \
105 "stderr=vga,eserial0,cbmem\0"
106
107#define CONFIG_CONSOLE_MUX
108#define CONFIG_SYS_CONSOLE_IS_IN_ENV
109#define CONFIG_SYS_STDIO_DEREGISTER
110#define CONFIG_CBMEM_CONSOLE
111
ac426b72
SG
112#define CONFIG_CMDLINE_EDITING
113#define CONFIG_COMMAND_HISTORY
114#define CONFIG_AUTOCOMPLETE
ef5a5b00
GB
115
116#define CONFIG_SUPPORT_VFAT
117/************************************************************
118 * ATAPI support (experimental)
119 ************************************************************/
120#define CONFIG_ATAPI
121
122/************************************************************
123 * DISK Partition support
124 ************************************************************/
d954a431 125#define CONFIG_EFI_PARTITION
ef5a5b00
GB
126#define CONFIG_DOS_PARTITION
127#define CONFIG_MAC_PARTITION
128#define CONFIG_ISO_PARTITION /* Experimental */
129
d954a431 130#define CONFIG_CMD_PART
af9f881a
SG
131#define CONFIG_CMD_CBFS
132#define CONFIG_CMD_EXT4
133#define CONFIG_CMD_EXT4_WRITE
d954a431 134#define CONFIG_PARTITION_UUIDS
ef5a5b00
GB
135
136/*-----------------------------------------------------------------------
137 * Video Configuration
138 */
cbca883c
SG
139#define CONFIG_VIDEO
140#define CONFIG_VIDEO_COREBOOT
141#define CONFIG_VIDEO_SW_CURSOR
142#define VIDEO_FB_16BPP_WORD_SWAP
143#define CONFIG_I8042_KBD
144#define CONFIG_CFB_CONSOLE
145#define CONFIG_SYS_CONSOLE_INFO_QUIET
ef5a5b00 146
a7e6d549
SG
147/* x86 GPIOs are accessed through a PCI device */
148#define CONFIG_INTEL_ICH6_GPIO
149
ef5a5b00
GB
150/*-----------------------------------------------------------------------
151 * Command line configuration.
152 */
153#include <config_cmd_default.h>
154
b5f31937
SG
155#define CONFIG_TRACE
156#define CONFIG_CMD_TRACE
157#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
158#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
159#define CONFIG_TRACE_EARLY
160#define CONFIG_TRACE_EARLY_ADDR 0x01400000
161
ef5a5b00
GB
162#define CONFIG_CMD_BDI
163#define CONFIG_CMD_BOOTD
164#define CONFIG_CMD_CONSOLE
165#define CONFIG_CMD_DATE
166#define CONFIG_CMD_ECHO
167#undef CONFIG_CMD_FLASH
168#define CONFIG_CMD_FPGA
a7e6d549 169#define CONFIG_CMD_GPIO
ef5a5b00
GB
170#define CONFIG_CMD_IMI
171#undef CONFIG_CMD_IMLS
a08afb39 172#define CONFIG_CMD_IO
ef5a5b00
GB
173#define CONFIG_CMD_IRQ
174#define CONFIG_CMD_ITEST
175#define CONFIG_CMD_LOADB
176#define CONFIG_CMD_LOADS
177#define CONFIG_CMD_MEMORY
178#define CONFIG_CMD_MISC
179#define CONFIG_CMD_NET
180#undef CONFIG_CMD_NFS
181#define CONFIG_CMD_PCI
182#define CONFIG_CMD_PING
183#define CONFIG_CMD_RUN
184#define CONFIG_CMD_SAVEENV
185#define CONFIG_CMD_SETGETDCR
186#define CONFIG_CMD_SOURCE
363464f9
SG
187#define CONFIG_CMD_TIME
188#define CONFIG_CMD_GETTIME
ef5a5b00 189#define CONFIG_CMD_XIMG
ac426b72
SG
190#define CONFIG_CMD_SCSI
191
ef5a5b00
GB
192#define CONFIG_CMD_FAT
193#define CONFIG_CMD_EXT2
194
34d6057b
SG
195#define CONFIG_CMD_ZBOOT
196
ef5a5b00 197#define CONFIG_BOOTDELAY 2
ac426b72
SG
198#define CONFIG_BOOTARGS \
199 "root=/dev/sdb3 init=/sbin/init rootwait ro"
200#define CONFIG_BOOTCOMMAND \
201 "ext2load scsi 0:3 01000000 /boot/vmlinuz; zboot 01000000"
202
ef5a5b00
GB
203
204#if defined(CONFIG_CMD_KGDB)
205#define CONFIG_KGDB_BAUDRATE 115200
206#define CONFIG_KGDB_SER_INDEX 2
207#endif
208
209/*
210 * Miscellaneous configurable options
211 */
212#define CONFIG_SYS_LONGHELP
213#define CONFIG_SYS_PROMPT "boot > "
214#define CONFIG_SYS_CBSIZE 256
215#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
216 sizeof(CONFIG_SYS_PROMPT) + \
217 16)
218#define CONFIG_SYS_MAXARGS 16
219#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
220
221#define CONFIG_SYS_MEMTEST_START 0x00100000
222#define CONFIG_SYS_MEMTEST_END 0x01000000
223#define CONFIG_SYS_LOAD_ADDR 0x100000
224#define CONFIG_SYS_HZ 1000
ef5a5b00
GB
225
226/*-----------------------------------------------------------------------
227 * SDRAM Configuration
228 */
229#define CONFIG_NR_DRAM_BANKS 4
230
231/* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
232#undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
233#undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
234#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
235#undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
236
237/*-----------------------------------------------------------------------
238 * CPU Features
239 */
240
e761ecdb 241#define CONFIG_SYS_X86_TSC_TIMER
ef5a5b00 242#define CONFIG_SYS_PCAT_INTERRUPTS
d0b6f247 243#define CONFIG_SYS_PCAT_TIMER
ef5a5b00
GB
244#define CONFIG_SYS_NUM_IRQS 16
245
246/*-----------------------------------------------------------------------
247 * Memory organization:
248 * 32kB Stack
249 * 16kB Cache-As-RAM @ 0x19200000
250 * 256kB Monitor
251 * (128kB + Environment Sector Size) malloc pool
252 */
253#define CONFIG_SYS_STACK_SIZE (32 * 1024)
8d61625d
GR
254#define CONFIG_SYS_CAR_ADDR 0x19200000
255#define CONFIG_SYS_CAR_SIZE (16 * 1024)
ef5a5b00
GB
256#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
257#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
258#define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024)
ef5a5b00
GB
259
260
261/* allow to overwrite serial and ethaddr */
262#define CONFIG_ENV_OVERWRITE
263
264/*-----------------------------------------------------------------------
265 * FLASH configuration
266 */
e30bd5cf
SG
267#define CONFIG_ICH_SPI
268#define CONFIG_SPI_FLASH
269#define CONFIG_SPI_FLASH_MACRONIX
270#define CONFIG_SPI_FLASH_WINBOND
271#define CONFIG_SPI_FLASH_GIGADEVICE
ef5a5b00 272#define CONFIG_SYS_NO_FLASH
e30bd5cf
SG
273#define CONFIG_CMD_SF
274#define CONFIG_CMD_SF_TEST
275#define CONFIG_CMD_SPI
276#define CONFIG_SPI
ef5a5b00
GB
277
278/*-----------------------------------------------------------------------
279 * Environment configuration
280 */
281#define CONFIG_ENV_IS_NOWHERE
282#define CONFIG_ENV_SIZE 0x01000
283
284/*-----------------------------------------------------------------------
285 * PCI configuration
286 */
287#define CONFIG_PCI
288
0641ce5b
SG
289/*-----------------------------------------------------------------------
290 * USB configuration
291 */
292#define CONFIG_USB_EHCI
293#define CONFIG_USB_EHCI_PCI
294#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 12
295#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
296#define CONFIG_USB_STORAGE
297#define CONFIG_USB_KEYBOARD
298#define CONFIG_SYS_USB_EVENT_POLL
299
300#define CONFIG_USB_HOST_ETHER
301#define CONFIG_USB_ETHER_ASIX
302#define CONFIG_USB_ETHER_SMSC95XX
303
304#define CONFIG_CMD_USB
305
420a2ca7
SG
306#define CONFIG_EXTRA_ENV_SETTINGS \
307 CONFIG_STD_DEVICES_SETTINGS
308
ef5a5b00 309#endif /* __CONFIG_H */