[people/ms/u-boot.git] / include / configs / coreboot.h

/*
 * Copyright (c) 2011 The Chromium OS Authors.
 * (C) Copyright 2008
 * Graeme Russ, graeme.russ@gmail.com.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <asm/ibmpc.h>
/*
 * board/config.h - configuration options, board specific
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_SYS_COREBOOT
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_LAST_STAGE_INIT


/*-----------------------------------------------------------------------
 * Watchdog Configuration
 */
#undef CONFIG_WATCHDOG
#undef CONFIG_HW_WATCHDOG

/*-----------------------------------------------------------------------
 * Real Time Clock Configuration
 */
#define CONFIG_RTC_MC146818
#define CONFIG_SYS_ISA_IO_BASE_ADDRESS	0

/*-----------------------------------------------------------------------
 * Serial Configuration
 */
#define CONFIG_CONS_INDEX		1
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	1
#define CONFIG_SYS_NS16550_CLK		1843200
#define CONFIG_BAUDRATE			9600
#define CONFIG_SYS_BAUDRATE_TABLE	{300, 600, 1200, 2400, 4800, \
					 9600, 19200, 38400, 115200}
#define CONFIG_SYS_NS16550_COM1	UART0_BASE
#define CONFIG_SYS_NS16550_COM2	UART1_BASE
#define CONFIG_SYS_NS16550_PORT_MAPPED

/* max. 1 IDE bus	*/
#define CONFIG_SYS_IDE_MAXBUS		1
/* max. 1 drive per IDE bus */
#define CONFIG_SYS_IDE_MAXDEVICE	(CONFIG_SYS_IDE_MAXBUS * 1)

#define CONFIG_SYS_ATA_BASE_ADDR	CONFIG_SYS_ISA_IO_BASE_ADDRESS
#define CONFIG_SYS_ATA_IDE0_OFFSET	0x01f0
#define CONFIG_SYS_ATA_IDE1_OFFSET	0x0170
#define CONFIG_SYS_ATA_DATA_OFFSET	0
#define CONFIG_SYS_ATA_REG_OFFSET	0
#define CONFIG_SYS_ATA_ALT_OFFSET	0x200


#define CONFIG_SUPPORT_VFAT
/************************************************************
 * ATAPI support (experimental)
 ************************************************************/
#define CONFIG_ATAPI

/************************************************************
 * DISK Partition support
 ************************************************************/
#define CONFIG_DOS_PARTITION
#define CONFIG_MAC_PARTITION
#define CONFIG_ISO_PARTITION		/* Experimental */


/*-----------------------------------------------------------------------
 * Video Configuration
 */
#undef CONFIG_VIDEO
#undef CONFIG_CFB_CONSOLE

/*-----------------------------------------------------------------------
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_BDI
#define CONFIG_CMD_BOOTD
#define CONFIG_CMD_CONSOLE
#define CONFIG_CMD_DATE
#define CONFIG_CMD_ECHO
#undef CONFIG_CMD_FLASH
#define CONFIG_CMD_FPGA
#define CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_ITEST
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_LOADS
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_MISC
#define CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#define CONFIG_CMD_PCI
#define CONFIG_CMD_PING
#define CONFIG_CMD_RUN
#define CONFIG_CMD_SAVEENV
#define CONFIG_CMD_SETGETDCR
#define CONFIG_CMD_SOURCE
#define CONFIG_CMD_XIMG
#define CONFIG_CMD_IDE
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2

#define CONFIG_BOOTDELAY	2
#define CONFIG_BOOTARGS		"root=/dev/mtdblock0 console=ttyS0,9600"

#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE			115200
#define CONFIG_KGDB_SER_INDEX			2
#endif

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT			"boot > "
#define CONFIG_SYS_CBSIZE			256
#define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE + \
						 sizeof(CONFIG_SYS_PROMPT) + \
						 16)
#define CONFIG_SYS_MAXARGS			16
#define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE

#define CONFIG_SYS_MEMTEST_START		0x00100000
#define CONFIG_SYS_MEMTEST_END			0x01000000
#define CONFIG_SYS_LOAD_ADDR			0x100000
#define CONFIG_SYS_HZ				1000
#define CONFIG_SYS_X86_ISR_TIMER

/*-----------------------------------------------------------------------
 * SDRAM Configuration
 */
#define CONFIG_NR_DRAM_BANKS			4

/* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
#undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
#undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
#undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T

/*-----------------------------------------------------------------------
 * CPU Features
 */

#define CONFIG_SYS_GENERIC_TIMER
#define CONFIG_SYS_PCAT_INTERRUPTS
#define CONFIG_SYS_NUM_IRQS			16

/*-----------------------------------------------------------------------
 * Memory organization:
 * 32kB Stack
 * 16kB Cache-As-RAM @ 0x19200000
 * 256kB Monitor
 * (128kB + Environment Sector Size) malloc pool
 */
#define CONFIG_SYS_STACK_SIZE			(32 * 1024)
#define CONFIG_SYS_INIT_SP_ADDR		(256 * 1024 + 16 * 1024)
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_MONITOR_LEN			(256 * 1024)
#define CONFIG_SYS_MALLOC_LEN			(0x20000 + 128 * 1024)
/* Address of temporary Global Data */
#define CONFIG_SYS_INIT_GD_ADDR		(256 * 1024)


/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/*-----------------------------------------------------------------------
 * FLASH configuration
 */
#define CONFIG_SYS_NO_FLASH
#undef CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_MAX_FLASH_SECT		1
#define CONFIG_SYS_MAX_FLASH_BANKS		1

/*-----------------------------------------------------------------------
 * Environment configuration
 */
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE			0x01000

/*-----------------------------------------------------------------------
 * PCI configuration
 */
#define CONFIG_PCI

#endif	/* __CONFIG_H */
Commit	Line	Data
ef5a5b00 GB	1	/*
	2	* Copyright (c) 2011 The Chromium OS Authors.
	3	* (C) Copyright 2008
	4	* Graeme Russ, graeme.russ@gmail.com.
	5	*
	6	* See file CREDITS for list of people who contributed to this
	7	* project.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	22	* MA 02111-1307 USA
	23	*/
	24
	25	#include <asm/ibmpc.h>
	26	/*
	27	* board/config.h - configuration options, board specific
	28	*/
	29
	30	#ifndef __CONFIG_H
	31	#define __CONFIG_H
	32
	33	/*
	34	* High Level Configuration Options
	35	* (easy to change)
	36	*/
	37	#define CONFIG_SYS_COREBOOT
	38	#undef CONFIG_SHOW_BOOT_PROGRESS
	39	#define CONFIG_LAST_STAGE_INIT
	40
	41
	42	/*-----------------------------------------------------------------------
	43	* Watchdog Configuration
	44	*/
	45	#undef CONFIG_WATCHDOG
	46	#undef CONFIG_HW_WATCHDOG
	47
	48	/*-----------------------------------------------------------------------
	49	* Real Time Clock Configuration
	50	*/
	51	#define CONFIG_RTC_MC146818
	52	#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
	53
	54	/*-----------------------------------------------------------------------
	55	* Serial Configuration
	56	*/
ef5a5b00 GB	57	#define CONFIG_CONS_INDEX 1
	58	#define CONFIG_SYS_NS16550
	59	#define CONFIG_SYS_NS16550_SERIAL
	60	#define CONFIG_SYS_NS16550_REG_SIZE 1
	61	#define CONFIG_SYS_NS16550_CLK 1843200
	62	#define CONFIG_BAUDRATE 9600
	63	#define CONFIG_SYS_BAUDRATE_TABLE {300, 600, 1200, 2400, 4800, \
	64	9600, 19200, 38400, 115200}
	65	#define CONFIG_SYS_NS16550_COM1 UART0_BASE
	66	#define CONFIG_SYS_NS16550_COM2 UART1_BASE
	67	#define CONFIG_SYS_NS16550_PORT_MAPPED
	68
	69	/* max. 1 IDE bus */
	70	#define CONFIG_SYS_IDE_MAXBUS 1
	71	/* max. 1 drive per IDE bus */
	72	#define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1)
	73
	74	#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
	75	#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
	76	#define CONFIG_SYS_ATA_IDE1_OFFSET 0x0170
	77	#define CONFIG_SYS_ATA_DATA_OFFSET 0
	78	#define CONFIG_SYS_ATA_REG_OFFSET 0
	79	#define CONFIG_SYS_ATA_ALT_OFFSET 0x200
	80
	81
	82	#define CONFIG_SUPPORT_VFAT
	83	/************************************************************
	84	* ATAPI support (experimental)
	85	************************************************************/
	86	#define CONFIG_ATAPI
	87
	88	/************************************************************
	89	* DISK Partition support
	90	************************************************************/
	91	#define CONFIG_DOS_PARTITION
	92	#define CONFIG_MAC_PARTITION
	93	#define CONFIG_ISO_PARTITION /* Experimental */
	94
	95
	96	/*-----------------------------------------------------------------------
	97	* Video Configuration
	98	*/
	99	#undef CONFIG_VIDEO
	100	#undef CONFIG_CFB_CONSOLE
	101
	102	/*-----------------------------------------------------------------------
	103	* Command line configuration.
	104	*/
	105	#include <config_cmd_default.h>
	106
	107	#define CONFIG_CMD_BDI
	108	#define CONFIG_CMD_BOOTD
	109	#define CONFIG_CMD_CONSOLE
	110	#define CONFIG_CMD_DATE
	111	#define CONFIG_CMD_ECHO
	112	#undef CONFIG_CMD_FLASH
	113	#define CONFIG_CMD_FPGA
	114	#define CONFIG_CMD_IMI
	115	#undef CONFIG_CMD_IMLS
	116	#define CONFIG_CMD_IRQ
	117	#define CONFIG_CMD_ITEST
	118	#define CONFIG_CMD_LOADB
	119	#define CONFIG_CMD_LOADS
	120	#define CONFIG_CMD_MEMORY
121	#define CONFIG_CMD_MISC
122	#define CONFIG_CMD_NET
123	#undef CONFIG_CMD_NFS
124	#define CONFIG_CMD_PCI
125	#define CONFIG_CMD_PING
126	#define CONFIG_CMD_RUN
127	#define CONFIG_CMD_SAVEENV
128	#define CONFIG_CMD_SETGETDCR
129	#define CONFIG_CMD_SOURCE
130	#define CONFIG_CMD_XIMG
131	#define CONFIG_CMD_IDE
132	#define CONFIG_CMD_FAT
133	#define CONFIG_CMD_EXT2
134
135	#define CONFIG_BOOTDELAY 2
136	#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
137
138	#if defined(CONFIG_CMD_KGDB)
139	#define CONFIG_KGDB_BAUDRATE 115200
140	#define CONFIG_KGDB_SER_INDEX 2
141	#endif
142
143	/*
144	* Miscellaneous configurable options
145	*/
146	#define CONFIG_SYS_LONGHELP
147	#define CONFIG_SYS_PROMPT "boot > "
148	#define CONFIG_SYS_CBSIZE 256
149	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
150	sizeof(CONFIG_SYS_PROMPT) + \
151	16)
152	#define CONFIG_SYS_MAXARGS 16
153	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
154
155	#define CONFIG_SYS_MEMTEST_START 0x00100000
156	#define CONFIG_SYS_MEMTEST_END 0x01000000
157	#define CONFIG_SYS_LOAD_ADDR 0x100000
158	#define CONFIG_SYS_HZ 1000
159	#define CONFIG_SYS_X86_ISR_TIMER
160
161	/*-----------------------------------------------------------------------
162	* SDRAM Configuration
163	*/
164	#define CONFIG_NR_DRAM_BANKS 4
165
166	/* CONFIG_SYS_SDRAM_DRCTMCTL Overrides the following*/
167	#undef CONFIG_SYS_SDRAM_PRECHARGE_DELAY
168	#undef CONFIG_SYS_SDRAM_RAS_CAS_DELAY
169	#undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
170	#undef CONFIG_SYS_SDRAM_CAS_LATENCY_3T
171
172	/*-----------------------------------------------------------------------
173	* CPU Features
174	*/
175
176	#define CONFIG_SYS_GENERIC_TIMER
177	#define CONFIG_SYS_PCAT_INTERRUPTS
178	#define CONFIG_SYS_NUM_IRQS 16
179
180	/*-----------------------------------------------------------------------
181	* Memory organization:
182	* 32kB Stack
183	* 16kB Cache-As-RAM @ 0x19200000
184	* 256kB Monitor
185	* (128kB + Environment Sector Size) malloc pool
186	*/
187	#define CONFIG_SYS_STACK_SIZE (32 * 1024)
188	#define CONFIG_SYS_INIT_SP_ADDR (256 * 1024 + 16 * 1024)
189	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
190	#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
191	#define CONFIG_SYS_MALLOC_LEN (0x20000 + 128 * 1024)
192	/* Address of temporary Global Data */
193	#define CONFIG_SYS_INIT_GD_ADDR (256 * 1024)
194
195
196	/* allow to overwrite serial and ethaddr */
197	#define CONFIG_ENV_OVERWRITE
198
199	/*-----------------------------------------------------------------------
200	* FLASH configuration
201	*/
202	#define CONFIG_SYS_NO_FLASH
203	#undef CONFIG_FLASH_CFI_DRIVER
204	#define CONFIG_SYS_MAX_FLASH_SECT 1
205	#define CONFIG_SYS_MAX_FLASH_BANKS 1
206
207	/*-----------------------------------------------------------------------
208	* Environment configuration
209	*/
210	#define CONFIG_ENV_IS_NOWHERE
211	#define CONFIG_ENV_SIZE 0x01000
212
213	/*-----------------------------------------------------------------------
214	* PCI configuration
215	*/
216	#define CONFIG_PCI
217
ef5a5b00	218	#endif /* __CONFIG_H */