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b89ac72a HS |
1 | /* |
2 | * Common board functions for siemens AT91SAM9G45 based boards | |
3 | * (C) Copyright 2013 Siemens AG | |
4 | * | |
5 | * Based on: | |
6 | * U-Boot file: include/configs/at91sam9m10g45ek.h | |
7 | * (C) Copyright 2007-2008 | |
8 | * Stelian Pop <stelian@popies.net> | |
9 | * Lead Tech Design <www.leadtechdesign.com> | |
10 | * | |
11 | * SPDX-License-Identifier: GPL-2.0+ | |
12 | */ | |
13 | ||
14 | #ifndef __CONFIG_H | |
15 | #define __CONFIG_H | |
16 | ||
17 | #include <asm/hardware.h> | |
fd45a0d1 | 18 | #include <linux/sizes.h> |
b89ac72a | 19 | |
b89ac72a HS |
20 | /* |
21 | * Warning: changing CONFIG_SYS_TEXT_BASE requires | |
22 | * adapting the initial boot program. | |
23 | * Since the linker has to swallow that define, we must use a pure | |
24 | * hex number here! | |
25 | */ | |
26 | ||
b89ac72a HS |
27 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ |
28 | ||
29 | /* ARM asynchronous clock */ | |
30 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 | |
31 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ | |
b89ac72a | 32 | |
b89ac72a HS |
33 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
34 | #define CONFIG_SETUP_MEMORY_TAGS | |
35 | #define CONFIG_INITRD_TAG | |
289f979c | 36 | #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY |
b89ac72a | 37 | |
b89ac72a HS |
38 | /* general purpose I/O */ |
39 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ | |
40 | #define CONFIG_AT91_GPIO | |
41 | #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ | |
42 | ||
43 | /* serial console */ | |
b89ac72a HS |
44 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
45 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
46 | ||
47 | /* LED */ | |
48 | #define CONFIG_AT91_LED | |
49 | #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ | |
50 | #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ | |
51 | ||
b89ac72a HS |
52 | |
53 | /* | |
54 | * BOOTP options | |
55 | */ | |
56 | #define CONFIG_BOOTP_BOOTFILESIZE | |
57 | #define CONFIG_BOOTP_BOOTPATH | |
58 | #define CONFIG_BOOTP_GATEWAY | |
59 | #define CONFIG_BOOTP_HOSTNAME | |
60 | ||
b89ac72a HS |
61 | /* SDRAM */ |
62 | #define CONFIG_NR_DRAM_BANKS 1 | |
63 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 | |
64 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 | |
65 | ||
66 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
72fa5893 | 67 | (CONFIG_SYS_SDRAM_BASE + SZ_32K - GENERATED_GBL_DATA_SIZE) |
b89ac72a | 68 | |
b89ac72a HS |
69 | /* NAND flash */ |
70 | #ifdef CONFIG_CMD_NAND | |
71 | #define CONFIG_NAND_ATMEL | |
72 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
73 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 | |
74 | #define CONFIG_SYS_NAND_DBW_8 | |
75 | /* our ALE is AD21 */ | |
76 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
77 | /* our CLE is AD22 */ | |
78 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
79 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
a5f8ccae | 80 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 |
b89ac72a HS |
81 | #endif |
82 | ||
83 | /* Ethernet */ | |
84 | #define CONFIG_MACB | |
85 | #define CONFIG_RMII | |
86 | #define CONFIG_NET_RETRY_COUNT 20 | |
87 | #define CONFIG_AT91_WANTS_COMMON_PHY | |
88 | ||
e11793bc HS |
89 | #define CONFIG_MTD_DEVICE |
90 | #define CONFIG_MTD_PARTITIONS | |
91 | ||
e11793bc | 92 | /* DFU class support */ |
e11793bc HS |
93 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) |
94 | #define DFU_MANIFEST_POLL_TIMEOUT 25000 | |
95 | ||
e11793bc | 96 | #define CONFIG_SYS_LOAD_ADDR ATMEL_BASE_CS6 |
b89ac72a HS |
97 | |
98 | /* bootstrap + u-boot + env in nandflash */ | |
b89ac72a HS |
99 | #define CONFIG_ENV_OFFSET 0x100000 |
100 | #define CONFIG_ENV_OFFSET_REDUND 0x180000 | |
fd45a0d1 | 101 | #define CONFIG_ENV_SIZE SZ_128K |
b89ac72a HS |
102 | |
103 | #define CONFIG_BOOTCOMMAND \ | |
104 | "nand read 0x70000000 0x200000 0x300000;" \ | |
105 | "bootm 0x70000000" | |
b89ac72a | 106 | |
b89ac72a HS |
107 | #define CONFIG_SYS_LONGHELP |
108 | #define CONFIG_CMDLINE_EDITING | |
109 | #define CONFIG_AUTO_COMPLETE | |
b89ac72a HS |
110 | |
111 | /* | |
112 | * Size of malloc() pool | |
113 | */ | |
114 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ | |
fd45a0d1 HS |
115 | SZ_4M, 0x1000) |
116 | ||
5b15fd98 HS |
117 | /* Defines for SPL */ |
118 | #define CONFIG_SPL_FRAMEWORK | |
119 | #define CONFIG_SPL_TEXT_BASE 0x300000 | |
fd45a0d1 HS |
120 | #define CONFIG_SPL_MAX_SIZE (12 * SZ_1K) |
121 | #define CONFIG_SPL_STACK (SZ_16K) | |
5b15fd98 HS |
122 | |
123 | #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE | |
fd45a0d1 | 124 | #define CONFIG_SPL_BSS_MAX_SIZE (SZ_2K) |
5b15fd98 | 125 | |
5b15fd98 HS |
126 | #define CONFIG_SPL_NAND_DRIVERS |
127 | #define CONFIG_SPL_NAND_BASE | |
128 | #define CONFIG_SPL_NAND_ECC | |
129 | #define CONFIG_SPL_NAND_RAW_ONLY | |
130 | #define CONFIG_SPL_NAND_SOFTECC | |
131 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 | |
132 | #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 | |
133 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE | |
134 | #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE | |
135 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
136 | ||
fd45a0d1 HS |
137 | #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K |
138 | #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) | |
5b15fd98 HS |
139 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ |
140 | CONFIG_SYS_NAND_PAGE_SIZE) | |
141 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
142 | #define CONFIG_SYS_NAND_ECCSIZE 256 | |
143 | #define CONFIG_SYS_NAND_ECCBYTES 3 | |
144 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
145 | #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ | |
146 | 48, 49, 50, 51, 52, 53, 54, 55, \ | |
147 | 56, 57, 58, 59, 60, 61, 62, 63, } | |
148 | ||
149 | #define CONFIG_SPL_ATMEL_SIZE | |
150 | #define CONFIG_SYS_MASTER_CLOCK 132096000 | |
151 | #define AT91_PLL_LOCK_TIMEOUT 1000000 | |
152 | #define CONFIG_SYS_AT91_PLLA 0x20c73f03 | |
153 | #define CONFIG_SYS_MCKR 0x1301 | |
154 | #define CONFIG_SYS_MCKR_CSS 0x1302 | |
155 | ||
b89ac72a | 156 | #endif |