[people/ms/u-boot.git] / include / configs / davinci_dm355evm.h

/*
 * Copyright (C) 2009 David Brownell
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* Spectrum Digital TMS320DM355 EVM board */
#define DAVINCI_DM355EVM

#define CONFIG_SKIP_LOWLEVEL_INIT	/* U-Boot is a 3rd stage loader */
#define CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_SYS_NO_FLASH		/* that is, no *NOR* flash */
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_DISPLAY_CPUINFO

/* SoC Configuration */
#define CONFIG_ARM926EJS				/* arm926ejs CPU */
#define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
#define CONFIG_SYS_HZ_CLOCK		24000000	/* timer0 freq */
#define CONFIG_SYS_HZ			1000
#define CONFIG_SOC_DM355

/* Memory Info */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_1			0x80000000
#define PHYS_SDRAM_1_SIZE		(128 << 20)	/* 128 MiB */

/* Serial Driver info: UART0 for console  */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	-4
#define CONFIG_SYS_NS16550_COM1		0x01c20000
#define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_HZ_CLOCK
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_CONS_INDEX		1
#define CONFIG_BAUDRATE			115200

/* Ethernet:  external DM9000 */
#define CONFIG_DRIVER_DM9000		1
#define CONFIG_DM9000_BASE		0x04014000
#define DM9000_IO			CONFIG_DM9000_BASE
#define DM9000_DATA			(CONFIG_DM9000_BASE + 2)
#define CONFIG_NET_MULTI

/* I2C */
#define CONFIG_HARD_I2C
#define CONFIG_DRIVER_DAVINCI_I2C
#define CONFIG_SYS_I2C_SPEED		400000
#define CONFIG_SYS_I2C_SLAVE		0x10	/* SMBus host address */

/* NAND: socketed, two chipselects, normally 2 GBytes */
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K

#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_SYS_NAND_BASE_LIST	{ 0x02000000, }
/* socket has two chipselects, nCE0 gated by address BIT(14) */
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_MAX_CHIPS	2

/* USB: OTG connector */
/* NYET -- #define CONFIG_USB_DAVINCI */

/* U-Boot command configuration */
#include <config_cmd_default.h>

#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR

#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_I2C
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES

#ifdef CONFIG_NAND_DAVINCI
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define CONFIG_CMD_NAND
#define CONFIG_CMD_UBI
#define CONFIG_RBTREE
#endif

#ifdef CONFIG_USB_DAVINCI
#define CONFIG_MUSB_HCD
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#else
#undef CONFIG_MUSB_HCD
#undef CONFIG_CMD_USB
#undef CONFIG_USB_STORAGE
#endif

#define CONFIG_CRC32_VERIFY
#define CONFIG_MX_CYCLIC

/* U-Boot general configuration */
#undef CONFIG_USE_IRQ				/* No IRQ/FIQ in U-Boot */
#define CONFIG_BOOTFILE		"uImage"	/* Boot file name */
#define CONFIG_SYS_PROMPT	"DM355 EVM # "	/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size  */
#define CONFIG_SYS_PBSIZE			/* Print buffer size */ \
		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS	16		/* max number of command args */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_SYS_LONGHELP

#ifdef CONFIG_NAND_DAVINCI
#define CONFIG_ENV_SIZE		(256 << 10)	/* 256 KiB */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET	0x3C0000
#undef CONFIG_ENV_IS_IN_FLASH
#endif

#define CONFIG_BOOTDELAY	5
#define CONFIG_BOOTCOMMAND \
		"dhcp;bootm"
#define CONFIG_BOOTARGS \
		"console=ttyS0,115200n8 " \
		"root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"

#define CONFIG_CMDLINE_EDITING
#define CONFIG_VERSION_VARIABLE
#define CONFIG_TIMESTAMP

#define CONFIG_NET_RETRY_COUNT 10

/* U-Boot memory configuration */
#define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */
#define CONFIG_SYS_MALLOC_LEN		(1 << 20)	/* 1 MiB */
#define CONFIG_SYS_GBL_DATA_SIZE	128		/* for initial data */
#define CONFIG_SYS_MEMTEST_START	0x87000000	/* physical address */
#define CONFIG_SYS_MEMTEST_END		0x88000000	/* test 16MB RAM */

/* Linux interfacing */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_SYS_BARGSIZE	1024			/* bootarg Size */
#define CONFIG_SYS_LOAD_ADDR	0x80700000		/* kernel address */


/* NAND configuration ... socketed with two chipselects.  It normally comes
 * with a 2GByte SLC part with 2KB pages (and 128KB erase blocks); other
 * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC.  (MLC
 * pretty much demands the 4-bit ECC support.)  You can of course swap in
 * other parts, including small page ones.
 *
 * This presents a single read-only partition for all bootloader stuff.
 * UBL (1+ block), U-Boot (256KB+), U-Boot environment (one block), and
 * some extra space to help cope with bad blocks in that data.  Linux
 * shouldn't care about its detailed layout, and will probably want to use
 * UBI/UBFS for the rest (except maybe on smallpage chips).  It's easy to
 * override this default partitioning using MTDPARTS and cmdlinepart.
 */
#define MTDIDS_DEFAULT		"nand0=davinci_nand.0"

#ifdef CONFIG_SYS_NAND_LARGEPAGE
/*  Use same layout for 128K/256K blocks; allow some bad blocks */
#define PART_BOOT		"2m(bootloader)ro,"
#else
/* Assume 16K erase blocks; allow a few bad ones. */
#define PART_BOOT		"512k(bootloader)ro,"
#endif

#define PART_KERNEL		"4m(kernel),"	/* kernel + initramfs */
#define PART_REST		"-(filesystem)"

#define MTDPARTS_DEFAULT	\
	"mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST

#endif /* __CONFIG_H */
Commit	Line	Data
28b00324 DB	1	/*
	2	* Copyright (C) 2009 David Brownell
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License as
	6	* published by the Free Software Foundation; either version 2 of
	7	* the License, or (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	17	* MA 02111-1307 USA
	18	*/
	19
	20	#ifndef __CONFIG_H
	21	#define __CONFIG_H
28b00324 DB	22
	23	/* Spectrum Digital TMS320DM355 EVM board */
	24	#define DAVINCI_DM355EVM
	25
	26	#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
	27	#define CONFIG_SKIP_RELOCATE_UBOOT
	28	#define CONFIG_SYS_NO_FLASH /* that is, no NOR flash */
	29	#define CONFIG_SYS_CONSOLE_INFO_QUIET
	30	#define CONFIG_DISPLAY_CPUINFO
	31
	32	/* SoC Configuration */
	33	#define CONFIG_ARM926EJS /* arm926ejs CPU */
	34	#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
	35	#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
	36	#define CONFIG_SYS_HZ 1000
	37	#define CONFIG_SOC_DM355
	38
	39	/* Memory Info */
	40	#define CONFIG_NR_DRAM_BANKS 1
	41	#define PHYS_SDRAM_1 0x80000000
a16df2c1	42	#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
28b00324 DB	43
	44	/* Serial Driver info: UART0 for console */
	45	#define CONFIG_SYS_NS16550
	46	#define CONFIG_SYS_NS16550_SERIAL
	47	#define CONFIG_SYS_NS16550_REG_SIZE -4
	48	#define CONFIG_SYS_NS16550_COM1 0x01c20000
	49	#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
	50	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	51	#define CONFIG_CONS_INDEX 1
	52	#define CONFIG_BAUDRATE 115200
	53
	54	/* Ethernet: external DM9000 */
	55	#define CONFIG_DRIVER_DM9000 1
	56	#define CONFIG_DM9000_BASE 0x04014000
	57	#define DM9000_IO CONFIG_DM9000_BASE
	58	#define DM9000_DATA (CONFIG_DM9000_BASE + 2)
c8badbe5	59	#define CONFIG_NET_MULTI
28b00324 DB	60
	61	/* I2C */
	62	#define CONFIG_HARD_I2C
	63	#define CONFIG_DRIVER_DAVINCI_I2C
	64	#define CONFIG_SYS_I2C_SPEED 400000
	65	#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
	66
	67	/* NAND: socketed, two chipselects, normally 2 GBytes */
409ec37b	68	#define CONFIG_NAND_DAVINCI
28b00324	69	#define CONFIG_SYS_NAND_USE_FLASH_BBT
409ec37b SP	70	#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
409ec37b SP	71	#define CONFIG_SYS_NAND_PAGE_2K
28b00324 DB	72
	73	#define CONFIG_SYS_NAND_LARGEPAGE
	74	#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
	75	/* socket has two chipselects, nCE0 gated by address BIT(14) */
	76	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	77	#define CONFIG_SYS_NAND_MAX_CHIPS 2
	78
	79	/* USB: OTG connector */
	80	/* NYET -- #define CONFIG_USB_DAVINCI */
	81
	82	/* U-Boot command configuration */
	83	#include <config_cmd_default.h>
	84
	85	#undef CONFIG_CMD_BDI
	86	#undef CONFIG_CMD_FLASH
	87	#undef CONFIG_CMD_FPGA
	88	#undef CONFIG_CMD_SETGETDCR
	89
	90	#define CONFIG_CMD_ASKENV
	91	#define CONFIG_CMD_DHCP
	92	#define CONFIG_CMD_I2C
	93	#define CONFIG_CMD_PING
	94	#define CONFIG_CMD_SAVES
	95
	96	#ifdef CONFIG_NAND_DAVINCI
	97	#define CONFIG_CMD_MTDPARTS
	98	#define CONFIG_MTD_PARTITIONS
409ec37b	99	#define CONFIG_MTD_DEVICE
28b00324 DB	100	#define CONFIG_CMD_NAND
	101	#define CONFIG_CMD_UBI
	102	#define CONFIG_RBTREE
	103	#endif
	104
28b00324 DB	105	#ifdef CONFIG_USB_DAVINCI
	106	#define CONFIG_MUSB_HCD
	107	#define CONFIG_CMD_USB
	108	#define CONFIG_USB_STORAGE
	109	#else
	110	#undef CONFIG_MUSB_HCD
	111	#undef CONFIG_CMD_USB
	112	#undef CONFIG_USB_STORAGE
	113	#endif
	114
	115	#define CONFIG_CRC32_VERIFY
	116	#define CONFIG_MX_CYCLIC
	117
	118	/* U-Boot general configuration */
	119	#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
	120	#define CONFIG_BOOTFILE "uImage" /* Boot file name */
	121	#define CONFIG_SYS_PROMPT "DM355 EVM # " /* Monitor Command Prompt */
	122	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
	123	#define CONFIG_SYS_PBSIZE /* Print buffer size */ \
	124	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	125	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	126	#define CONFIG_SYS_HUSH_PARSER
	127	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	128	#define CONFIG_SYS_LONGHELP
	129
409ec37b SP	130	#ifdef CONFIG_NAND_DAVINCI
	131	#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
	132	#define CONFIG_ENV_IS_IN_NAND
	133	#define CONFIG_ENV_OFFSET 0x3C0000
	134	#undef CONFIG_ENV_IS_IN_FLASH
	135	#endif
28b00324	136
409ec37b	137	#define CONFIG_BOOTDELAY 5
28b00324 DB	138	#define CONFIG_BOOTCOMMAND \
	139	"dhcp;bootm"
	140	#define CONFIG_BOOTARGS \
	141	"console=ttyS0,115200n8 " \
	142	"root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
	143
	144	#define CONFIG_CMDLINE_EDITING
	145	#define CONFIG_VERSION_VARIABLE
	146	#define CONFIG_TIMESTAMP
	147
	148	#define CONFIG_NET_RETRY_COUNT 10
	149
	150	/* U-Boot memory configuration */
a16df2c1	151	#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
409ec37b	152	#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
28b00324 DB	153	#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */
	154	#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
	155	#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
	156
	157	/* Linux interfacing */
	158	#define CONFIG_CMDLINE_TAG
	159	#define CONFIG_SETUP_MEMORY_TAGS
	160	#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
	161	#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
	162
	163
	164	/* NAND configuration ... socketed with two chipselects. It normally comes
	165	* with a 2GByte SLC part with 2KB pages (and 128KB erase blocks); other
	166	* 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
	167	* pretty much demands the 4-bit ECC support.) You can of course swap in
	168	* other parts, including small page ones.
	169	*
	170	* This presents a single read-only partition for all bootloader stuff.
	171	* UBL (1+ block), U-Boot (256KB+), U-Boot environment (one block), and
	172	* some extra space to help cope with bad blocks in that data. Linux
	173	* shouldn't care about its detailed layout, and will probably want to use
	174	* UBI/UBFS for the rest (except maybe on smallpage chips). It's easy to
	175	* override this default partitioning using MTDPARTS and cmdlinepart.
	176	*/
	177	#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
	178
	179	#ifdef CONFIG_SYS_NAND_LARGEPAGE
	180	/* Use same layout for 128K/256K blocks; allow some bad blocks */
	181	#define PART_BOOT "2m(bootloader)ro,"
	182	#else
	183	/* Assume 16K erase blocks; allow a few bad ones. */
	184	#define PART_BOOT "512k(bootloader)ro,"
	185	#endif
	186
	187	#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
	188	#define PART_REST "-(filesystem)"
	189
	190	#define MTDPARTS_DEFAULT \
	191	"mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
	192
	193	#endif /* __CONFIG_H */