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2d4072c0 1/*
a4474ff8 2 * Copyright (C) 2009 Texas Instruments Incorporated
2d4072c0 3 *
3765b3e7 4 * SPDX-License-Identifier: GPL-2.0+
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5 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
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9
10/* Spectrum Digital TMS320DM365 EVM board */
11#define DAVINCI_DM365EVM
12
13#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
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14#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
15#define CONFIG_SYS_CONSOLE_INFO_QUIET
16
17/* SoC Configuration */
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18#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
19#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
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20#define CONFIG_SOC_DM365
21
22/* Memory Info */
23#define CONFIG_NR_DRAM_BANKS 1
24#define PHYS_SDRAM_1 0x80000000
a16df2c1 25#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
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26
27/* Serial Driver info: UART0 for console */
28#define CONFIG_SYS_NS16550
29#define CONFIG_SYS_NS16550_SERIAL
30#define CONFIG_SYS_NS16550_REG_SIZE -4
31#define CONFIG_SYS_NS16550_COM1 0x01c20000
32#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
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33#define CONFIG_CONS_INDEX 1
34#define CONFIG_BAUDRATE 115200
35
36/* EEPROM definitions for EEPROM on DM365 EVM */
37#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
38#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
39#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
40#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
41
42/* Network Configuration */
43#define CONFIG_DRIVER_TI_EMAC
44#define CONFIG_MII
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45#define CONFIG_BOOTP_DNS
46#define CONFIG_BOOTP_DNS2
47#define CONFIG_BOOTP_SEND_HOSTNAME
48#define CONFIG_NET_RETRY_COUNT 10
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49
50/* I2C */
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51#define CONFIG_SYS_I2C
52#define CONFIG_SYS_I2C_DAVINCI
53#define CONFIG_SYS_DAVINCI_I2C_SPEED 400000
54#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
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55
56/* NAND: socketed, two chipselects, normally 2 GBytes */
57#define CONFIG_NAND_DAVINCI
97f4eb8c 58#define CONFIG_SYS_NAND_CS 2
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59#define CONFIG_SYS_NAND_USE_FLASH_BBT
60#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
61#define CONFIG_SYS_NAND_PAGE_2K
62
63#define CONFIG_SYS_NAND_LARGEPAGE
64#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
65/* socket has two chipselects, nCE0 gated by address BIT(14) */
66#define CONFIG_SYS_MAX_NAND_DEVICE 1
67#define CONFIG_SYS_NAND_MAX_CHIPS 2
68
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69/* SD/MMC */
70#define CONFIG_MMC
71#define CONFIG_GENERIC_MMC
72#define CONFIG_DAVINCI_MMC
73#define CONFIG_DAVINCI_MMC_SD1
74#define CONFIG_MMC_MBLOCK
75
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76#define PINMUX4_USBDRVBUS_BITCLEAR 0x3000
77#define PINMUX4_USBDRVBUS_BITSET 0x2000
78
79/* USB Configuration */
80#define CONFIG_USB_DAVINCI
95de1e2f 81#define CONFIG_USB_MUSB_HCD
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82
83#ifdef CONFIG_USB_DAVINCI
84#define CONFIG_CMD_USB /* include support for usb */
85#define CONFIG_CMD_STORAGE /* include support for usb */
86#define CONFIG_CMD_FAT /* include support for FAT/storage*/
87#define CONFIG_DOS_PARTITION /* include support for FAT/storage*/
88#endif
89
95de1e2f 90#ifdef CONFIG_USB_MUSB_HCD /* include support for usb host */
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91#define CONFIG_CMD_USB /* include support for usb cmd */
92#define CONFIG_USB_STORAGE /* MSC class support */
93#define CONFIG_CMD_STORAGE /* inclue support for usb-storage cmd */
94#define CONFIG_CMD_FAT /* inclue support for FAT/storage */
95#define CONFIG_DOS_PARTITION /* inclue support for FAT/storage */
96
97#ifdef CONFIG_USB_KEYBOARD /* HID class support */
98#define CONFIG_SYS_USB_EVENT_POLL
99
100#define CONFIG_PREBOOT "usb start"
101#endif /* CONFIG_USB_KEYBOARD */
95de1e2f 102#endif /* CONFIG_USB_MUSB_HCD */
6e20e64f 103
95de1e2f 104#ifdef CONFIG_USB_MUSB_UDC
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105#define CONFIG_USB_DEVICE 1
106#define CONFIG_USB_TTY 1
107#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
108#define CONFIG_USBD_VENDORID 0x0451
109#define CONFIG_USBD_PRODUCTID 0x5678
110#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
111#define CONFIG_USBD_PRODUCT_NAME "DM365VM"
95de1e2f 112#endif /* CONFIG_USB_MUSB_UDC */
6e20e64f 113
2d4072c0 114/* U-Boot command configuration */
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115#define CONFIG_CMD_ASKENV
116#define CONFIG_CMD_DHCP
117#define CONFIG_CMD_I2C
118#define CONFIG_CMD_PING
119#define CONFIG_CMD_SAVES
2d4072c0 120
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121#ifdef CONFIG_CMD_BDI
122#define CONFIG_CLOCKS
123#endif
124
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125#ifdef CONFIG_MMC
126#define CONFIG_DOS_PARTITION
127#define CONFIG_CMD_EXT2
128#define CONFIG_CMD_FAT
129#define CONFIG_CMD_MMC
130#endif
131
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132#ifdef CONFIG_NAND_DAVINCI
133#define CONFIG_CMD_MTDPARTS
134#define CONFIG_MTD_PARTITIONS
135#define CONFIG_MTD_DEVICE
136#define CONFIG_CMD_NAND
137#define CONFIG_CMD_UBI
138#define CONFIG_RBTREE
139#endif
140
141#define CONFIG_CRC32_VERIFY
142#define CONFIG_MX_CYCLIC
143
144/* U-Boot general configuration */
2d4072c0 145#define CONFIG_BOOTFILE "uImage" /* Boot file name */
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146#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
147#define CONFIG_SYS_PBSIZE /* Print buffer size */ \
148 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
149#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
150#define CONFIG_SYS_HUSH_PARSER
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151#define CONFIG_SYS_LONGHELP
152
153#ifdef CONFIG_NAND_DAVINCI
a16df2c1 154#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
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155#define CONFIG_ENV_IS_IN_NAND
156#define CONFIG_ENV_OFFSET 0x3C0000
157#undef CONFIG_ENV_IS_IN_FLASH
158#endif
159
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160#if defined(CONFIG_MMC) && !defined(CONFIG_ENV_IS_IN_NAND)
161#define CONFIG_CMD_ENV
162#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
163#define CONFIG_ENV_OFFSET (51 << 9) /* Sector 51 */
164#define CONFIG_ENV_IS_IN_MMC
165#undef CONFIG_ENV_IS_IN_FLASH
166#endif
167
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168#define CONFIG_BOOTDELAY 3
169#define CONFIG_BOOTCOMMAND \
170 "dhcp;bootm"
171#define CONFIG_BOOTARGS \
172 "console=ttyS0,115200n8 " \
173 "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
174
175#define CONFIG_CMDLINE_EDITING
176#define CONFIG_VERSION_VARIABLE
177#define CONFIG_TIMESTAMP
178
179/* U-Boot memory configuration */
a16df2c1 180#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
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181#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
182#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
183
184/* Linux interfacing */
185#define CONFIG_CMDLINE_TAG
186#define CONFIG_SETUP_MEMORY_TAGS
187#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
188#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
189
190
191/* NAND configuration issocketed with two chipselects just like the DM355 EVM.
192 * It normally comes with a 2GByte SLC part with 2KB pages
193 * (and 128KB erase blocks); other
194 * 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
195 * pretty much demands the 4-bit ECC support.) You can of course swap in
196 * other parts, including small page ones.
197 */
198#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
199
200#ifdef CONFIG_SYS_NAND_LARGEPAGE
201/* Use same layout for 128K/256K blocks; allow some bad blocks */
202#define PART_BOOT "2m(bootloader)ro,"
203#else
204/* Assume 16K erase blocks; allow a few bad ones. */
205#define PART_BOOT "512k(bootloader)ro,"
206#endif
207
208#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
209#define PART_REST "-(filesystem)"
210
211#define MTDPARTS_DEFAULT \
212 "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
213
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214#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
215
216#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
217#define CONFIG_SYS_INIT_SP_ADDR \
218 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
219
2d4072c0 220#endif /* __CONFIG_H */