[people/ms/u-boot.git] / include / configs / davinci_dm6467Tevm.h

/*
 * Copyright (C) 2011 Texas Instruments Incorporated
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* Spectrum Digital TMS320DM6467T EVM board */
#define DAVINCI_DM6467EVM
#define DAVINCI_DM6467TEVM
#define CONFIG_SYS_USE_NAND
#define CONFIG_SYS_NAND_SMALLPAGE

#define CONFIG_SKIP_LOWLEVEL_INIT

/* SoC Configuration */
#define CONFIG_ARM926EJS				/* arm926ejs CPU */

/* Clock rates detection */
#ifndef __ASSEMBLY__
extern unsigned int davinci_arm_clk_get(void);
#endif

#define CFG_REFCLK_FREQ		33000000
/* Arm Clock frequency    */
#define CONFIG_SYS_CLK_FREQ	davinci_arm_clk_get()
/* Timer Input clock freq */
#define CONFIG_SYS_HZ_CLOCK		(CONFIG_SYS_CLK_FREQ/2)
#define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
#define CONFIG_SYS_HZ			1000
#define CONFIG_SOC_DM646X

/* EEPROM definitions for EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
#define CONFIG_SYS_I2C_EEPROM_ADDR		0x50
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	20

/* Memory Info */
#define CONFIG_SYS_MALLOC_LEN		(1 << 20)	/* 1 MiB */
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		0x81000000	/* 16MB RAM test */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */
#define PHYS_SDRAM_1			0x80000000	/* DDR Start */
#define PHYS_SDRAM_1_SIZE		(256 << 20)	/* DDR size 256MB */

/* Linux interfacing */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_SYS_BARGSIZE		1024		/* Bootarg Size */
#define CONFIG_SYS_LOAD_ADDR		0x80700000	/* kernel address */
#define CONFIG_REVISION_TAG

/* Serial Driver info */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	4
#define CONFIG_SYS_NS16550_COM1		0x01c20000
#define CONFIG_SYS_NS16550_CLK		24000000
#define CONFIG_CONS_INDEX		1
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/* I2C Configuration */
#define CONFIG_HARD_I2C
#define CONFIG_DRIVER_DAVINCI_I2C
#define CONFIG_SYS_I2C_SPEED		80000
#define CONFIG_SYS_I2C_SLAVE		10

/* Network & Ethernet Configuration */
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_EMAC_MDIO_PHY_NUM	1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT	10
#define CONFIG_CMD_NET

/* Flash & Environment */
#define CONFIG_SYS_NO_FLASH
#ifdef CONFIG_SYS_USE_NAND
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS		2
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KiB */
#define CONFIG_SYS_NAND_BASE_LIST	{0x42000000, }
#define CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_ENV_OFFSET		0
#else
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE			(4 << 10)	/* 4 KiB */
#endif

/* U-Boot general configuration */
#undef CONFIG_USE_IRQ				/* No IRQ/FIQ in U-Boot */
#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTFILE		"uImage"	/* Boot file name */
#define CONFIG_SYS_PROMPT	"DM6467 EVM > "	/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size  */
#define CONFIG_SYS_PBSIZE		\
			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_VERSION_VARIABLE
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_LONGHELP
#define CONFIG_CRC32_VERIFY
#define CONFIG_MX_CYCLIC
#define CONFIG_BOOTCOMMAND		"source 0x82080000; dhcp; bootm"
#define CONFIG_BOOTARGS			\
					"mem=120M console=ttyS0,115200n8 " \
					"root=/dev/hda1 rw noinitrd ip=dhcp"

/* U-Boot commands */
#include <config_cmd_default.h>
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
#ifdef CONFIG_SYS_USE_NAND
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_NAND
#endif

#define CONFIG_MAX_RAM_BANK_SIZE	(256 << 20)	/* 256 MB */

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_SIZE	0x1000
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + \
					 CONFIG_SYS_INIT_RAM_SIZE - \
					 GENERATED_GBL_DATA_SIZE)

#endif /* __CONFIG_H */
Commit	Line	Data
2d575e46 MH	1	/*
	2	* Copyright (C) 2011 Texas Instruments Incorporated
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License as
	6	* published by the Free Software Foundation; either version 2 of
	7	* the License, or (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	17	* MA 02111-1307 USA
	18	*/
	19
	20	#ifndef __CONFIG_H
	21	#define __CONFIG_H
	22
	23	/* Spectrum Digital TMS320DM6467T EVM board */
	24	#define DAVINCI_DM6467EVM
b79df8f8	25	#define DAVINCI_DM6467TEVM
2d575e46 MH	26	#define CONFIG_SYS_USE_NAND
	27	#define CONFIG_SYS_NAND_SMALLPAGE
	28
	29	#define CONFIG_SKIP_LOWLEVEL_INIT
	30
	31	/* SoC Configuration */
	32	#define CONFIG_ARM926EJS /* arm926ejs CPU */
	33
	34	/* Clock rates detection */
	35	#ifndef __ASSEMBLY__
	36	extern unsigned int davinci_arm_clk_get(void);
	37	#endif
	38
	39	#define CFG_REFCLK_FREQ 33000000
	40	/* Arm Clock frequency */
	41	#define CONFIG_SYS_CLK_FREQ davinci_arm_clk_get()
	42	/* Timer Input clock freq */
	43	#define CONFIG_SYS_HZ_CLOCK (CONFIG_SYS_CLK_FREQ/2)
	44	#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
	45	#define CONFIG_SYS_HZ 1000
	46	#define CONFIG_SOC_DM646X
	47
	48	/* EEPROM definitions for EEPROM */
	49	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	50	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	51	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
	52	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
	53
	54	/* Memory Info */
	55	#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
	56	#define CONFIG_SYS_MEMTEST_START 0x80000000
	57	#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
	58	#define CONFIG_NR_DRAM_BANKS 1
	59	#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
	60	#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
	61	#define PHYS_SDRAM_1_SIZE (256 << 20) /* DDR size 256MB */
	62
	63	/* Linux interfacing */
	64	#define CONFIG_CMDLINE_TAG
	65	#define CONFIG_SETUP_MEMORY_TAGS
	66	#define CONFIG_SYS_BARGSIZE 1024 /* Bootarg Size */
	67	#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
b79df8f8	68	#define CONFIG_REVISION_TAG
2d575e46 MH	69
	70	/* Serial Driver info */
	71	#define CONFIG_SYS_NS16550
	72	#define CONFIG_SYS_NS16550_SERIAL
	73	#define CONFIG_SYS_NS16550_REG_SIZE 4
	74	#define CONFIG_SYS_NS16550_COM1 0x01c20000
	75	#define CONFIG_SYS_NS16550_CLK 24000000
	76	#define CONFIG_CONS_INDEX 1
	77	#define CONFIG_BAUDRATE 115200
	78	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	79
	80	/* I2C Configuration */
	81	#define CONFIG_HARD_I2C
	82	#define CONFIG_DRIVER_DAVINCI_I2C
	83	#define CONFIG_SYS_I2C_SPEED 80000
	84	#define CONFIG_SYS_I2C_SLAVE 10
	85
	86	/* Network & Ethernet Configuration */
	87	#define CONFIG_DRIVER_TI_EMAC
	88	#define CONFIG_EMAC_MDIO_PHY_NUM 1
	89	#define CONFIG_MII
	90	#define CONFIG_BOOTP_DEFAULT
	91	#define CONFIG_BOOTP_DNS
	92	#define CONFIG_BOOTP_DNS2
	93	#define CONFIG_BOOTP_SEND_HOSTNAME
	94	#define CONFIG_NET_RETRY_COUNT 10
	95	#define CONFIG_CMD_NET
	96
	97	/* Flash & Environment */
	98	#define CONFIG_SYS_NO_FLASH
	99	#ifdef CONFIG_SYS_USE_NAND
	100	#define CONFIG_NAND_DAVINCI
	101	#define CONFIG_SYS_NAND_CS 2
	102	#undef CONFIG_ENV_IS_IN_FLASH
	103	#define CONFIG_ENV_IS_IN_NAND
	104	#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
	105	#define CONFIG_SYS_NAND_BASE_LIST {0x42000000, }
	106	#define CONFIG_SYS_NAND_HW_ECC
	107	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	108	#define CONFIG_ENV_OFFSET 0
	109	#else
	110	#define CONFIG_ENV_IS_NOWHERE
	111	#define CONFIG_ENV_SIZE (4 << 10) /* 4 KiB */
	112	#endif
	113
	114	/* U-Boot general configuration */
	115	#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
	116	#define CONFIG_BOOTDELAY 3
	117	#define CONFIG_BOOTFILE "uImage" /* Boot file name */
	118	#define CONFIG_SYS_PROMPT "DM6467 EVM > " /* Monitor Command Prompt */
	119	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
	120	#define CONFIG_SYS_PBSIZE \
	121	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	122	#define CONFIG_SYS_MAXARGS 16
	123	#define CONFIG_VERSION_VARIABLE
	124	#define CONFIG_AUTO_COMPLETE
	125	#define CONFIG_SYS_HUSH_PARSER
	126	#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
	127	#define CONFIG_CMDLINE_EDITING
	128	#define CONFIG_SYS_LONGHELP
	129	#define CONFIG_CRC32_VERIFY
	130	#define CONFIG_MX_CYCLIC
	131	#define CONFIG_BOOTCOMMAND "source 0x82080000; dhcp; bootm"
	132	#define CONFIG_BOOTARGS \
133	"mem=120M console=ttyS0,115200n8 " \
134	"root=/dev/hda1 rw noinitrd ip=dhcp"
135
136	/* U-Boot commands */
137	#include <config_cmd_default.h>
138	#define CONFIG_CMD_ASKENV
139	#define CONFIG_CMD_DIAG
140	#define CONFIG_CMD_I2C
141	#define CONFIG_CMD_MII
142	#define CONFIG_CMD_SAVES
143	#define CONFIG_CMD_EEPROM
144	#define CONFIG_CMD_PING
145	#define CONFIG_CMD_DHCP
146	#undef CONFIG_CMD_BDI
147	#undef CONFIG_CMD_FPGA
148	#undef CONFIG_CMD_SETGETDCR
149	#ifdef CONFIG_SYS_USE_NAND
150	#undef CONFIG_CMD_FLASH
151	#undef CONFIG_CMD_IMLS
152	#define CONFIG_CMD_NAND
153	#endif
154
155	#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
156
157	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
158	#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
159	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
160	CONFIG_SYS_INIT_RAM_SIZE - \
161	GENERATED_GBL_DATA_SIZE)
162
163	#endif /* __CONFIG_H */