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6ab176d7 SP |
1 | /* |
2 | * Copyright (C) 2009 Texas Instruments Incorporated | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
6ab176d7 SP |
5 | */ |
6 | ||
7 | #ifndef __CONFIG_H | |
8 | #define __CONFIG_H | |
9 | ||
10 | /* Spectrum Digital TMS320DM6467 EVM board */ | |
11 | #define DAVINCI_DM6467EVM | |
b157dd51 SP |
12 | #define CONFIG_SYS_USE_NAND |
13 | #define CONFIG_SYS_NAND_SMALLPAGE | |
6ab176d7 SP |
14 | |
15 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
6ab176d7 SP |
16 | |
17 | /* SoC Configuration */ | |
b157dd51 SP |
18 | |
19 | /* Clock rates detection */ | |
20 | #ifndef __ASSEMBLY__ | |
21 | extern unsigned int davinci_arm_clk_get(void); | |
22 | #endif | |
23 | ||
b157dd51 SP |
24 | /* Arm Clock frequency */ |
25 | #define CONFIG_SYS_CLK_FREQ davinci_arm_clk_get() | |
26 | /* Timer Input clock freq */ | |
27 | #define CONFIG_SYS_HZ_CLOCK (CONFIG_SYS_CLK_FREQ/2) | |
6ab176d7 | 28 | #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ |
6ab176d7 SP |
29 | #define CONFIG_SOC_DM646X |
30 | ||
31 | /* EEPROM definitions for EEPROM */ | |
32 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
33 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 | |
34 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 | |
35 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 | |
36 | ||
37 | /* Memory Info */ | |
38 | #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ | |
6ab176d7 SP |
39 | #define CONFIG_SYS_MEMTEST_START 0x80000000 |
40 | #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ | |
41 | #define CONFIG_NR_DRAM_BANKS 1 | |
6ab176d7 SP |
42 | #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ |
43 | #define PHYS_SDRAM_1_SIZE (256 << 20) /* DDR size 256MB */ | |
44 | ||
45 | /* Linux interfacing */ | |
46 | #define CONFIG_CMDLINE_TAG | |
47 | #define CONFIG_SETUP_MEMORY_TAGS | |
48 | #define CONFIG_SYS_BARGSIZE 1024 /* Bootarg Size */ | |
49 | #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */ | |
b79df8f8 | 50 | #define CONFIG_REVISION_TAG |
6ab176d7 SP |
51 | |
52 | /* Serial Driver info */ | |
53 | #define CONFIG_SYS_NS16550 | |
54 | #define CONFIG_SYS_NS16550_SERIAL | |
55 | #define CONFIG_SYS_NS16550_REG_SIZE 4 | |
56 | #define CONFIG_SYS_NS16550_COM1 0x01c20000 | |
57 | #define CONFIG_SYS_NS16550_CLK 24000000 | |
58 | #define CONFIG_CONS_INDEX 1 | |
59 | #define CONFIG_BAUDRATE 115200 | |
6ab176d7 SP |
60 | |
61 | /* I2C Configuration */ | |
e8459dcc VA |
62 | #define CONFIG_SYS_I2C |
63 | #define CONFIG_SYS_I2C_DAVINCI | |
64 | #define CONFIG_SYS_DAVINCI_I2C_SPEED 80000 | |
65 | #define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 | |
6ab176d7 | 66 | |
b157dd51 SP |
67 | /* Network & Ethernet Configuration */ |
68 | #define CONFIG_DRIVER_TI_EMAC | |
b157dd51 | 69 | #define CONFIG_MII |
b157dd51 SP |
70 | #define CONFIG_BOOTP_DNS |
71 | #define CONFIG_BOOTP_DNS2 | |
72 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
73 | #define CONFIG_NET_RETRY_COUNT 10 | |
b157dd51 SP |
74 | #define CONFIG_CMD_NET |
75 | ||
6ab176d7 SP |
76 | /* Flash & Environment */ |
77 | #define CONFIG_SYS_NO_FLASH | |
78 | #ifdef CONFIG_SYS_USE_NAND | |
79 | #define CONFIG_NAND_DAVINCI | |
3e01ed00 KI |
80 | #define CONFIG_SYS_NAND_MASK_CLE 0x80000 |
81 | #define CONFIG_SYS_NAND_MASK_ALE 0x40000 | |
97f4eb8c | 82 | #define CONFIG_SYS_NAND_CS 2 |
6ab176d7 SP |
83 | #undef CONFIG_ENV_IS_IN_FLASH |
84 | #define CONFIG_ENV_IS_IN_NAND | |
6ab176d7 SP |
85 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ |
86 | #define CONFIG_SYS_NAND_BASE_LIST {0x42000000, } | |
87 | #define CONFIG_SYS_NAND_HW_ECC | |
88 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
89 | #define CONFIG_ENV_OFFSET 0 | |
90 | #else | |
91 | #define CONFIG_ENV_IS_NOWHERE | |
92 | #define CONFIG_ENV_SIZE (4 << 10) /* 4 KiB */ | |
93 | #endif | |
94 | ||
95 | /* U-Boot general configuration */ | |
6ab176d7 SP |
96 | #define CONFIG_BOOTDELAY 3 |
97 | #define CONFIG_BOOTFILE "uImage" /* Boot file name */ | |
98 | #define CONFIG_SYS_PROMPT "DM6467 EVM > " /* Monitor Command Prompt */ | |
99 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ | |
100 | #define CONFIG_SYS_PBSIZE \ | |
101 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
102 | #define CONFIG_SYS_MAXARGS 16 | |
103 | #define CONFIG_VERSION_VARIABLE | |
104 | #define CONFIG_AUTO_COMPLETE | |
105 | #define CONFIG_SYS_HUSH_PARSER | |
6ab176d7 SP |
106 | #define CONFIG_CMDLINE_EDITING |
107 | #define CONFIG_SYS_LONGHELP | |
108 | #define CONFIG_CRC32_VERIFY | |
109 | #define CONFIG_MX_CYCLIC | |
110 | #define CONFIG_BOOTCOMMAND "source 0x82080000; dhcp; bootm" | |
111 | #define CONFIG_BOOTARGS \ | |
112 | "mem=120M console=ttyS0,115200n8 " \ | |
113 | "root=/dev/hda1 rw noinitrd ip=dhcp" | |
114 | ||
115 | /* U-Boot commands */ | |
116 | #include <config_cmd_default.h> | |
117 | #define CONFIG_CMD_ASKENV | |
118 | #define CONFIG_CMD_DIAG | |
119 | #define CONFIG_CMD_I2C | |
120 | #define CONFIG_CMD_MII | |
121 | #define CONFIG_CMD_SAVES | |
122 | #define CONFIG_CMD_EEPROM | |
b157dd51 SP |
123 | #define CONFIG_CMD_PING |
124 | #define CONFIG_CMD_DHCP | |
6ab176d7 SP |
125 | #undef CONFIG_CMD_BDI |
126 | #undef CONFIG_CMD_FPGA | |
127 | #undef CONFIG_CMD_SETGETDCR | |
128 | #ifdef CONFIG_SYS_USE_NAND | |
129 | #undef CONFIG_CMD_FLASH | |
130 | #undef CONFIG_CMD_IMLS | |
131 | #define CONFIG_CMD_NAND | |
132 | #endif | |
133 | ||
8f5d4687 HM |
134 | #ifdef CONFIG_CMD_BDI |
135 | #define CONFIG_CLOCKS | |
136 | #endif | |
137 | ||
8a16f9c6 SP |
138 | #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ |
139 | ||
140 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
141 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 | |
142 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ | |
143 | CONFIG_SYS_INIT_RAM_SIZE - \ | |
144 | GENERATED_GBL_DATA_SIZE) | |
145 | ||
6ab176d7 | 146 | #endif /* __CONFIG_H */ |