[people/ms/u-boot.git] / include / configs / davinci_dm6467evm.h

/*
 * Copyright (C) 2009 Texas Instruments Incorporated
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* Spectrum Digital TMS320DM6467 EVM board */
#define DAVINCI_DM6467EVM
#define CONFIG_SYS_USE_NAND
#define CONFIG_SYS_NAND_SMALLPAGE

#define CONFIG_SKIP_LOWLEVEL_INIT

/* SoC Configuration */
#define CONFIG_ARM926EJS				/* arm926ejs CPU */

/* Clock rates detection */
#ifndef __ASSEMBLY__
extern unsigned int davinci_arm_clk_get(void);
#endif

/* Arm Clock frequency    */
#define CONFIG_SYS_CLK_FREQ	davinci_arm_clk_get()
/* Timer Input clock freq */
#define CONFIG_SYS_HZ_CLOCK		(CONFIG_SYS_CLK_FREQ/2)
#define CONFIG_SYS_TIMERBASE		0x01c21400	/* use timer 0 */
#define CONFIG_SYS_HZ			1000
#define CONFIG_SOC_DM646X

/* EEPROM definitions for EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
#define CONFIG_SYS_I2C_EEPROM_ADDR		0x50
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	20

/* Memory Info */
#define CONFIG_SYS_MALLOC_LEN		(1 << 20)	/* 1 MiB */
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		0x81000000	/* 16MB RAM test */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_1			0x80000000	/* DDR Start */
#define PHYS_SDRAM_1_SIZE		(256 << 20)	/* DDR size 256MB */

/* Linux interfacing */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_SYS_BARGSIZE		1024		/* Bootarg Size */
#define CONFIG_SYS_LOAD_ADDR		0x80700000	/* kernel address */
#define CONFIG_REVISION_TAG

/* Serial Driver info */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	4
#define CONFIG_SYS_NS16550_COM1		0x01c20000
#define CONFIG_SYS_NS16550_CLK		24000000
#define CONFIG_CONS_INDEX		1
#define CONFIG_BAUDRATE			115200

/* I2C Configuration */
#define CONFIG_HARD_I2C
#define CONFIG_DRIVER_DAVINCI_I2C
#define CONFIG_SYS_I2C_SPEED		80000
#define CONFIG_SYS_I2C_SLAVE		10

/* Network & Ethernet Configuration */
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT	10
#define CONFIG_CMD_NET

/* Flash & Environment */
#define CONFIG_SYS_NO_FLASH
#ifdef CONFIG_SYS_USE_NAND
#define CONFIG_NAND_DAVINCI
#define CONFIG_SYS_NAND_CS		2
#undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KiB */
#define CONFIG_SYS_NAND_BASE_LIST	{0x42000000, }
#define CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_ENV_OFFSET		0
#else
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE			(4 << 10)	/* 4 KiB */
#endif

/* U-Boot general configuration */
#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTFILE		"uImage"	/* Boot file name */
#define CONFIG_SYS_PROMPT	"DM6467 EVM > "	/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE	1024		/* Console I/O Buffer Size  */
#define CONFIG_SYS_PBSIZE		\
			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_VERSION_VARIABLE
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_LONGHELP
#define CONFIG_CRC32_VERIFY
#define CONFIG_MX_CYCLIC
#define CONFIG_BOOTCOMMAND		"source 0x82080000; dhcp; bootm"
#define CONFIG_BOOTARGS			\
					"mem=120M console=ttyS0,115200n8 " \
					"root=/dev/hda1 rw noinitrd ip=dhcp"

/* U-Boot commands */
#include <config_cmd_default.h>
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
#ifdef CONFIG_SYS_USE_NAND
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_NAND
#endif

#ifdef CONFIG_CMD_BDI
#define CONFIG_CLOCKS
#endif

#define CONFIG_MAX_RAM_BANK_SIZE	(256 << 20)	/* 256 MB */

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_SIZE	0x1000
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + \
					 CONFIG_SYS_INIT_RAM_SIZE - \
					 GENERATED_GBL_DATA_SIZE)

#endif /* __CONFIG_H */
Commit	Line	Data
6ab176d7 SP	1	/*
	2	* Copyright (C) 2009 Texas Instruments Incorporated
	3	*
1a459660	4	* SPDX-License-Identifier: GPL-2.0+
6ab176d7 SP	5	*/
	6
	7	#ifndef __CONFIG_H
	8	#define __CONFIG_H
	9
	10	/* Spectrum Digital TMS320DM6467 EVM board */
	11	#define DAVINCI_DM6467EVM
b157dd51 SP	12	#define CONFIG_SYS_USE_NAND
b157dd51 SP	13	#define CONFIG_SYS_NAND_SMALLPAGE
6ab176d7 SP	14
6ab176d7 SP	15	#define CONFIG_SKIP_LOWLEVEL_INIT
6ab176d7 SP	16
	17	/* SoC Configuration */
	18	#define CONFIG_ARM926EJS /* arm926ejs CPU */
b157dd51 SP	19
	20	/* Clock rates detection */
	21	#ifndef __ASSEMBLY__
	22	extern unsigned int davinci_arm_clk_get(void);
	23	#endif
	24
b157dd51 SP	25	/* Arm Clock frequency */
	26	#define CONFIG_SYS_CLK_FREQ davinci_arm_clk_get()
	27	/* Timer Input clock freq */
	28	#define CONFIG_SYS_HZ_CLOCK (CONFIG_SYS_CLK_FREQ/2)
6ab176d7	29	#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
6ab176d7 SP	30	#define CONFIG_SYS_HZ 1000
	31	#define CONFIG_SOC_DM646X
	32
	33	/* EEPROM definitions for EEPROM */
	34	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	35	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	36	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
	37	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
	38
	39	/* Memory Info */
	40	#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
6ab176d7 SP	41	#define CONFIG_SYS_MEMTEST_START 0x80000000
	42	#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
	43	#define CONFIG_NR_DRAM_BANKS 1
6ab176d7 SP	44	#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
	45	#define PHYS_SDRAM_1_SIZE (256 << 20) /* DDR size 256MB */
	46
	47	/* Linux interfacing */
	48	#define CONFIG_CMDLINE_TAG
	49	#define CONFIG_SETUP_MEMORY_TAGS
	50	#define CONFIG_SYS_BARGSIZE 1024 /* Bootarg Size */
	51	#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
b79df8f8	52	#define CONFIG_REVISION_TAG
6ab176d7 SP	53
	54	/* Serial Driver info */
	55	#define CONFIG_SYS_NS16550
	56	#define CONFIG_SYS_NS16550_SERIAL
	57	#define CONFIG_SYS_NS16550_REG_SIZE 4
	58	#define CONFIG_SYS_NS16550_COM1 0x01c20000
	59	#define CONFIG_SYS_NS16550_CLK 24000000
	60	#define CONFIG_CONS_INDEX 1
	61	#define CONFIG_BAUDRATE 115200
6ab176d7 SP	62
	63	/* I2C Configuration */
	64	#define CONFIG_HARD_I2C
	65	#define CONFIG_DRIVER_DAVINCI_I2C
	66	#define CONFIG_SYS_I2C_SPEED 80000
	67	#define CONFIG_SYS_I2C_SLAVE 10
	68
b157dd51 SP	69	/* Network & Ethernet Configuration */
b157dd51 SP	70	#define CONFIG_DRIVER_TI_EMAC
b157dd51 SP	71	#define CONFIG_MII
	72	#define CONFIG_BOOTP_DEFAULT
	73	#define CONFIG_BOOTP_DNS
	74	#define CONFIG_BOOTP_DNS2
	75	#define CONFIG_BOOTP_SEND_HOSTNAME
	76	#define CONFIG_NET_RETRY_COUNT 10
b157dd51 SP	77	#define CONFIG_CMD_NET
b157dd51 SP	78
6ab176d7 SP	79	/* Flash & Environment */
	80	#define CONFIG_SYS_NO_FLASH
	81	#ifdef CONFIG_SYS_USE_NAND
	82	#define CONFIG_NAND_DAVINCI
97f4eb8c	83	#define CONFIG_SYS_NAND_CS 2
6ab176d7 SP	84	#undef CONFIG_ENV_IS_IN_FLASH
6ab176d7 SP	85	#define CONFIG_ENV_IS_IN_NAND
6ab176d7 SP	86	#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
	87	#define CONFIG_SYS_NAND_BASE_LIST {0x42000000, }
	88	#define CONFIG_SYS_NAND_HW_ECC
	89	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	90	#define CONFIG_ENV_OFFSET 0
	91	#else
	92	#define CONFIG_ENV_IS_NOWHERE
	93	#define CONFIG_ENV_SIZE (4 << 10) /* 4 KiB */
	94	#endif
	95
	96	/* U-Boot general configuration */
6ab176d7 SP	97	#define CONFIG_BOOTDELAY 3
	98	#define CONFIG_BOOTFILE "uImage" /* Boot file name */
	99	#define CONFIG_SYS_PROMPT "DM6467 EVM > " /* Monitor Command Prompt */
	100	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
	101	#define CONFIG_SYS_PBSIZE \
	102	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	103	#define CONFIG_SYS_MAXARGS 16
	104	#define CONFIG_VERSION_VARIABLE
	105	#define CONFIG_AUTO_COMPLETE
	106	#define CONFIG_SYS_HUSH_PARSER
6ab176d7 SP	107	#define CONFIG_CMDLINE_EDITING
	108	#define CONFIG_SYS_LONGHELP
	109	#define CONFIG_CRC32_VERIFY
	110	#define CONFIG_MX_CYCLIC
	111	#define CONFIG_BOOTCOMMAND "source 0x82080000; dhcp; bootm"
	112	#define CONFIG_BOOTARGS \
	113	"mem=120M console=ttyS0,115200n8 " \
	114	"root=/dev/hda1 rw noinitrd ip=dhcp"
	115
	116	/* U-Boot commands */
	117	#include <config_cmd_default.h>
	118	#define CONFIG_CMD_ASKENV
	119	#define CONFIG_CMD_DIAG
	120	#define CONFIG_CMD_I2C
	121	#define CONFIG_CMD_MII
	122	#define CONFIG_CMD_SAVES
	123	#define CONFIG_CMD_EEPROM
b157dd51 SP	124	#define CONFIG_CMD_PING
b157dd51 SP	125	#define CONFIG_CMD_DHCP
6ab176d7 SP	126	#undef CONFIG_CMD_BDI
	127	#undef CONFIG_CMD_FPGA
	128	#undef CONFIG_CMD_SETGETDCR
	129	#ifdef CONFIG_SYS_USE_NAND
	130	#undef CONFIG_CMD_FLASH
	131	#undef CONFIG_CMD_IMLS
	132	#define CONFIG_CMD_NAND
	133	#endif
	134
8f5d4687 HM	135	#ifdef CONFIG_CMD_BDI
	136	#define CONFIG_CLOCKS
	137	#endif
	138
8a16f9c6 SP	139	#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
	140
	141	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	142	#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
	143	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
	144	CONFIG_SYS_INIT_RAM_SIZE - \
	145	GENERATED_GBL_DATA_SIZE)
	146
6ab176d7	147	#endif /* __CONFIG_H */