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c74b2108 SK |
1 | /* |
2 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License as | |
6 | * published by the Free Software Foundation; either version 2 of | |
7 | * the License, or (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
17 | * MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | #ifndef __CONFIG_H | |
21 | #define __CONFIG_H | |
c74b2108 SK |
22 | |
23 | /* | |
24 | * Define this to make U-Boot skip low level initialization when loaded | |
25 | * by initial bootloader. Not required by NAND U-Boot version but IS | |
26 | * required for a NOR version used to burn the real NOR U-Boot into | |
27 | * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive | |
28 | * so it is NOT possible to build a U-Boot with both NAND and NOR routines. | |
29 | * NOR U-Boot is loaded directly from Flash so it must perform all the | |
30 | * low level initialization itself. NAND version is loaded by an initial | |
31 | * bootloader (UBL in TI-ese) that performs such an initialization so it's | |
32 | * skipped in NAND version. The third DaVinci boot mode loads a bootloader | |
33 | * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever) | |
34 | * performing low level init prior to loading. All that means we can NOT use | |
35 | * NAND version to put U-Boot into NOR because it doesn't have NOR support and | |
36 | * we can NOT use NOR version because it performs low level initialization | |
37 | * effectively destroying itself in DDR memory. That's why a separate NOR | |
38 | * version with this define is needed. It is loaded via UART, then one uses | |
39 | * it to somehow download a proper NOR version built WITHOUT this define to | |
40 | * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze | |
41 | * NOR support into the initial bootloader so it won't be needed but DaVinci | |
42 | * static RAM might be too small for this (I have something like 2Kbytes left | |
43 | * as of now, without NOR support) so this might've not happened... | |
44 | * | |
45 | #define CONFIG_NOR_UART_BOOT | |
46 | */ | |
47 | ||
48 | /*=======*/ | |
49 | /* Board */ | |
50 | /*=======*/ | |
51 | #define SONATA_BOARD | |
6d0f6bcf JCPV |
52 | #define CONFIG_SYS_NAND_SMALLPAGE |
53 | #define CONFIG_SYS_USE_NOR | |
7a4f511b | 54 | #define CONFIG_DISPLAY_CPUINFO |
c74b2108 SK |
55 | /*===================*/ |
56 | /* SoC Configuration */ | |
57 | /*===================*/ | |
58 | #define CONFIG_ARM926EJS /* arm926ejs CPU core */ | |
6d0f6bcf JCPV |
59 | #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ |
60 | #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ | |
61 | #define CONFIG_SYS_HZ 1000 | |
f7904368 | 62 | #define CONFIG_SOC_DM644X |
c74b2108 SK |
63 | /*====================================================*/ |
64 | /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ | |
65 | /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ | |
66 | /*====================================================*/ | |
6d0f6bcf JCPV |
67 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 |
68 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 | |
69 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 | |
70 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 | |
c74b2108 SK |
71 | /*=============*/ |
72 | /* Memory Info */ | |
73 | /*=============*/ | |
6d0f6bcf JCPV |
74 | #define CONFIG_SYS_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */ |
75 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* reserved for initial data */ | |
76 | #define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ | |
77 | #define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ | |
c74b2108 SK |
78 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
79 | #define CONFIG_STACKSIZE (256*1024) /* regular stack */ | |
80 | #define PHYS_SDRAM_1 0x80000000 /* DDR Start */ | |
81 | #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ | |
82 | #define DDR_4BANKS /* 4-bank DDR2 (128MB) */ | |
83 | /*====================*/ | |
84 | /* Serial Driver info */ | |
85 | /*====================*/ | |
6d0f6bcf JCPV |
86 | #define CONFIG_SYS_NS16550 |
87 | #define CONFIG_SYS_NS16550_SERIAL | |
7ee38c04 | 88 | #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ |
6d0f6bcf | 89 | #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ |
7239c5da | 90 | #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */ |
c74b2108 SK |
91 | #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ |
92 | #define CONFIG_BAUDRATE 115200 /* Default baud rate */ | |
6d0f6bcf | 93 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
c74b2108 SK |
94 | /*===================*/ |
95 | /* I2C Configuration */ | |
96 | /*===================*/ | |
97 | #define CONFIG_HARD_I2C | |
98 | #define CONFIG_DRIVER_DAVINCI_I2C | |
6d0f6bcf JCPV |
99 | #define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ |
100 | #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ | |
c74b2108 SK |
101 | /*==================================*/ |
102 | /* Network & Ethernet Configuration */ | |
103 | /*==================================*/ | |
104 | #define CONFIG_DRIVER_TI_EMAC | |
105 | #define CONFIG_MII | |
106 | #define CONFIG_BOOTP_DEFAULT | |
107 | #define CONFIG_BOOTP_DNS | |
108 | #define CONFIG_BOOTP_DNS2 | |
109 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
110 | #define CONFIG_NET_RETRY_COUNT 10 | |
8453587e | 111 | #define CONFIG_NET_MULTI |
c74b2108 SK |
112 | /*=====================*/ |
113 | /* Flash & Environment */ | |
114 | /*=====================*/ | |
6d0f6bcf | 115 | #ifdef CONFIG_SYS_USE_NAND |
ee4f3e27 | 116 | #define CONFIG_NAND_DAVINCI |
97f4eb8c | 117 | #define CONFIG_SYS_NAND_CS 2 |
5a1aceb0 | 118 | #undef CONFIG_ENV_IS_IN_FLASH |
6d0f6bcf | 119 | #define CONFIG_SYS_NO_FLASH |
51bfee19 | 120 | #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ |
0e8d1586 | 121 | #define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */ |
a16df2c1 | 122 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ |
c74b2108 SK |
123 | #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ |
124 | #define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ | |
6d0f6bcf JCPV |
125 | #define CONFIG_SYS_NAND_BASE 0x02000000 |
126 | #define CONFIG_SYS_NAND_HW_ECC | |
127 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ | |
0e8d1586 | 128 | #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ |
c74b2108 | 129 | #define DEF_BOOTM "" |
6d0f6bcf | 130 | #elif defined(CONFIG_SYS_USE_NOR) |
c74b2108 SK |
131 | #ifdef CONFIG_NOR_UART_BOOT |
132 | #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ | |
133 | #define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */ | |
134 | #else | |
135 | #undef CONFIG_SKIP_LOWLEVEL_INIT | |
136 | #undef CONFIG_SKIP_RELOCATE_UBOOT | |
137 | #endif | |
5a1aceb0 | 138 | #define CONFIG_ENV_IS_IN_FLASH |
6d0f6bcf | 139 | #undef CONFIG_SYS_NO_FLASH |
00b1883a | 140 | #define CONFIG_FLASH_CFI_DRIVER |
6d0f6bcf JCPV |
141 | #define CONFIG_SYS_FLASH_CFI |
142 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ | |
143 | #define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* 128KB sect size AMD Flash */ | |
144 | #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*2) | |
53677ef1 | 145 | #define PHYS_FLASH_1 0x02000000 /* CS2 Base address */ |
6d0f6bcf | 146 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */ |
53677ef1 | 147 | #define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */ |
6d0f6bcf JCPV |
148 | #define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ) |
149 | #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ /* Env sector Size */ | |
c74b2108 SK |
150 | #endif |
151 | /*==============================*/ | |
152 | /* U-Boot general configuration */ | |
153 | /*==============================*/ | |
53677ef1 | 154 | #undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ |
c74b2108 SK |
155 | #define CONFIG_MISC_INIT_R |
156 | #undef CONFIG_BOOTDELAY | |
157 | #define CONFIG_BOOTFILE "uImage" /* Boot file name */ | |
6d0f6bcf JCPV |
158 | #define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */ |
159 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ | |
160 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */ | |
161 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
162 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
163 | #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */ | |
c74b2108 SK |
164 | #define CONFIG_VERSION_VARIABLE |
165 | #define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ | |
6d0f6bcf JCPV |
166 | #define CONFIG_SYS_HUSH_PARSER |
167 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
c74b2108 | 168 | #define CONFIG_CMDLINE_EDITING |
6d0f6bcf | 169 | #define CONFIG_SYS_LONGHELP |
c74b2108 SK |
170 | #define CONFIG_CRC32_VERIFY |
171 | #define CONFIG_MX_CYCLIC | |
172 | /*===================*/ | |
173 | /* Linux Information */ | |
174 | /*===================*/ | |
175 | #define LINUX_BOOT_PARAM_ADDR 0x80000100 | |
176 | #define CONFIG_CMDLINE_TAG | |
177 | #define CONFIG_SETUP_MEMORY_TAGS | |
178 | #define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" | |
179 | #define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2060000" | |
180 | /*=================*/ | |
181 | /* U-Boot commands */ | |
182 | /*=================*/ | |
183 | #include <config_cmd_default.h> | |
184 | #define CONFIG_CMD_ASKENV | |
185 | #define CONFIG_CMD_DHCP | |
186 | #define CONFIG_CMD_DIAG | |
187 | #define CONFIG_CMD_I2C | |
188 | #define CONFIG_CMD_MII | |
189 | #define CONFIG_CMD_PING | |
190 | #define CONFIG_CMD_SAVES | |
191 | #define CONFIG_CMD_EEPROM | |
192 | #undef CONFIG_CMD_BDI | |
193 | #undef CONFIG_CMD_FPGA | |
194 | #undef CONFIG_CMD_SETGETDCR | |
6d0f6bcf | 195 | #ifdef CONFIG_SYS_USE_NAND |
c74b2108 SK |
196 | #undef CONFIG_CMD_FLASH |
197 | #undef CONFIG_CMD_IMLS | |
198 | #define CONFIG_CMD_NAND | |
6d0f6bcf | 199 | #elif defined(CONFIG_SYS_USE_NOR) |
c74b2108 SK |
200 | #define CONFIG_CMD_JFFS2 |
201 | #else | |
6d0f6bcf | 202 | #error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!" |
c74b2108 SK |
203 | #endif |
204 | /*=======================*/ | |
205 | /* KGDB support (if any) */ | |
206 | /*=======================*/ | |
207 | #ifdef CONFIG_CMD_KGDB | |
208 | #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ | |
209 | #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ | |
210 | #endif | |
211 | #endif /* __CONFIG_H */ |