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c0def248 CP |
1 | /* |
2 | * Copyright (C) 2014 Stefan Roese <sr@denx.de> | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef _CONFIG_DB_88F6820_AMC_H | |
8 | #define _CONFIG_DB_88F6820_AMC_H | |
9 | ||
10 | /* | |
11 | * High Level Configuration Options (easy to change) | |
12 | */ | |
13 | ||
14 | #define CONFIG_DISPLAY_BOARDINFO_LATE | |
15 | ||
16 | /* | |
17 | * TEXT_BASE needs to be below 16MiB, since this area is scrubbed | |
18 | * for DDR ECC byte filling in the SPL before loading the main | |
19 | * U-Boot into it. | |
20 | */ | |
c0def248 CP |
21 | #define CONFIG_SYS_TCLK 200000000 /* 200MHz */ |
22 | ||
23 | /* | |
24 | * Commands configuration | |
25 | */ | |
c0def248 | 26 | |
c0def248 CP |
27 | /* SPI NOR flash default params, used by sf commands */ |
28 | #define CONFIG_SF_DEFAULT_BUS 1 | |
29 | #define CONFIG_SF_DEFAULT_SPEED 1000000 | |
30 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 | |
31 | ||
c0def248 CP |
32 | /* USB/EHCI configuration */ |
33 | #define CONFIG_EHCI_IS_TDI | |
34 | ||
35 | /* Environment in SPI NOR flash */ | |
c0def248 CP |
36 | #define CONFIG_ENV_SPI_BUS 1 |
37 | #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ | |
38 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ | |
39 | #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ | |
40 | ||
41 | #define CONFIG_PHY_MARVELL /* there is a marvell phy */ | |
42 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ | |
43 | ||
44 | /* PCIe support */ | |
45 | #ifndef CONFIG_SPL_BUILD | |
c0def248 | 46 | #define CONFIG_PCI_MVEBU |
c0def248 CP |
47 | #define CONFIG_PCI_SCAN_SHOW |
48 | #endif | |
49 | ||
42f75050 CP |
50 | /* NAND */ |
51 | #define CONFIG_SYS_NAND_USE_FLASH_BBT | |
52 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
53 | ||
c0def248 CP |
54 | #define CONFIG_SYS_ALT_MEMTEST |
55 | ||
56 | /* Keep device tree and initrd in lower memory so the kernel can access them */ | |
57 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
58 | "fdt_high=0x10000000\0" \ | |
59 | "initrd_high=0x10000000\0" | |
60 | ||
61 | /* SPL */ | |
62 | /* | |
63 | * Select the boot device here | |
64 | * | |
65 | * Currently supported are: | |
66 | * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash | |
67 | * | |
68 | * MMC is not populated on this board. | |
69 | * NAND support may be added in the future. | |
70 | */ | |
71 | #define SPL_BOOT_SPI_NOR_FLASH 1 | |
72 | #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH | |
73 | ||
74 | /* Defines for SPL */ | |
c0def248 CP |
75 | #define CONFIG_SPL_SIZE (140 << 10) |
76 | #define CONFIG_SPL_TEXT_BASE 0x40000030 | |
77 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) | |
78 | ||
79 | #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) | |
80 | #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) | |
81 | ||
82 | #ifdef CONFIG_SPL_BUILD | |
83 | #define CONFIG_SYS_MALLOC_SIMPLE | |
84 | #endif | |
85 | ||
86 | #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) | |
87 | #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) | |
88 | ||
89 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH | |
90 | /* SPL related SPI defines */ | |
91 | #define CONFIG_SPL_SPI_LOAD | |
92 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 | |
93 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS | |
94 | #endif | |
95 | ||
96 | /* | |
97 | * mv-common.h should be defined after CMD configs since it used them | |
98 | * to enable certain macros | |
99 | */ | |
100 | #include "mv-common.h" | |
101 | #undef CONFIG_SYS_MAXARGS | |
102 | #define CONFIG_SYS_MAXARGS 96 | |
103 | ||
104 | #endif /* _CONFIG_DB_88F6820_AMC_H */ |