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[people/ms/u-boot.git] / include / configs / dbau1x00.h
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1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
8/*
9 * This file contains the configuration parameters for the dbau1x00 board.
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
5da627a4 15#define CONFIG_DBAU1X00 1
8bde63eb 16#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
5da627a4 17
74368693
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18#define CONFIG_DISPLAY_BOARDINFO
19
a2663ea4 20#ifdef CONFIG_DBAU1000
5da627a4 21/* Also known as Merlot */
8bde63eb 22#define CONFIG_SOC_AU1000 1
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23#else
24#ifdef CONFIG_DBAU1100
8bde63eb 25#define CONFIG_SOC_AU1100 1
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26#else
27#ifdef CONFIG_DBAU1500
8bde63eb 28#define CONFIG_SOC_AU1500 1
d4ca31c4 29#else
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30#ifdef CONFIG_DBAU1550
31/* Cabernet */
8bde63eb 32#define CONFIG_SOC_AU1550 1
ff36fd85 33#else
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34#error "No valid board set"
35#endif
36#endif
37#endif
ff36fd85 38#endif
5da627a4 39
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40#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
41
42#define CONFIG_BAUDRATE 115200
43
44/* valid baudrates */
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45
46#define CONFIG_TIMESTAMP /* Print image info with timestamp */
47#undef CONFIG_BOOTARGS
48
49#define CONFIG_EXTRA_ENV_SETTINGS \
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50 "addmisc=setenv bootargs ${bootargs} " \
51 "console=ttyS0,${baudrate} " \
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52 "panic=1\0" \
53 "bootfile=/tftpboot/vmlinux.srec\0" \
fe126d8b 54 "load=tftp 80500000 ${u-boot}\0" \
5da627a4 55 ""
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56
57#ifdef CONFIG_DBAU1550
58/* Boot from flash by default, revert to bootp */
59#define CONFIG_BOOTCOMMAND "bootm 0xbfc20000; bootp; bootm"
ff36fd85 60#else /* CONFIG_DBAU1550 */
ad88297e 61#define CONFIG_BOOTCOMMAND "bootp;bootm"
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62#endif /* CONFIG_DBAU1550 */
63
ab999ba1 64
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65/*
66 * BOOTP options
67 */
68#define CONFIG_BOOTP_BOOTFILESIZE
69#define CONFIG_BOOTP_BOOTPATH
70#define CONFIG_BOOTP_GATEWAY
71#define CONFIG_BOOTP_HOSTNAME
72
73
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74/*
75 * Command line configuration.
76 */
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77#undef CONFIG_CMD_BEDBUG
78#undef CONFIG_CMD_ELF
ab999ba1 79#undef CONFIG_CMD_FAT
ab999ba1 80#undef CONFIG_CMD_MII
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81
82#ifdef CONFIG_DBAU1550
83
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84#undef CONFIG_CMD_I2C
85#undef CONFIG_CMD_IDE
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86#undef CONFIG_CMD_PCMCIA
87
88#else
89
90#define CONFIG_CMD_IDE
91#define CONFIG_CMD_DHCP
92
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93#endif
94
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95
96/*
97 * Miscellaneous configurable options
98 */
6d0f6bcf 99#define CONFIG_SYS_LONGHELP /* undef to save memory */
ff36fd85 100
6d0f6bcf 101#define CONFIG_SYS_PROMPT "DbAu1xx0 # " /* Monitor Command Prompt */
ff36fd85 102
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103#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
104#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
105#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
5da627a4 106
6d0f6bcf 107#define CONFIG_SYS_MALLOC_LEN 128*1024
5da627a4 108
6d0f6bcf 109#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
5da627a4 110
6d0f6bcf 111#define CONFIG_SYS_MHZ 396
ff36fd85 112
6d0f6bcf 113#if (CONFIG_SYS_MHZ % 12) != 0
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114#error "Invalid CPU frequency - must be multiple of 12!"
115#endif
116
6d0f6bcf 117#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
a55d4817 118
6d0f6bcf 119#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
5da627a4 120
6d0f6bcf 121#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
5da627a4 122
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123#define CONFIG_SYS_MEMTEST_START 0x80100000
124#define CONFIG_SYS_MEMTEST_END 0x80800000
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125
126/*-----------------------------------------------------------------------
127 * FLASH and environment organization
128 */
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129#ifdef CONFIG_DBAU1550
130
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131#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
132#define CONFIG_SYS_MAX_FLASH_SECT (512) /* max number of sectors on one chip */
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133
134#define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */
135#define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */
136
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137#else /* CONFIG_DBAU1550 */
138
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139#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
140#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
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141
142#define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
143#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
144
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145#endif /* CONFIG_DBAU1550 */
146
6d0f6bcf 147#define CONFIG_SYS_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
ad88297e 148
6d0f6bcf 149#define CONFIG_SYS_FLASH_CFI 1
00b1883a 150#define CONFIG_FLASH_CFI_DRIVER 1
ff36fd85 151
5da627a4 152/* The following #defines are needed to get flash environment right */
14d0a02a 153#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf 154#define CONFIG_SYS_MONITOR_LEN (192 << 10)
5da627a4 155
6d0f6bcf 156#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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157
158/* We boot from this flash, selected with dip switch */
6d0f6bcf 159#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2
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160
161/* timeout values are in ticks */
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162#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
163#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
5da627a4 164
93f6d725 165#define CONFIG_ENV_IS_NOWHERE 1
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166
167/* Address and size of Primary Environment Sector */
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168#define CONFIG_ENV_ADDR 0xB0030000
169#define CONFIG_ENV_SIZE 0x10000
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170
171#define CONFIG_FLASH_16BIT
172
173#define CONFIG_NR_DRAM_BANKS 2
174
5da627a4 175
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176#ifdef CONFIG_DBAU1550
177#define MEM_SIZE 192
178#else
179#define MEM_SIZE 64
180#endif
181
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182#define CONFIG_MEMSIZE_IN_BYTES
183
ff36fd85 184#ifndef CONFIG_DBAU1550
5da627a4 185/*---ATA PCMCIA ------------------------------------*/
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186#define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
187#define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
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188#define CONFIG_PCMCIA_SLOT_A
189
190#define CONFIG_ATAPI 1
191#define CONFIG_MAC_PARTITION 1
192
193/* We run CF in "true ide" mode or a harddrive via pcmcia */
194#define CONFIG_IDE_PCMCIA 1
195
196/* We only support one slot for now */
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197#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
198#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
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199
200#undef CONFIG_IDE_LED /* LED for ide not supported */
201#undef CONFIG_IDE_RESET /* reset for ide not supported */
202
6d0f6bcf 203#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
5da627a4 204
6d0f6bcf 205#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
5da627a4 206
d4ca31c4 207/* Offset for data I/O */
6d0f6bcf 208#define CONFIG_SYS_ATA_DATA_OFFSET 8
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209
210/* Offset for normal register accesses */
6d0f6bcf 211#define CONFIG_SYS_ATA_REG_OFFSET 0
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212
213/* Offset for alternate registers */
6d0f6bcf 214#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
ff36fd85 215#endif /* CONFIG_DBAU1550 */
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216
217/*-----------------------------------------------------------------------
218 * Cache Configuration
219 */
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220#define CONFIG_SYS_DCACHE_SIZE 16384
221#define CONFIG_SYS_ICACHE_SIZE 16384
222#define CONFIG_SYS_CACHELINE_SIZE 32
5da627a4 223
5da627a4 224#endif /* __CONFIG_H */