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Commit | Line | Data |
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2fc32dea | 1 | /* |
a187559e | 2 | * U-Boot - Configuration file for SSV DNP5370 board |
2fc32dea AS |
3 | */ |
4 | ||
5 | #ifndef __CONFIG_DNP5370_H__ | |
6 | #define __CONFIG_DNP5370_H__ | |
7 | ||
8 | /* this must come first */ | |
9 | #include <asm/config-pre.h> | |
10 | ||
11 | /* | |
12 | * Processor Settings | |
13 | */ | |
14 | #define CONFIG_BFIN_CPU bf537-0.3 | |
15 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS | |
16 | ||
17 | /* | |
18 | * Clock Settings | |
19 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV | |
20 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV | |
21 | */ | |
22 | #define CONFIG_CLKIN_HZ 25000000 | |
23 | #define CONFIG_CLKIN_HALF 0 | |
24 | #define CONFIG_PLL_BYPASS 0 | |
25 | #define CONFIG_VCO_MULT 24 | |
26 | #define CONFIG_CCLK_DIV 1 | |
27 | #define CONFIG_SCLK_DIV 5 | |
28 | ||
29 | /* | |
30 | * Memory Settings | |
31 | */ | |
32 | #define CONFIG_MEM_ADD_WDTH 9 | |
33 | #define CONFIG_MEM_SIZE 32 | |
34 | ||
35 | #define CONFIG_EBIU_SDRRC_VAL 0x03a0 | |
36 | #define CONFIG_EBIU_SDBCTL_VAL 0x0013 | |
37 | #define CONFIG_EBIU_SDGCTL_VAL 0x8091998d | |
38 | ||
39 | #define CONFIG_EBIU_AMGCTL_VAL 0xF7 | |
40 | #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 | |
41 | #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 | |
42 | ||
43 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) | |
44 | #define CONFIG_SYS_MALLOC_LEN (128 * 1024) | |
45 | ||
46 | /* | |
47 | * Network Settings | |
48 | */ | |
49 | #ifndef __ADSPBF534__ | |
8b3637c6 | 50 | #define CONFIG_ROOTPATH "/romfs" |
2fc32dea | 51 | |
2fc32dea AS |
52 | #define CONFIG_BFIN_MAC 1 |
53 | #define CONFIG_PHY_ADDR 0 | |
54 | #define CONFIG_RMII 1 | |
55 | ||
2fc32dea AS |
56 | #endif |
57 | ||
58 | /* | |
59 | * Flash Settings | |
60 | * | |
61 | * Only 3 MB of the 4 MB NOR flash are addressable. | |
62 | * But limiting the flash size does not seem to work. | |
63 | * It seems the CFI detection has precedence. | |
64 | */ | |
65 | #define CONFIG_FLASH_CFI_DRIVER | |
66 | #define CONFIG_SYS_FLASH_BASE 0x20000000 | |
67 | #define CONFIG_SYS_FLASH_CFI | |
68 | #define CONFIG_SYS_FLASH_PROTECTION | |
69 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
70 | #define CONFIG_SYS_MAX_FLASH_SECT 71 /* (M29W320EB) */ | |
71 | ||
72 | /* 512k reserved for u-boot */ | |
73 | #define CONFIG_SYS_JFFS2_FIRST_SECTOR 15 | |
74 | ||
75 | /* | |
76 | * Env Storage Settings | |
77 | */ | |
78 | #define CONFIG_ENV_IS_IN_FLASH 1 | |
79 | #define CONFIG_ENV_ADDR 0x20004000 | |
80 | #define CONFIG_ENV_SIZE 0x00002000 | |
81 | #define CONFIG_ENV_SECT_SIZE 0x00002000 /* Total Size of Environment Sector */ | |
82 | #define CONFIG_ENV_OFFSET 0x00004000 /* (CONFIG_ENV_ADDR - CONFIG_FLASH_BASE) */ | |
83 | ||
84 | #define ENV_IS_EMBEDDED | |
85 | #define LDS_BOARD_TEXT \ | |
e2906a59 MY |
86 | arch/blackfin/lib/built-in.o (.text*); \ |
87 | arch/blackfin/cpu/built-in.o (.text*); \ | |
2fc32dea AS |
88 | . = DEFINED(env_offset) ? env_offset : .; \ |
89 | common/env_embedded.o (.text*); | |
90 | ||
91 | /* | |
92 | * Misc Settings | |
93 | */ | |
2fc32dea AS |
94 | #define CONFIG_CMD_STRINGS |
95 | #define CONFIG_MISC_INIT_R | |
96 | #define CONFIG_RTC_BFIN | |
97 | #define CONFIG_SYS_LONGHELP | |
98 | ||
99 | /* This disables the hardware watchdog (not inside the bfin) */ | |
100 | #define CONFIG_DNP5370_EXT_WD_DISABLE 1 | |
101 | ||
102 | #define CONFIG_UART_CONSOLE 0 | |
7a58eb96 | 103 | #define CONFIG_BFIN_SERIAL |
2fc32dea AS |
104 | #define CONFIG_BAUDRATE 115200 |
105 | #define CONFIG_BOOTCOMMAND "bootm 0x20030000" | |
106 | #define CONFIG_BOOTARGS "console=ttyBF0,115200 root=/dev/mtdblock3 rootfstype=ext2" | |
107 | ||
108 | /* Convenience commands to update Linux in NOR flash */ | |
109 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
110 | "fetchme=tftpboot 0x01000000 uImage;" \ | |
111 | "iminfo\0" \ | |
112 | "flashme=protect off 0x20030000 0x2003ffff;" \ | |
113 | "erase 0x20030000 0x202effff;" \ | |
114 | "cp.b 0x01000000 0x20030000 0x2c0000\0" \ | |
115 | "runme=bootm 0x01000000\0" | |
116 | ||
2fc32dea | 117 | #endif |