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5ea01ab1 SG |
1 | /* |
2 | * Copyright (C) 2013 Samsung Electronics | |
3 | * | |
4 | * Common configuration settings for the SAMSUNG EXYNOS boards. | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __EXYNOS_COMMON_H | |
10 | #define __EXYNOS_COMMON_H | |
11 | ||
12 | /* High Level Configuration Options */ | |
13 | #define CONFIG_SAMSUNG /* in a SAMSUNG core */ | |
14 | #define CONFIG_S5P /* S5P Family */ | |
15 | ||
16 | #include <asm/arch/cpu.h> /* get chip and board defs */ | |
17 | #include <linux/sizes.h> | |
18 | ||
5ea01ab1 | 19 | #define CONFIG_ARCH_CPU_INIT |
5ea01ab1 | 20 | #define CONFIG_SKIP_LOWLEVEL_INIT |
5ea01ab1 | 21 | |
5ea01ab1 | 22 | /* Keep L2 Cache Disabled */ |
5ea01ab1 SG |
23 | |
24 | /* input clock of PLL: 24MHz input clock */ | |
25 | #define CONFIG_SYS_CLK_FREQ 24000000 | |
e4916e85 | 26 | #define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ |
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27 | |
28 | #define CONFIG_SETUP_MEMORY_TAGS | |
29 | #define CONFIG_CMDLINE_TAG | |
30 | #define CONFIG_INITRD_TAG | |
5ea01ab1 SG |
31 | #define CONFIG_ENV_OVERWRITE |
32 | ||
2ecd7797 | 33 | /* Size of malloc() pool before and after relocation */ |
2ecd7797 | 34 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20)) |
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35 | |
36 | /* select serial console configuration */ | |
5ea01ab1 SG |
37 | |
38 | /* SD/MMC configuration */ | |
5ea01ab1 SG |
39 | #define CONFIG_BOUNCE_BUFFER |
40 | ||
5ea01ab1 SG |
41 | /* PWM */ |
42 | #define CONFIG_PWM | |
43 | ||
5ea01ab1 | 44 | /* Miscellaneous configurable options */ |
cf3c03b1 IC |
45 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
46 | #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */ | |
5ea01ab1 SG |
47 | |
48 | /* Boot Argument Buffer Size */ | |
49 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
50 | ||
adc7d206 IC |
51 | #include <config_distro_defaults.h> |
52 | ||
5ea01ab1 | 53 | #endif /* __CONFIG_H */ |