projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 6a994e5b NI |
2 | /* |
| 3 | * include/configs/gose.h | |
| 4 | * | |
| 5 | * Copyright (C) 2014 Renesas Electronics Corporation | |
| 6a994e5b NI |
6 | */ |
| 7 | ||
| 8 | #ifndef __GOSE_H | |
| 9 | #define __GOSE_H | |
| 10 | ||
| 5ca6dfe6 | 11 | #include "rcar-gen2-common.h" |
| 6a994e5b | 12 | |
| 49aefe30 MV |
13 | #define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 |
| 14 | #define STACK_AREA_SIZE 0x00100000 | |
| 15 | #define LOW_LEVEL_MERAM_STACK \ | |
| 16 | (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) | |
| 6a994e5b NI |
17 | |
| 18 | /* MEMORY */ | |
| 5ca6dfe6 | 19 | #define RCAR_GEN2_SDRAM_BASE 0x40000000 |
| 49aefe30 MV |
20 | #define RCAR_GEN2_SDRAM_SIZE (1048u * 1024 * 1024) |
| 21 | #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512u * 1024 * 1024) | |
| 6a994e5b | 22 | |
| f0261243 | 23 | /* SH Ether */ |
| f0261243 NI |
24 | #define CONFIG_SH_ETHER_USE_PORT 0 |
| 25 | #define CONFIG_SH_ETHER_PHY_ADDR 0x1 | |
| 26 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII | |
| 27 | #define CONFIG_SH_ETHER_CACHE_WRITEBACK | |
| 28 | #define CONFIG_SH_ETHER_CACHE_INVALIDATE | |
| 49aefe30 | 29 | #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 |
| f0261243 | 30 | #define CONFIG_BITBANGMII_MULTI |
| f0261243 | 31 | |
| 6a994e5b NI |
32 | /* Board Clock */ |
| 33 | #define RMOBILE_XTAL_CLK 20000000u | |
| 34 | #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK | |
| 8e2e5886 | 35 | |
| 49aefe30 | 36 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 07a8060a | 37 | "bootm_size=0x10000000\0" |
| 49aefe30 MV |
38 | |
| 39 | /* SPL support */ | |
| 49aefe30 MV |
40 | #define CONFIG_SPL_STACK 0xe6340000 |
| 41 | #define CONFIG_SPL_MAX_SIZE 0x4000 | |
| 49aefe30 MV |
42 | #ifdef CONFIG_SPL_BUILD |
| 43 | #define CONFIG_CONS_SCIF0 | |
| 44 | #define CONFIG_SH_SCIF_CLK_FREQ 65000000 | |
| 45 | #endif | |
| e2abab69 | 46 | |
| 6a994e5b | 47 | #endif /* __GOSE_H */ |