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6ed8a43a DH |
1 | /* Configuration header file for Gaisler GR-CPCI-AX2000 |
2 | * AX board. Note that since the AX is removable the configuration | |
3 | * for this board must be edited below. | |
4 | * | |
5 | * (C) Copyright 2003-2005 | |
6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
7 | * | |
8 | * (C) Copyright 2008 | |
9 | * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. | |
10 | * | |
3765b3e7 | 11 | * SPDX-License-Identifier: GPL-2.0+ |
6ed8a43a DH |
12 | */ |
13 | ||
14 | #ifndef __CONFIG_H__ | |
15 | #define __CONFIG_H__ | |
16 | ||
a62bba15 | 17 | #define CONFIG_SYS_GENERIC_BOARD |
4c547754 | 18 | #define CONFIG_DISPLAY_BOARDINFO |
a62bba15 | 19 | |
6ed8a43a DH |
20 | /* |
21 | * High Level Configuration Options | |
22 | * (easy to change) | |
23 | */ | |
24 | ||
6ed8a43a DH |
25 | #define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */ |
26 | ||
27 | #define CONFIG_LEON_RAM_SRAM 1 | |
28 | #define CONFIG_LEON_RAM_SDRAM 2 | |
29 | #define CONFIG_LEON_RAM_SDRAM_NOSRAM 3 | |
30 | ||
31 | /* Select Memory to run from | |
32 | * | |
33 | * SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000 | |
34 | * SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000 | |
35 | * SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000 | |
36 | * | |
37 | * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since | |
38 | * it doesn't fit into the 4Mb SRAM. | |
39 | * | |
40 | * SRAM is default since it will work for all systems, however will not | |
41 | * be able to boot linux. | |
42 | */ | |
43 | #define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM | |
44 | ||
45 | /* CPU / AMBA BUS configuration */ | |
53677ef1 | 46 | #define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */ |
6ed8a43a | 47 | |
6ed8a43a DH |
48 | /* |
49 | * Serial console configuration | |
50 | */ | |
51 | #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ | |
6d0f6bcf | 52 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
6ed8a43a DH |
53 | |
54 | /* Partitions */ | |
55 | #define CONFIG_DOS_PARTITION | |
56 | #define CONFIG_MAC_PARTITION | |
57 | #define CONFIG_ISO_PARTITION | |
58 | ||
59 | /* | |
60 | * Supported commands | |
61 | */ | |
6ed8a43a | 62 | #define CONFIG_CMD_REGINFO |
6ed8a43a DH |
63 | #define CONFIG_CMD_PING |
64 | #define CONFIG_CMD_DIAG | |
65 | #define CONFIG_CMD_IRQ | |
66 | ||
67 | /* | |
68 | * Autobooting | |
69 | */ | |
70 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ | |
71 | ||
72 | #define CONFIG_PREBOOT "echo;" \ | |
73 | "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ | |
74 | "echo" | |
75 | ||
76 | #undef CONFIG_BOOTARGS | |
77 | ||
78 | #define CONFIG_EXTRA_ENV_SETTINGS_BASE \ | |
79 | "netdev=eth0\0" \ | |
80 | "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \ | |
81 | "nfsroot=${serverip}:${rootpath}\0" \ | |
82 | "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \ | |
83 | "addip=setenv bootargs ${bootargs} " \ | |
84 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ | |
85 | ":${hostname}:${netdev}:off panic=1\0" \ | |
86 | "flash_nfs=run nfsargs addip;" \ | |
87 | "bootm ${kernel_addr}\0" \ | |
88 | "flash_self=run ramargs addip;" \ | |
89 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ | |
3a2b9f28 | 90 | "getkernel=tftpboot $(scratch) $(bootfile)\0" \ |
6ed8a43a DH |
91 | "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0" |
92 | ||
93 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM | |
94 | #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ | |
95 | "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
96 | "scratch=40200000\0" \ | |
97 | "" | |
98 | #elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM | |
99 | #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ | |
100 | "net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
101 | "scratch=60800000\0" \ | |
102 | "" | |
103 | #else | |
104 | /* More than 4Mb is assumed when running from SDRAM */ | |
105 | #define CONFIG_EXTRA_ENV_SETTINGS_SELECT \ | |
106 | "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
107 | "scratch=40800000\0" \ | |
108 | "" | |
109 | #endif | |
110 | ||
111 | #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT | |
112 | ||
113 | #define CONFIG_NETMASK 255.255.255.0 | |
114 | #define CONFIG_GATEWAYIP 192.168.0.1 | |
115 | #define CONFIG_SERVERIP 192.168.0.20 | |
116 | #define CONFIG_IPADDR 192.168.0.206 | |
8b3637c6 | 117 | #define CONFIG_ROOTPATH "/export/rootfs" |
6ed8a43a | 118 | #define CONFIG_HOSTNAME ax2000 |
b3f44c21 | 119 | #define CONFIG_BOOTFILE "/uImage" |
6ed8a43a DH |
120 | |
121 | #define CONFIG_BOOTCOMMAND "run flash_self" | |
122 | ||
123 | /* Memory MAP | |
124 | * | |
125 | * Flash: | |
126 | * |--------------------------------| | |
127 | * | 0x00000000 Text & Data & BSS | * | |
128 | * | for Monitor | * | |
129 | * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * | |
130 | * | UNUSED / Growth | * 256kb | |
131 | * |--------------------------------| | |
132 | * | 0x00050000 Base custom area | * | |
133 | * | kernel / FS | * | |
134 | * | | * Rest of Flash | |
135 | * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| | |
136 | * | END-0x00008000 Environment | * 32kb | |
137 | * |--------------------------------| | |
138 | * | |
139 | * | |
140 | * | |
141 | * Main Memory (4Mb SRAM or XMb SDRAM): | |
142 | * |--------------------------------| | |
143 | * | UNUSED / scratch area | | |
144 | * | | | |
145 | * | | | |
146 | * | | | |
147 | * | | | |
148 | * |--------------------------------| | |
149 | * | Monitor .Text / .DATA / .BSS | * 256kb | |
150 | * | Relocated! | * | |
151 | * |--------------------------------| | |
152 | * | Monitor Malloc | * 128kb (contains relocated environment) | |
153 | * |--------------------------------| | |
154 | * | Monitor/kernel STACK | * 64kb | |
155 | * |--------------------------------| | |
156 | * | Page Table for MMU systems | * 2k | |
157 | * |--------------------------------| | |
158 | * | PROM Code accessed from Linux | * 6kb-128b | |
159 | * |--------------------------------| | |
160 | * | Global data (avail from kernel)| * 128b | |
161 | * |--------------------------------| | |
162 | * | |
163 | */ | |
164 | ||
165 | /* | |
166 | * Flash configuration (8,16 or 32 MB) | |
167 | * TEXT base always at 0xFFF00000 | |
168 | * ENV_ADDR always at 0xFFF40000 | |
169 | * FLASH_BASE at 0xFC000000 for 64 MB | |
170 | * 0xFE000000 for 32 MB | |
171 | * 0xFF000000 for 16 MB | |
172 | * 0xFF800000 for 8 MB | |
173 | */ | |
6d0f6bcf JCPV |
174 | /*#define CONFIG_SYS_NO_FLASH 1*/ |
175 | #define CONFIG_SYS_FLASH_BASE 0x00000000 | |
176 | #define CONFIG_SYS_FLASH_SIZE 0x00800000 | |
6ed8a43a DH |
177 | |
178 | #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */ | |
6d0f6bcf JCPV |
179 | #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */ |
180 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ | |
6ed8a43a | 181 | |
6d0f6bcf JCPV |
182 | #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
183 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ | |
184 | #define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ | |
185 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ | |
186 | #define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ | |
6ed8a43a DH |
187 | |
188 | /*** CFI CONFIG ***/ | |
6d0f6bcf | 189 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT |
00b1883a | 190 | #define CONFIG_FLASH_CFI_DRIVER |
6d0f6bcf | 191 | #define CONFIG_SYS_FLASH_CFI |
6ed8a43a | 192 | /* Bypass cache when reading regs from flash memory */ |
6d0f6bcf | 193 | #define CONFIG_SYS_FLASH_CFI_BYPASS_READ |
6ed8a43a | 194 | /* Buffered writes (32byte/go) instead of single accesses */ |
6d0f6bcf | 195 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
6ed8a43a DH |
196 | |
197 | /* | |
198 | * Environment settings | |
199 | */ | |
93f6d725 | 200 | /*#define CONFIG_ENV_IS_NOWHERE 1*/ |
5a1aceb0 | 201 | #define CONFIG_ENV_IS_IN_FLASH 1 |
0e8d1586 JCPV |
202 | /* CONFIG_ENV_ADDR need to be at sector boundary */ |
203 | #define CONFIG_ENV_SIZE 0x8000 | |
204 | #define CONFIG_ENV_SECT_SIZE 0x20000 | |
6d0f6bcf | 205 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE) |
6ed8a43a DH |
206 | #define CONFIG_ENV_OVERWRITE 1 |
207 | ||
208 | /* | |
209 | * Memory map | |
210 | * | |
211 | * Always 4Mb SRAM available | |
212 | * SDRAM module may be available on 0x60000000, SDRAM | |
213 | * is configured as if a 128Mb SDRAM module is available. | |
214 | */ | |
215 | ||
216 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM | |
6d0f6bcf | 217 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
6ed8a43a | 218 | #else |
6d0f6bcf | 219 | #define CONFIG_SYS_SDRAM_BASE 0x60000000 |
6ed8a43a DH |
220 | #endif |
221 | ||
6d0f6bcf JCPV |
222 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 |
223 | #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE) | |
6ed8a43a DH |
224 | |
225 | /* 4Mb SRAM available */ | |
226 | #if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM | |
6d0f6bcf JCPV |
227 | #define CONFIG_SYS_SRAM_BASE 0x40000000 |
228 | #define CONFIG_SYS_SRAM_SIZE 0x400000 | |
229 | #define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE+CONFIG_SYS_SRAM_SIZE) | |
6ed8a43a DH |
230 | #endif |
231 | ||
232 | /* Select RAM used to run U-BOOT from... */ | |
233 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM | |
6d0f6bcf JCPV |
234 | #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SRAM_BASE |
235 | #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SRAM_SIZE | |
236 | #define CONFIG_SYS_RAM_END CONFIG_SYS_SRAM_END | |
6ed8a43a | 237 | #else |
6d0f6bcf JCPV |
238 | #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE |
239 | #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE | |
240 | #define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END | |
6ed8a43a DH |
241 | #endif |
242 | ||
25ddd1fb | 243 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE) |
6ed8a43a | 244 | |
25ddd1fb | 245 | #define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE) |
6d0f6bcf | 246 | #define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE) |
6ed8a43a | 247 | |
6d0f6bcf JCPV |
248 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) |
249 | #define CONFIG_SYS_STACK_SIZE (0x10000-32) | |
6ed8a43a | 250 | |
14d0a02a | 251 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
6d0f6bcf JCPV |
252 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
253 | # define CONFIG_SYS_RAMBOOT 1 | |
6ed8a43a DH |
254 | #endif |
255 | ||
6d0f6bcf JCPV |
256 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
257 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ | |
258 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ | |
6ed8a43a | 259 | |
6d0f6bcf JCPV |
260 | #define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE) |
261 | #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN) | |
6ed8a43a DH |
262 | |
263 | /* relocated monitor area */ | |
6d0f6bcf JCPV |
264 | #define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE |
265 | #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) | |
6ed8a43a DH |
266 | |
267 | /* make un relocated address from relocated address */ | |
14d0a02a | 268 | #define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) |
6ed8a43a DH |
269 | |
270 | /* | |
271 | * Ethernet configuration uses on board SMC91C111 | |
272 | */ | |
7194ab80 | 273 | #define CONFIG_SMC91111 1 |
6ed8a43a DH |
274 | #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ |
275 | #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ | |
276 | #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ | |
277 | /*#define CONFIG_SHOW_ACTIVITY*/ | |
278 | #define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ | |
279 | ||
6ed8a43a DH |
280 | #define CONFIG_PHY_ADDR 0x00 |
281 | ||
282 | /* | |
283 | * Miscellaneous configurable options | |
284 | */ | |
6d0f6bcf | 285 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
6ed8a43a | 286 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 287 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
6ed8a43a | 288 | #else |
6d0f6bcf | 289 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
6ed8a43a | 290 | #endif |
6d0f6bcf JCPV |
291 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
292 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
293 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
6ed8a43a | 294 | |
6d0f6bcf JCPV |
295 | #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
296 | #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ | |
6ed8a43a | 297 | |
6d0f6bcf | 298 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
6ed8a43a | 299 | |
6ed8a43a DH |
300 | /* |
301 | * Various low-level settings | |
302 | */ | |
303 | ||
304 | /*----------------------------------------------------------------------- | |
305 | * USB stuff | |
306 | *----------------------------------------------------------------------- | |
307 | */ | |
308 | #define CONFIG_USB_CLOCK 0x0001BBBB | |
309 | #define CONFIG_USB_CONFIG 0x00005000 | |
310 | ||
311 | /***** Gaisler GRLIB IP-Cores Config ********/ | |
312 | ||
6d0f6bcf | 313 | #define CONFIG_SYS_GRLIB_SDRAM 0 |
6ed8a43a | 314 | |
cff009ed DH |
315 | /* No SDRAM Configuration */ |
316 | #undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1 | |
317 | ||
6ed8a43a DH |
318 | /* See, GRLIB Docs (grip.pdf) on how to set up |
319 | * These the memory controller registers. | |
320 | */ | |
cff009ed DH |
321 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1 |
322 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff | (1<<11)) | |
6ed8a43a | 323 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM |
cff009ed | 324 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000 |
6ed8a43a | 325 | #else |
cff009ed | 326 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82205260 |
6ed8a43a | 327 | #endif |
cff009ed | 328 | #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x0809a000 |
6ed8a43a | 329 | |
cff009ed DH |
330 | /* GRLIB FT-MCTRL configuration */ |
331 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1 | |
332 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff | (1<<11)) | |
6ed8a43a | 333 | #if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM |
cff009ed | 334 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000 |
6ed8a43a | 335 | #else |
cff009ed | 336 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82205260 |
6ed8a43a | 337 | #endif |
cff009ed | 338 | #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x0809a000 |
6ed8a43a DH |
339 | |
340 | /* no DDR controller */ | |
cff009ed | 341 | #undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1 |
6ed8a43a DH |
342 | |
343 | /* no DDR2 Controller */ | |
cff009ed | 344 | #undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1 |
6ed8a43a | 345 | |
6ed8a43a | 346 | /* Identification string */ |
4c547754 | 347 | #define CONFIG_IDENT_STRING " Gaisler LEON3 GR-CPCI-AX2000" |
6ed8a43a DH |
348 | |
349 | /* default kernel command line */ | |
350 | #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" | |
351 | ||
352 | #endif /* __CONFIG_H */ |