[people/ms/u-boot.git] / include / configs / gr_ep2s60.h

/* Configuration header file for Gaisler Research AB's Template
 * design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS
 * Development board Stratix II edition, with the FPGA device
 * EP2S60.
 *
 * (C) Copyright 2003-2005
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * (C) Copyright 2008
 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H__
#define __CONFIG_H__

/*
 * High Level Configuration Options
 * (easy to change)
 */

#define CONFIG_LEON3		/* This is an LEON3 CPU */
#define CONFIG_LEON		1	/* This is an LEON CPU */
/* Altera NIOS Development board, Stratix II board */
#define CONFIG_GR_EP2S60	1

/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ	96000000	/* 96MHz */

/* Number of SPARC register windows */
#define CONFIG_SYS_SPARC_NWINDOWS 8

/* Define this is the GR-2S60-MEZZ mezzanine is available and you
 * want to use the USB and GRETH functionality of the board
 */
#undef GR_2S60_MEZZ

#ifdef GR_2S60_MEZZ
#define USE_GRETH 1
#define USE_GRUSB 1
#endif

/*
 * Serial console configuration
 */
#define CONFIG_BAUDRATE		38400	/* ... at 38400 bps */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

/* Partitions */
#define CONFIG_DOS_PARTITION
#define CONFIG_MAC_PARTITION
#define CONFIG_ISO_PARTITION

/*
 * Supported commands
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_AMBAPP
#define CONFIG_CMD_PING
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_IRQ

/* USB support */
#if USE_GRUSB
#define CONFIG_USB_UHCI
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
/* Enable needed helper functions */
#define CONFIG_SYS_STDIO_DEREGISTER	/* needs stdio_deregister */
#endif

/*
 * Autobooting
 */
#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */

#define CONFIG_PREBOOT	"echo;"	\
	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	"echo"

#undef	CONFIG_BOOTARGS

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw "	\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0"			\
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"flash_nfs=run nfsargs addip;"					\
		"bootm ${kernel_addr}\0"				\
	"flash_self=run ramargs addip;"					\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0"	\
	"scratch=40800000\0"					\
	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
	"bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \
	""

#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_SERVERIP 192.168.0.20
#define CONFIG_IPADDR 192.168.0.207
#define CONFIG_ROOTPATH "/export/rootfs"
#define CONFIG_HOSTNAME  ml401
#define CONFIG_BOOTFILE "/uImage"

#define CONFIG_BOOTCOMMAND	"run flash_self"

/* Memory MAP
 *
 *  Flash:
 *  |--------------------------------|
 *  | 0x00000000 Text & Data & BSS   | *
 *  |            for Monitor         | *
 *  | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
 *  | UNUSED / Growth                | * 256kb
 *  |--------------------------------|
 *  | 0x00050000 Base custom area    | *
 *  |            kernel / FS         | *
 *  |                                | * Rest of Flash
 *  |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
 *  | END-0x00008000 Environment     | * 32kb
 *  |--------------------------------|
 *
 *
 *
 *  Main Memory:
 *  |--------------------------------|
 *  | UNUSED / scratch area          |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |--------------------------------|
 *  | Monitor .Text / .DATA / .BSS   | * 512kb
 *  | Relocated!                     | *
 *  |--------------------------------|
 *  | Monitor Malloc                 | * 128kb (contains relocated environment)
 *  |--------------------------------|
 *  | Monitor/kernel STACK           | * 64kb
 *  |--------------------------------|
 *  | Page Table for MMU systems     | * 2k
 *  |--------------------------------|
 *  | PROM Code accessed from Linux  | * 6kb-128b
 *  |--------------------------------|
 *  | Global data (avail from kernel)| * 128b
 *  |--------------------------------|
 *
 */

/*
 * Flash configuration (8,16 or 32 MB)
 * TEXT base always at 0xFFF00000
 * ENV_ADDR always at  0xFFF40000
 * FLASH_BASE at 0xFC000000 for 64 MB
 *               0xFE000000 for 32 MB
 *               0xFF000000 for 16 MB
 *               0xFF800000 for  8 MB
 */
/*#define CONFIG_SYS_NO_FLASH		1*/
#define CONFIG_SYS_FLASH_BASE		0x00000000
#define CONFIG_SYS_FLASH_SIZE		0x00400000	/* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */

#define PHYS_FLASH_SECT_SIZE	0x00010000	/* 64 KB sectors */
#define CONFIG_SYS_MAX_FLASH_SECT	256	/* max num of sects on one chip */
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks      */

#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)  */
#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)  */
#define CONFIG_SYS_FLASH_LOCK_TOUT	5	/* Timeout for Flash Set Lock Bit (in ms) */
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	10000	/* Timeout for Flash Clear Lock Bits (in ms) */
#define CONFIG_SYS_FLASH_PROTECTION	/* "Real" (hardware) sectors protection */

/*** CFI CONFIG ***/
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_8BIT
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
/* Bypass cache when reading regs from flash memory */
#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
/* Buffered writes (32byte/go) instead of single accesses */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE

/*
 * Environment settings
 */
/*#define CONFIG_ENV_IS_NOWHERE 1*/
#define CONFIG_ENV_IS_IN_FLASH	1
/* CONFIG_ENV_ADDR need to be at sector boundary */
#define CONFIG_ENV_SIZE		0x8000
#define CONFIG_ENV_SECT_SIZE	0x20000
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_OVERWRITE	1

/*
 * Memory map
 */
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_SDRAM_SIZE		0x02000000
#define CONFIG_SYS_SDRAM_END		(CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)

/* no SRAM available */
#undef CONFIG_SYS_SRAM_BASE
#undef CONFIG_SYS_SRAM_SIZE

#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END

#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_SDRAM_END - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_PROM_SIZE		(8192-GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE		(0x10000-32)

#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#   define CONFIG_SYS_RAMBOOT		1
#endif

#define CONFIG_SYS_MONITOR_LEN		(512 << 10)	/* Reserve 512 kB for Monitor   */
#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()  */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */

#define CONFIG_SYS_MALLOC_END		(CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)

/* relocated monitor area */
#define CONFIG_SYS_RELOC_MONITOR_MAX_END   CONFIG_SYS_MALLOC_BASE
#define CONFIG_SYS_RELOC_MONITOR_BASE     (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)

/* make un relocated address from relocated address */
#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))

/*
 * Ethernet configuration uses on board SMC91C111, however if a mezzanine
 * with a PHY is attached the GRETH can be used on this board.
 * Define USE_GRETH in order to use the mezzanine provided PHY with the
 * onchip GRETH network MAC, note that this is not supported by the
 * template design.
 */
#ifndef USE_GRETH

/* USE SMC91C111 MAC */
#define CONFIG_SMC91111          1
#define CONFIG_SMC91111_BASE		0x20000300	/* chip select 3         */
#define CONFIG_SMC_USE_32_BIT		1	/* 32 bit bus  */
#undef  CONFIG_SMC_91111_EXT_PHY	/* we use internal phy   */
/*#define CONFIG_SHOW_ACTIVITY*/
#define CONFIG_NET_RETRY_COUNT		10	/* # of retries          */

#else

/* USE GRETH Ethernet Driver */
#define CONFIG_GRETH	1

/* Default GRETH Ethernet HARDWARE address */
#define GRETH_HWADDR_0 0x00
#define GRETH_HWADDR_1 0x00
#define GRETH_HWADDR_2 0x7a
#define GRETH_HWADDR_3 0xcc
#define GRETH_HWADDR_4 0x00
#define GRETH_HWADDR_5 0x13
#endif

#define CONFIG_ETHADDR   00:00:7a:cc:00:13
#define CONFIG_PHY_ADDR	 0x00

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP		/* undef to save memory     */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
#else
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16	/* max number of command args   */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size    */

#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM  */

#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

/*-----------------------------------------------------------------------
 * USB stuff
 *-----------------------------------------------------------------------
 */
#define CONFIG_USB_CLOCK	0x0001BBBB
#define CONFIG_USB_CONFIG	0x00005000

/***** Gaisler GRLIB IP-Cores Config ********/

/* AMBA Plug & Play info display on startup */
/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/

#define CONFIG_SYS_GRLIB_SDRAM    0

/* See, GRLIB Docs (grip.pdf) on how to set up
 * These the memory controller registers.
 */
#define CONFIG_SYS_GRLIB_MEMCFG1  (0x10f800ff | (1<<11))
#define CONFIG_SYS_GRLIB_MEMCFG2  0x00000000
#define CONFIG_SYS_GRLIB_MEMCFG3  0x00000000

#define CONFIG_SYS_GRLIB_FT_MEMCFG1  (0x10f800ff | (1<<11))
#define CONFIG_SYS_GRLIB_FT_MEMCFG2  0x00000000
#define CONFIG_SYS_GRLIB_FT_MEMCFG3  0x00000000

#define CONFIG_SYS_GRLIB_DDR_CFG  0xa900830a

#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000

/* Calculate scaler register value from default baudrate */
#define CONFIG_SYS_GRLIB_APBUART_SCALER \
 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)

/* Identification string */
#define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60"

/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"

#endif				/* __CONFIG_H */
Commit	Line	Data
6940383d DH	1	/* Configuration header file for Gaisler Research AB's Template
	2	* design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS
	3	* Development board Stratix II edition, with the FPGA device
	4	* EP2S60.
	5	*
	6	* (C) Copyright 2003-2005
	7	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	8	*
	9	* (C) Copyright 2008
	10	* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
	11	*
3765b3e7	12	* SPDX-License-Identifier: GPL-2.0+
6940383d DH	13	*/
	14
	15	#ifndef __CONFIG_H__
	16	#define __CONFIG_H__
	17
	18	/*
	19	* High Level Configuration Options
	20	* (easy to change)
	21	*/
	22
	23	#define CONFIG_LEON3 /* This is an LEON3 CPU */
	24	#define CONFIG_LEON 1 /* This is an LEON CPU */
	25	/* Altera NIOS Development board, Stratix II board */
53677ef1	26	#define CONFIG_GR_EP2S60 1
6940383d DH	27
6940383d DH	28	/* CPU / AMBA BUS configuration */
53677ef1	29	#define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */
6940383d DH	30
6940383d DH	31	/* Number of SPARC register windows */
6d0f6bcf	32	#define CONFIG_SYS_SPARC_NWINDOWS 8
6940383d DH	33
	34	/* Define this is the GR-2S60-MEZZ mezzanine is available and you
	35	* want to use the USB and GRETH functionality of the board
	36	*/
	37	#undef GR_2S60_MEZZ
	38
	39	#ifdef GR_2S60_MEZZ
	40	#define USE_GRETH 1
	41	#define USE_GRUSB 1
	42	#endif
	43
	44	/*
	45	* Serial console configuration
	46	*/
	47	#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
6d0f6bcf	48	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
6940383d DH	49
	50	/* Partitions */
	51	#define CONFIG_DOS_PARTITION
	52	#define CONFIG_MAC_PARTITION
	53	#define CONFIG_ISO_PARTITION
	54
	55	/*
	56	* Supported commands
	57	*/
	58	#include <config_cmd_default.h>
	59
	60	#define CONFIG_CMD_REGINFO
	61	#define CONFIG_CMD_AMBAPP
	62	#define CONFIG_CMD_PING
	63	#define CONFIG_CMD_DIAG
	64	#define CONFIG_CMD_IRQ
	65
	66	/* USB support */
	67	#if USE_GRUSB
	68	#define CONFIG_USB_UHCI
	69	#define CONFIG_CMD_FAT
	70	#define CONFIG_CMD_EXT2
	71	#define CONFIG_CMD_USB
	72	#define CONFIG_USB_STORAGE
	73	/* Enable needed helper functions */
52cb4d4f	74	#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
6940383d DH	75	#endif
	76
	77	/*
	78	* Autobooting
	79	*/
	80	#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
	81
	82	#define CONFIG_PREBOOT "echo;" \
	83	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	84	"echo"
	85
	86	#undef CONFIG_BOOTARGS
	87
	88	#define CONFIG_EXTRA_ENV_SETTINGS \
	89	"netdev=eth0\0" \
	90	"nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
	91	"nfsroot=${serverip}:${rootpath}\0" \
	92	"ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
	93	"addip=setenv bootargs ${bootargs} " \
	94	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	95	":${hostname}:${netdev}:off panic=1\0" \
	96	"flash_nfs=run nfsargs addip;" \
	97	"bootm ${kernel_addr}\0" \
	98	"flash_self=run ramargs addip;" \
	99	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
	100	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
	101	"scratch=40800000\0" \
3a2b9f28	102	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
6940383d DH	103	"bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \
	104	""
	105
	106	#define CONFIG_NETMASK 255.255.255.0
	107	#define CONFIG_GATEWAYIP 192.168.0.1
	108	#define CONFIG_SERVERIP 192.168.0.20
	109	#define CONFIG_IPADDR 192.168.0.207
8b3637c6	110	#define CONFIG_ROOTPATH "/export/rootfs"
6940383d	111	#define CONFIG_HOSTNAME ml401
b3f44c21	112	#define CONFIG_BOOTFILE "/uImage"
6940383d DH	113
	114	#define CONFIG_BOOTCOMMAND "run flash_self"
	115
	116	/* Memory MAP
	117	*
	118	* Flash:
	119	* \|--------------------------------\|
	120	* \| 0x00000000 Text & Data & BSS \| *
	121	* \| for Monitor \| *
	122	* \| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\| *
	123	* \| UNUSED / Growth \| * 256kb
	124	* \|--------------------------------\|
	125	* \| 0x00050000 Base custom area \| *
	126	* \| kernel / FS \| *
	127	* \| \| * Rest of Flash
	128	* \|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\|
	129	* \| END-0x00008000 Environment \| * 32kb
	130	* \|--------------------------------\|
	131	*
	132	*
	133	*
	134	* Main Memory:
	135	* \|--------------------------------\|
	136	* \| UNUSED / scratch area \|
	137	* \| \|
	138	* \| \|
	139	* \| \|
	140	* \| \|
	141	* \|--------------------------------\|
	142	* \| Monitor .Text / .DATA / .BSS \| * 512kb
	143	* \| Relocated! \| *
	144	* \|--------------------------------\|
	145	* \| Monitor Malloc \| * 128kb (contains relocated environment)
	146	* \|--------------------------------\|
	147	* \| Monitor/kernel STACK \| * 64kb
	148	* \|--------------------------------\|
	149	* \| Page Table for MMU systems \| * 2k
	150	* \|--------------------------------\|
	151	* \| PROM Code accessed from Linux \| * 6kb-128b
	152	* \|--------------------------------\|
	153	* \| Global data (avail from kernel)\| * 128b
	154	* \|--------------------------------\|
	155	*
	156	*/
	157
	158	/*
	159	* Flash configuration (8,16 or 32 MB)
	160	* TEXT base always at 0xFFF00000
	161	* ENV_ADDR always at 0xFFF40000
	162	* FLASH_BASE at 0xFC000000 for 64 MB
	163	* 0xFE000000 for 32 MB
	164	* 0xFF000000 for 16 MB
	165	* 0xFF800000 for 8 MB
	166	*/
6d0f6bcf JCPV	167	/#define CONFIG_SYS_NO_FLASH 1/
	168	#define CONFIG_SYS_FLASH_BASE 0x00000000
	169	#define CONFIG_SYS_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */
6940383d DH	170
6940383d DH	171	#define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */
6d0f6bcf JCPV	172	#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
6d0f6bcf JCPV	173	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
6940383d	174
6d0f6bcf JCPV	175	#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
	176	#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
	177	#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
	178	#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
	179	#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
6940383d DH	180
6940383d DH	181	/* CFI CONFIG */
6d0f6bcf	182	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
00b1883a	183	#define CONFIG_FLASH_CFI_DRIVER
6d0f6bcf	184	#define CONFIG_SYS_FLASH_CFI
6940383d	185	/* Bypass cache when reading regs from flash memory */
6d0f6bcf	186	#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
6940383d	187	/* Buffered writes (32byte/go) instead of single accesses */
6d0f6bcf	188	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
6940383d DH	189
	190	/*
	191	* Environment settings
	192	*/
93f6d725	193	/#define CONFIG_ENV_IS_NOWHERE 1/
5a1aceb0	194	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	195	/* CONFIG_ENV_ADDR need to be at sector boundary */
	196	#define CONFIG_ENV_SIZE 0x8000
	197	#define CONFIG_ENV_SECT_SIZE 0x20000
6d0f6bcf	198	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
6940383d DH	199	#define CONFIG_ENV_OVERWRITE 1
	200
	201	/*
	202	* Memory map
	203	*/
6d0f6bcf JCPV	204	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	205	#define CONFIG_SYS_SDRAM_SIZE 0x02000000
	206	#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
6940383d DH	207
6940383d DH	208	/* no SRAM available */
6d0f6bcf JCPV	209	#undef CONFIG_SYS_SRAM_BASE
6d0f6bcf JCPV	210	#undef CONFIG_SYS_SRAM_SIZE
6940383d	211
6d0f6bcf JCPV	212	#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
	213	#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
	214	#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
6940383d	215
25ddd1fb	216	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_END - GENERATED_GBL_DATA_SIZE)
6940383d	217
25ddd1fb	218	#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
6d0f6bcf	219	#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
6940383d	220
6d0f6bcf JCPV	221	#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
6d0f6bcf JCPV	222	#define CONFIG_SYS_STACK_SIZE (0x10000-32)
6940383d	223
14d0a02a	224	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf JCPV	225	#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
6d0f6bcf JCPV	226	# define CONFIG_SYS_RAMBOOT 1
6940383d DH	227	#endif
6940383d DH	228
6d0f6bcf JCPV	229	#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
	230	#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
	231	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
6940383d	232
6d0f6bcf JCPV	233	#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
6d0f6bcf JCPV	234	#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
6940383d DH	235
6940383d DH	236	/* relocated monitor area */
6d0f6bcf JCPV	237	#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
6d0f6bcf JCPV	238	#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
6940383d DH	239
6940383d DH	240	/* make un relocated address from relocated address */
14d0a02a	241	#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
6940383d DH	242
	243	/*
	244	* Ethernet configuration uses on board SMC91C111, however if a mezzanine
	245	* with a PHY is attached the GRETH can be used on this board.
	246	* Define USE_GRETH in order to use the mezzanine provided PHY with the
	247	* onchip GRETH network MAC, note that this is not supported by the
	248	* template design.
	249	*/
	250	#ifndef USE_GRETH
	251
	252	/* USE SMC91C111 MAC */
7194ab80	253	#define CONFIG_SMC91111 1
6940383d DH	254	#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
	255	#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
	256	#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
	257	/#define CONFIG_SHOW_ACTIVITY/
	258	#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
	259
	260	#else
	261
	262	/* USE GRETH Ethernet Driver */
6940383d DH	263	#define CONFIG_GRETH 1
	264
	265	/* Default GRETH Ethernet HARDWARE address */
	266	#define GRETH_HWADDR_0 0x00
	267	#define GRETH_HWADDR_1 0x00
	268	#define GRETH_HWADDR_2 0x7a
	269	#define GRETH_HWADDR_3 0xcc
	270	#define GRETH_HWADDR_4 0x00
	271	#define GRETH_HWADDR_5 0x13
	272	#endif
	273
	274	#define CONFIG_ETHADDR 00:00:7a:cc:00:13
	275	#define CONFIG_PHY_ADDR 0x00
	276
	277	/*
	278	* Miscellaneous configurable options
	279	*/
6d0f6bcf	280	#define CONFIG_SYS_LONGHELP /* undef to save memory */
6940383d	281	#if defined(CONFIG_CMD_KGDB)
6d0f6bcf	282	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
6940383d	283	#else
6d0f6bcf	284	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
6940383d	285	#endif
6d0f6bcf JCPV	286	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	287	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	288	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
6940383d	289
6d0f6bcf JCPV	290	#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
6d0f6bcf JCPV	291	#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
6940383d	292
6d0f6bcf	293	#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
6940383d	294
6940383d DH	295	/*-----------------------------------------------------------------------
	296	* USB stuff
	297	*-----------------------------------------------------------------------
	298	*/
	299	#define CONFIG_USB_CLOCK 0x0001BBBB
	300	#define CONFIG_USB_CONFIG 0x00005000
	301
	302	/*** Gaisler GRLIB IP-Cores Config ******/
	303
	304	/* AMBA Plug & Play info display on startup */
6d0f6bcf	305	/#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP/
6940383d	306
6d0f6bcf	307	#define CONFIG_SYS_GRLIB_SDRAM 0
6940383d DH	308
	309	/* See, GRLIB Docs (grip.pdf) on how to set up
	310	* These the memory controller registers.
	311	*/
6d0f6bcf JCPV	312	#define CONFIG_SYS_GRLIB_MEMCFG1 (0x10f800ff \| (1<<11))
	313	#define CONFIG_SYS_GRLIB_MEMCFG2 0x00000000
	314	#define CONFIG_SYS_GRLIB_MEMCFG3 0x00000000
6940383d	315
6d0f6bcf JCPV	316	#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x10f800ff \| (1<<11))
	317	#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x00000000
	318	#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00000000
6940383d	319
6d0f6bcf	320	#define CONFIG_SYS_GRLIB_DDR_CFG 0xa900830a
6940383d	321
6d0f6bcf JCPV	322	#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
6d0f6bcf JCPV	323	#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
6940383d DH	324
6940383d DH	325	/* Calculate scaler register value from default baudrate */
6d0f6bcf	326	#define CONFIG_SYS_GRLIB_APBUART_SCALER \
6940383d DH	327	((((CONFIG_SYS_CLK_FREQ10)/(CONFIG_BAUDRATE8))-5)/10)
	328
	329	/* Identification string */
	330	#define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60"
	331
	332	/* default kernel command line */
	333	#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
	334
	335	#endif /* __CONFIG_H */