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6940383d DH |
1 | /* Configuration header file for Gaisler Research AB's Template |
2 | * design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS | |
3 | * Development board Stratix II edition, with the FPGA device | |
4 | * EP2S60. | |
5 | * | |
6 | * (C) Copyright 2003-2005 | |
7 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
8 | * | |
9 | * (C) Copyright 2008 | |
10 | * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. | |
11 | * | |
3765b3e7 | 12 | * SPDX-License-Identifier: GPL-2.0+ |
6940383d DH |
13 | */ |
14 | ||
15 | #ifndef __CONFIG_H__ | |
16 | #define __CONFIG_H__ | |
17 | ||
18 | /* | |
19 | * High Level Configuration Options | |
20 | * (easy to change) | |
21 | */ | |
22 | ||
6940383d | 23 | /* Altera NIOS Development board, Stratix II board */ |
53677ef1 | 24 | #define CONFIG_GR_EP2S60 1 |
6940383d DH |
25 | |
26 | /* CPU / AMBA BUS configuration */ | |
53677ef1 | 27 | #define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */ |
6940383d DH |
28 | |
29 | /* Number of SPARC register windows */ | |
6d0f6bcf | 30 | #define CONFIG_SYS_SPARC_NWINDOWS 8 |
6940383d DH |
31 | |
32 | /* Define this is the GR-2S60-MEZZ mezzanine is available and you | |
33 | * want to use the USB and GRETH functionality of the board | |
34 | */ | |
35 | #undef GR_2S60_MEZZ | |
36 | ||
37 | #ifdef GR_2S60_MEZZ | |
38 | #define USE_GRETH 1 | |
39 | #define USE_GRUSB 1 | |
40 | #endif | |
41 | ||
42 | /* | |
43 | * Serial console configuration | |
44 | */ | |
45 | #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ | |
6d0f6bcf | 46 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
6940383d DH |
47 | |
48 | /* Partitions */ | |
49 | #define CONFIG_DOS_PARTITION | |
50 | #define CONFIG_MAC_PARTITION | |
51 | #define CONFIG_ISO_PARTITION | |
52 | ||
53 | /* | |
54 | * Supported commands | |
55 | */ | |
56 | #include <config_cmd_default.h> | |
57 | ||
58 | #define CONFIG_CMD_REGINFO | |
59 | #define CONFIG_CMD_AMBAPP | |
60 | #define CONFIG_CMD_PING | |
61 | #define CONFIG_CMD_DIAG | |
62 | #define CONFIG_CMD_IRQ | |
63 | ||
64 | /* USB support */ | |
65 | #if USE_GRUSB | |
66 | #define CONFIG_USB_UHCI | |
67 | #define CONFIG_CMD_FAT | |
68 | #define CONFIG_CMD_EXT2 | |
69 | #define CONFIG_CMD_USB | |
70 | #define CONFIG_USB_STORAGE | |
71 | /* Enable needed helper functions */ | |
52cb4d4f | 72 | #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */ |
6940383d DH |
73 | #endif |
74 | ||
75 | /* | |
76 | * Autobooting | |
77 | */ | |
78 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ | |
79 | ||
80 | #define CONFIG_PREBOOT "echo;" \ | |
81 | "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ | |
82 | "echo" | |
83 | ||
84 | #undef CONFIG_BOOTARGS | |
85 | ||
86 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
87 | "netdev=eth0\0" \ | |
88 | "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \ | |
89 | "nfsroot=${serverip}:${rootpath}\0" \ | |
90 | "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \ | |
91 | "addip=setenv bootargs ${bootargs} " \ | |
92 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ | |
93 | ":${hostname}:${netdev}:off panic=1\0" \ | |
94 | "flash_nfs=run nfsargs addip;" \ | |
95 | "bootm ${kernel_addr}\0" \ | |
96 | "flash_self=run ramargs addip;" \ | |
97 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ | |
98 | "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
99 | "scratch=40800000\0" \ | |
3a2b9f28 | 100 | "getkernel=tftpboot $(scratch) $(bootfile)\0" \ |
6940383d DH |
101 | "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \ |
102 | "" | |
103 | ||
104 | #define CONFIG_NETMASK 255.255.255.0 | |
105 | #define CONFIG_GATEWAYIP 192.168.0.1 | |
106 | #define CONFIG_SERVERIP 192.168.0.20 | |
107 | #define CONFIG_IPADDR 192.168.0.207 | |
8b3637c6 | 108 | #define CONFIG_ROOTPATH "/export/rootfs" |
6940383d | 109 | #define CONFIG_HOSTNAME ml401 |
b3f44c21 | 110 | #define CONFIG_BOOTFILE "/uImage" |
6940383d DH |
111 | |
112 | #define CONFIG_BOOTCOMMAND "run flash_self" | |
113 | ||
114 | /* Memory MAP | |
115 | * | |
116 | * Flash: | |
117 | * |--------------------------------| | |
118 | * | 0x00000000 Text & Data & BSS | * | |
119 | * | for Monitor | * | |
120 | * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * | |
121 | * | UNUSED / Growth | * 256kb | |
122 | * |--------------------------------| | |
123 | * | 0x00050000 Base custom area | * | |
124 | * | kernel / FS | * | |
125 | * | | * Rest of Flash | |
126 | * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| | |
127 | * | END-0x00008000 Environment | * 32kb | |
128 | * |--------------------------------| | |
129 | * | |
130 | * | |
131 | * | |
132 | * Main Memory: | |
133 | * |--------------------------------| | |
134 | * | UNUSED / scratch area | | |
135 | * | | | |
136 | * | | | |
137 | * | | | |
138 | * | | | |
139 | * |--------------------------------| | |
140 | * | Monitor .Text / .DATA / .BSS | * 512kb | |
141 | * | Relocated! | * | |
142 | * |--------------------------------| | |
143 | * | Monitor Malloc | * 128kb (contains relocated environment) | |
144 | * |--------------------------------| | |
145 | * | Monitor/kernel STACK | * 64kb | |
146 | * |--------------------------------| | |
147 | * | Page Table for MMU systems | * 2k | |
148 | * |--------------------------------| | |
149 | * | PROM Code accessed from Linux | * 6kb-128b | |
150 | * |--------------------------------| | |
151 | * | Global data (avail from kernel)| * 128b | |
152 | * |--------------------------------| | |
153 | * | |
154 | */ | |
155 | ||
156 | /* | |
157 | * Flash configuration (8,16 or 32 MB) | |
158 | * TEXT base always at 0xFFF00000 | |
159 | * ENV_ADDR always at 0xFFF40000 | |
160 | * FLASH_BASE at 0xFC000000 for 64 MB | |
161 | * 0xFE000000 for 32 MB | |
162 | * 0xFF000000 for 16 MB | |
163 | * 0xFF800000 for 8 MB | |
164 | */ | |
6d0f6bcf JCPV |
165 | /*#define CONFIG_SYS_NO_FLASH 1*/ |
166 | #define CONFIG_SYS_FLASH_BASE 0x00000000 | |
167 | #define CONFIG_SYS_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */ | |
6940383d DH |
168 | |
169 | #define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */ | |
6d0f6bcf JCPV |
170 | #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */ |
171 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ | |
6940383d | 172 | |
6d0f6bcf JCPV |
173 | #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
174 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ | |
175 | #define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ | |
176 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ | |
177 | #define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ | |
6940383d DH |
178 | |
179 | /*** CFI CONFIG ***/ | |
6d0f6bcf | 180 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT |
00b1883a | 181 | #define CONFIG_FLASH_CFI_DRIVER |
6d0f6bcf | 182 | #define CONFIG_SYS_FLASH_CFI |
6940383d | 183 | /* Bypass cache when reading regs from flash memory */ |
6d0f6bcf | 184 | #define CONFIG_SYS_FLASH_CFI_BYPASS_READ |
6940383d | 185 | /* Buffered writes (32byte/go) instead of single accesses */ |
6d0f6bcf | 186 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
6940383d DH |
187 | |
188 | /* | |
189 | * Environment settings | |
190 | */ | |
93f6d725 | 191 | /*#define CONFIG_ENV_IS_NOWHERE 1*/ |
5a1aceb0 | 192 | #define CONFIG_ENV_IS_IN_FLASH 1 |
0e8d1586 JCPV |
193 | /* CONFIG_ENV_ADDR need to be at sector boundary */ |
194 | #define CONFIG_ENV_SIZE 0x8000 | |
195 | #define CONFIG_ENV_SECT_SIZE 0x20000 | |
6d0f6bcf | 196 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE) |
6940383d DH |
197 | #define CONFIG_ENV_OVERWRITE 1 |
198 | ||
199 | /* | |
200 | * Memory map | |
201 | */ | |
6d0f6bcf JCPV |
202 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
203 | #define CONFIG_SYS_SDRAM_SIZE 0x02000000 | |
204 | #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE) | |
6940383d DH |
205 | |
206 | /* no SRAM available */ | |
6d0f6bcf JCPV |
207 | #undef CONFIG_SYS_SRAM_BASE |
208 | #undef CONFIG_SYS_SRAM_SIZE | |
6940383d | 209 | |
6d0f6bcf JCPV |
210 | #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE |
211 | #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE | |
212 | #define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END | |
6940383d | 213 | |
25ddd1fb | 214 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_END - GENERATED_GBL_DATA_SIZE) |
6940383d | 215 | |
25ddd1fb | 216 | #define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE) |
6d0f6bcf | 217 | #define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE) |
6940383d | 218 | |
6d0f6bcf JCPV |
219 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) |
220 | #define CONFIG_SYS_STACK_SIZE (0x10000-32) | |
6940383d | 221 | |
14d0a02a | 222 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
6d0f6bcf JCPV |
223 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
224 | # define CONFIG_SYS_RAMBOOT 1 | |
6940383d DH |
225 | #endif |
226 | ||
6d0f6bcf JCPV |
227 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */ |
228 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ | |
229 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ | |
6940383d | 230 | |
6d0f6bcf JCPV |
231 | #define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE) |
232 | #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN) | |
6940383d DH |
233 | |
234 | /* relocated monitor area */ | |
6d0f6bcf JCPV |
235 | #define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE |
236 | #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) | |
6940383d DH |
237 | |
238 | /* make un relocated address from relocated address */ | |
14d0a02a | 239 | #define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) |
6940383d DH |
240 | |
241 | /* | |
242 | * Ethernet configuration uses on board SMC91C111, however if a mezzanine | |
243 | * with a PHY is attached the GRETH can be used on this board. | |
244 | * Define USE_GRETH in order to use the mezzanine provided PHY with the | |
245 | * onchip GRETH network MAC, note that this is not supported by the | |
246 | * template design. | |
247 | */ | |
248 | #ifndef USE_GRETH | |
249 | ||
250 | /* USE SMC91C111 MAC */ | |
7194ab80 | 251 | #define CONFIG_SMC91111 1 |
6940383d DH |
252 | #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ |
253 | #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ | |
254 | #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */ | |
255 | /*#define CONFIG_SHOW_ACTIVITY*/ | |
256 | #define CONFIG_NET_RETRY_COUNT 10 /* # of retries */ | |
257 | ||
258 | #else | |
259 | ||
260 | /* USE GRETH Ethernet Driver */ | |
6940383d DH |
261 | #define CONFIG_GRETH 1 |
262 | ||
6940383d DH |
263 | #define CONFIG_PHY_ADDR 0x00 |
264 | ||
265 | /* | |
266 | * Miscellaneous configurable options | |
267 | */ | |
6d0f6bcf | 268 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
6940383d | 269 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 270 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
6940383d | 271 | #else |
6d0f6bcf | 272 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
6940383d | 273 | #endif |
6d0f6bcf JCPV |
274 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
275 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
276 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
6940383d | 277 | |
6d0f6bcf JCPV |
278 | #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
279 | #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ | |
6940383d | 280 | |
6d0f6bcf | 281 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
6940383d | 282 | |
6940383d DH |
283 | /*----------------------------------------------------------------------- |
284 | * USB stuff | |
285 | *----------------------------------------------------------------------- | |
286 | */ | |
287 | #define CONFIG_USB_CLOCK 0x0001BBBB | |
288 | #define CONFIG_USB_CONFIG 0x00005000 | |
289 | ||
290 | /***** Gaisler GRLIB IP-Cores Config ********/ | |
291 | ||
292 | /* AMBA Plug & Play info display on startup */ | |
6d0f6bcf | 293 | /*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/ |
6940383d | 294 | |
6d0f6bcf | 295 | #define CONFIG_SYS_GRLIB_SDRAM 0 |
6940383d DH |
296 | |
297 | /* See, GRLIB Docs (grip.pdf) on how to set up | |
298 | * These the memory controller registers. | |
299 | */ | |
6d0f6bcf JCPV |
300 | #define CONFIG_SYS_GRLIB_MEMCFG1 (0x10f800ff | (1<<11)) |
301 | #define CONFIG_SYS_GRLIB_MEMCFG2 0x00000000 | |
302 | #define CONFIG_SYS_GRLIB_MEMCFG3 0x00000000 | |
6940383d | 303 | |
6d0f6bcf JCPV |
304 | #define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11)) |
305 | #define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x00000000 | |
306 | #define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00000000 | |
6940383d | 307 | |
6d0f6bcf | 308 | #define CONFIG_SYS_GRLIB_DDR_CFG 0xa900830a |
6940383d | 309 | |
6d0f6bcf JCPV |
310 | #define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000 |
311 | #define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000 | |
6940383d DH |
312 | |
313 | /* Calculate scaler register value from default baudrate */ | |
6d0f6bcf | 314 | #define CONFIG_SYS_GRLIB_APBUART_SCALER \ |
6940383d DH |
315 | ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) |
316 | ||
317 | /* Identification string */ | |
318 | #define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60" | |
319 | ||
320 | /* default kernel command line */ | |
321 | #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" | |
322 | ||
323 | #endif /* __CONFIG_H */ |