[people/ms/u-boot.git] / include / configs / gr_xc3s_1500.h

/* Configuration header file for Gaisler GR-XC3S-1500
 * spartan board.
 *
 * (C) Copyright 2003-2005
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * (C) Copyright 2007
 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H__
#define __CONFIG_H__

/*
 * High Level Configuration Options
 * (easy to change)
 */

#define CONFIG_LEON3		/* This is an LEON3 CPU */
#define CONFIG_LEON		1	/* This is an LEON CPU */
#define CONFIG_GRXC3S1500	1	/* ... on GR-XC3S-1500 board */

/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ	40000000	/* 40MHz */

/* Number of SPARC register windows */
#define CONFIG_SYS_SPARC_NWINDOWS 8

/*
 * Serial console configuration
 */
#define CONFIG_BAUDRATE		38400	/* ... at 38400 bps */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

/* Partitions */
#define CONFIG_DOS_PARTITION
#define CONFIG_MAC_PARTITION
#define CONFIG_ISO_PARTITION

/*
 * Supported commands
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_AMBAPP
#define CONFIG_CMD_PING
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_IRQ

/*
 * Autobooting
 */
#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */

#define CONFIG_PREBOOT	"echo;"	\
	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	"echo"

#undef	CONFIG_BOOTARGS

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw "	\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0"			\
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"flash_nfs=run nfsargs addip;"					\
		"bootm ${kernel_addr}\0"				\
	"flash_self=run ramargs addip;"					\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0"	\
	"scratch=40200000\0"					\
	"getkernel=tftpboot \$\(scratch\)\ \$\(bootfile\)\0" \
	"bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \
	""

#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_SERVERIP 192.168.0.20
#define CONFIG_IPADDR 192.168.0.206
#define CONFIG_ROOTPATH /export/rootfs
#define CONFIG_HOSTNAME  grxc3s1500
#define CONFIG_BOOTFILE  /uImage

#define CONFIG_BOOTCOMMAND	"run flash_self"

/* Memory MAP
 *
 *  Flash:
 *  |--------------------------------|
 *  | 0x00000000 Text & Data & BSS   | *
 *  |            for Monitor         | *
 *  | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
 *  | UNUSED / Growth                | * 256kb
 *  |--------------------------------|
 *  | 0x00050000 Base custom area    | *
 *  |            kernel / FS         | *
 *  |                                | * Rest of Flash
 *  |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
 *  | END-0x00008000 Environment     | * 32kb
 *  |--------------------------------|
 *
 *
 *
 *  Main Memory:
 *  |--------------------------------|
 *  | UNUSED / scratch area          |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |--------------------------------|
 *  | Monitor .Text / .DATA / .BSS   | * 256kb
 *  | Relocated!                     | *
 *  |--------------------------------|
 *  | Monitor Malloc                 | * 128kb (contains relocated environment)
 *  |--------------------------------|
 *  | Monitor/kernel STACK           | * 64kb
 *  |--------------------------------|
 *  | Page Table for MMU systems     | * 2k
 *  |--------------------------------|
 *  | PROM Code accessed from Linux  | * 6kb-128b
 *  |--------------------------------|
 *  | Global data (avail from kernel)| * 128b
 *  |--------------------------------|
 *
 */

/*
 * Flash configuration (8,16 or 32 MB)
 * TEXT base always at 0xFFF00000
 * ENV_ADDR always at  0xFFF40000
 * FLASH_BASE at 0xFC000000 for 64 MB
 *               0xFE000000 for 32 MB
 *               0xFF000000 for 16 MB
 *               0xFF800000 for  8 MB
 */
/*#define CONFIG_SYS_NO_FLASH		1*/
#define CONFIG_SYS_FLASH_BASE		0x00000000
#define CONFIG_SYS_FLASH_SIZE		0x00800000

#define PHYS_FLASH_SECT_SIZE	0x00020000	/* 128 KB sectors */
#define CONFIG_SYS_MAX_FLASH_SECT	64	/* max num of sects on one chip */
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks      */

#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)  */
#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)  */
#define CONFIG_SYS_FLASH_LOCK_TOUT	5	/* Timeout for Flash Set Lock Bit (in ms) */
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	10000	/* Timeout for Flash Clear Lock Bits (in ms) */
#define CONFIG_SYS_FLASH_PROTECTION	/* "Real" (hardware) sectors protection */

/*** CFI CONFIG ***/
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_8BIT
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
/* Bypass cache when reading regs from flash memory */
#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
/* Buffered writes (32byte/go) instead of single accesses */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE

/*
 * Environment settings
 */
/*#define CONFIG_ENV_IS_NOWHERE 1*/
#define CONFIG_ENV_IS_IN_FLASH	1
/* CONFIG_ENV_ADDR need to be at sector boundary */
#define CONFIG_ENV_SIZE		0x8000
#define CONFIG_ENV_SECT_SIZE	0x20000
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_OVERWRITE	1

/*
 * Memory map
 */
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_SDRAM_SIZE		0x4000000
#define CONFIG_SYS_SDRAM_END		(CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)

/* no SRAM available */
#undef CONFIG_SYS_SRAM_BASE
#undef CONFIG_SYS_SRAM_SIZE

/* Always Run U-Boot from SDRAM */
#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END

#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_PROM_SIZE		(8192-GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE		(0x10000-32)

#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#   define CONFIG_SYS_RAMBOOT		1
#endif

#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor   */
#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()  */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */

#define CONFIG_SYS_MALLOC_END		(CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)

/* relocated monitor area */
#define CONFIG_SYS_RELOC_MONITOR_MAX_END   CONFIG_SYS_MALLOC_BASE
#define CONFIG_SYS_RELOC_MONITOR_BASE     (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)

/* make un relocated address from relocated address */
#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))

/*
 * Ethernet configuration
 */
#define CONFIG_GRETH	1

/* Default GRETH Ethernet HARDWARE address */
#define GRETH_HWADDR_0 0x00
#define GRETH_HWADDR_1 0x00
#define GRETH_HWADDR_2 0x7a
#define GRETH_HWADDR_3 0xcc
#define GRETH_HWADDR_4 0x00
#define GRETH_HWADDR_5 0x12

#define CONFIG_ETHADDR   00:00:7a:cc:00:12
#define CONFIG_PHY_ADDR	 0x00

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP		/* undef to save memory     */
#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
#else
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16	/* max number of command args   */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size    */

#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM  */

#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */

/*
 * Various low-level settings
 */

/*-----------------------------------------------------------------------
 * USB stuff
 *-----------------------------------------------------------------------
 */
#define CONFIG_USB_CLOCK	0x0001BBBB
#define CONFIG_USB_CONFIG	0x00005000

/***** Gaisler GRLIB IP-Cores Config ********/

/* AMBA Plug & Play info display on startup */
/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/

#define CONFIG_SYS_GRLIB_SDRAM    0

/* See, GRLIB Docs (grip.pdf) on how to set up
 * These the memory controller registers.
 */
#define CONFIG_SYS_GRLIB_MEMCFG1   (0x000000ff | (1<<11))
#define CONFIG_SYS_GRLIB_MEMCFG2   0x82206000
#define CONFIG_SYS_GRLIB_MEMCFG3   0x00136000

#define CONFIG_SYS_GRLIB_FT_MEMCFG1   (0x000000ff | (1<<11))
#define CONFIG_SYS_GRLIB_FT_MEMCFG2   0x82206000
#define CONFIG_SYS_GRLIB_FT_MEMCFG3   0x00136000

/* no DDR controller */
#define CONFIG_SYS_GRLIB_DDR_CFG   0x00000000

/* no DDR2 Controller */
#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000

/* Calculate scaler register value from default baudrate */
#define CONFIG_SYS_GRLIB_APBUART_SCALER \
 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)

/* Identification string */
#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-XC3S-1500"

/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"

#endif				/* __CONFIG_H */
Commit	Line	Data
71d7e4c0 DH	1	/* Configuration header file for Gaisler GR-XC3S-1500
	2	* spartan board.
	3	*
	4	* (C) Copyright 2003-2005
	5	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	6	*
	7	* (C) Copyright 2007
	8	* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
	9	*
	10	* See file CREDITS for list of people who contributed to this
	11	* project.
	12	*
	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License as
	15	* published by the Free Software Foundation; either version 2 of
	16	* the License, or (at your option) any later version.
	17	*
	18	* This program is distributed in the hope that it will be useful,
	19	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	20	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	21	* GNU General Public License for more details.
	22	*
	23	* You should have received a copy of the GNU General Public License
	24	* along with this program; if not, write to the Free Software
	25	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	26	* MA 02111-1307 USA
	27	*/
	28
	29	#ifndef __CONFIG_H__
	30	#define __CONFIG_H__
	31
	32	/*
	33	* High Level Configuration Options
	34	* (easy to change)
	35	*/
	36
	37	#define CONFIG_LEON3 /* This is an LEON3 CPU */
	38	#define CONFIG_LEON 1 /* This is an LEON CPU */
	39	#define CONFIG_GRXC3S1500 1 /* ... on GR-XC3S-1500 board */
	40
	41	/* CPU / AMBA BUS configuration */
53677ef1	42	#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
71d7e4c0 DH	43
71d7e4c0 DH	44	/* Number of SPARC register windows */
6d0f6bcf	45	#define CONFIG_SYS_SPARC_NWINDOWS 8
71d7e4c0 DH	46
	47	/*
	48	* Serial console configuration
	49	*/
	50	#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
6d0f6bcf	51	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
71d7e4c0 DH	52
	53	/* Partitions */
	54	#define CONFIG_DOS_PARTITION
	55	#define CONFIG_MAC_PARTITION
	56	#define CONFIG_ISO_PARTITION
	57
	58	/*
	59	* Supported commands
	60	*/
	61	#include <config_cmd_default.h>
	62
	63	#define CONFIG_CMD_REGINFO
	64	#define CONFIG_CMD_AMBAPP
	65	#define CONFIG_CMD_PING
	66	#define CONFIG_CMD_DIAG
	67	#define CONFIG_CMD_IRQ
	68
	69	/*
	70	* Autobooting
	71	*/
	72	#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
	73
	74	#define CONFIG_PREBOOT "echo;" \
	75	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	76	"echo"
	77
	78	#undef CONFIG_BOOTARGS
	79
	80	#define CONFIG_EXTRA_ENV_SETTINGS \
	81	"netdev=eth0\0" \
	82	"nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
	83	"nfsroot=${serverip}:${rootpath}\0" \
	84	"ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
	85	"addip=setenv bootargs ${bootargs} " \
	86	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	87	":${hostname}:${netdev}:off panic=1\0" \
	88	"flash_nfs=run nfsargs addip;" \
	89	"bootm ${kernel_addr}\0" \
	90	"flash_self=run ramargs addip;" \
	91	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
	92	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
	93	"scratch=40200000\0" \
	94	"getkernel=tftpboot \$\(scratch\)\ \$\(bootfile\)\0" \
	95	"bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:grxc3s1500_daniel:eth0\0" \
	96	""
	97
	98	#define CONFIG_NETMASK 255.255.255.0
	99	#define CONFIG_GATEWAYIP 192.168.0.1
	100	#define CONFIG_SERVERIP 192.168.0.20
	101	#define CONFIG_IPADDR 192.168.0.206
	102	#define CONFIG_ROOTPATH /export/rootfs
	103	#define CONFIG_HOSTNAME grxc3s1500
	104	#define CONFIG_BOOTFILE /uImage
	105
	106	#define CONFIG_BOOTCOMMAND "run flash_self"
	107
	108	/* Memory MAP
	109	*
	110	* Flash:
	111	* \|--------------------------------\|
	112	* \| 0x00000000 Text & Data & BSS \| *
	113	* \| for Monitor \| *
	114	* \| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\| *
	115	* \| UNUSED / Growth \| * 256kb
116	* \|--------------------------------\|
117	* \| 0x00050000 Base custom area \| *
118	* \| kernel / FS \| *
119	* \| \| * Rest of Flash
120	* \|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\|
121	* \| END-0x00008000 Environment \| * 32kb
122	* \|--------------------------------\|
123	*
124	*
125	*
126	* Main Memory:
127	* \|--------------------------------\|
128	* \| UNUSED / scratch area \|
129	* \| \|
130	* \| \|
131	* \| \|
132	* \| \|
133	* \|--------------------------------\|
134	* \| Monitor .Text / .DATA / .BSS \| * 256kb
135	* \| Relocated! \| *
136	* \|--------------------------------\|
137	* \| Monitor Malloc \| * 128kb (contains relocated environment)
138	* \|--------------------------------\|
139	* \| Monitor/kernel STACK \| * 64kb
140	* \|--------------------------------\|
141	* \| Page Table for MMU systems \| * 2k
142	* \|--------------------------------\|
143	* \| PROM Code accessed from Linux \| * 6kb-128b
144	* \|--------------------------------\|
145	* \| Global data (avail from kernel)\| * 128b
146	* \|--------------------------------\|
147	*
148	*/
149
150	/*
151	* Flash configuration (8,16 or 32 MB)
152	* TEXT base always at 0xFFF00000
153	* ENV_ADDR always at 0xFFF40000
154	* FLASH_BASE at 0xFC000000 for 64 MB
155	* 0xFE000000 for 32 MB
156	* 0xFF000000 for 16 MB
157	* 0xFF800000 for 8 MB
158	*/
6d0f6bcf JCPV	159	/#define CONFIG_SYS_NO_FLASH 1/
	160	#define CONFIG_SYS_FLASH_BASE 0x00000000
	161	#define CONFIG_SYS_FLASH_SIZE 0x00800000
71d7e4c0 DH	162
71d7e4c0 DH	163	#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
6d0f6bcf JCPV	164	#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
6d0f6bcf JCPV	165	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
71d7e4c0	166
6d0f6bcf JCPV	167	#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
	168	#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
	169	#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
	170	#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
	171	#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
71d7e4c0 DH	172
71d7e4c0 DH	173	/* CFI CONFIG */
6d0f6bcf	174	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
00b1883a	175	#define CONFIG_FLASH_CFI_DRIVER
6d0f6bcf	176	#define CONFIG_SYS_FLASH_CFI
71d7e4c0	177	/* Bypass cache when reading regs from flash memory */
6d0f6bcf	178	#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
71d7e4c0	179	/* Buffered writes (32byte/go) instead of single accesses */
6d0f6bcf	180	#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
71d7e4c0 DH	181
	182	/*
	183	* Environment settings
	184	*/
93f6d725	185	/#define CONFIG_ENV_IS_NOWHERE 1/
5a1aceb0	186	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	187	/* CONFIG_ENV_ADDR need to be at sector boundary */
	188	#define CONFIG_ENV_SIZE 0x8000
	189	#define CONFIG_ENV_SECT_SIZE 0x20000
6d0f6bcf	190	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
71d7e4c0 DH	191	#define CONFIG_ENV_OVERWRITE 1
	192
	193	/*
	194	* Memory map
	195	*/
6d0f6bcf JCPV	196	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	197	#define CONFIG_SYS_SDRAM_SIZE 0x4000000
	198	#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
71d7e4c0 DH	199
71d7e4c0 DH	200	/* no SRAM available */
6d0f6bcf JCPV	201	#undef CONFIG_SYS_SRAM_BASE
6d0f6bcf JCPV	202	#undef CONFIG_SYS_SRAM_SIZE
71d7e4c0 DH	203
71d7e4c0 DH	204	/* Always Run U-Boot from SDRAM */
6d0f6bcf JCPV	205	#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
	206	#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
	207	#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
71d7e4c0	208
25ddd1fb	209	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
71d7e4c0	210
25ddd1fb	211	#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
6d0f6bcf	212	#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
71d7e4c0	213
6d0f6bcf JCPV	214	#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
6d0f6bcf JCPV	215	#define CONFIG_SYS_STACK_SIZE (0x10000-32)
71d7e4c0	216
14d0a02a	217	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf JCPV	218	#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
6d0f6bcf JCPV	219	# define CONFIG_SYS_RAMBOOT 1
71d7e4c0 DH	220	#endif
71d7e4c0 DH	221
6d0f6bcf JCPV	222	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
	223	#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
	224	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
71d7e4c0	225
6d0f6bcf JCPV	226	#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
6d0f6bcf JCPV	227	#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
71d7e4c0 DH	228
71d7e4c0 DH	229	/* relocated monitor area */
6d0f6bcf JCPV	230	#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
6d0f6bcf JCPV	231	#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
71d7e4c0 DH	232
71d7e4c0 DH	233	/* make un relocated address from relocated address */
14d0a02a	234	#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
71d7e4c0 DH	235
	236	/*
	237	* Ethernet configuration
	238	*/
	239	#define CONFIG_GRETH 1
71d7e4c0 DH	240
	241	/* Default GRETH Ethernet HARDWARE address */
	242	#define GRETH_HWADDR_0 0x00
	243	#define GRETH_HWADDR_1 0x00
	244	#define GRETH_HWADDR_2 0x7a
	245	#define GRETH_HWADDR_3 0xcc
	246	#define GRETH_HWADDR_4 0x00
	247	#define GRETH_HWADDR_5 0x12
	248
	249	#define CONFIG_ETHADDR 00:00:7a:cc:00:12
	250	#define CONFIG_PHY_ADDR 0x00
	251
	252	/*
	253	* Miscellaneous configurable options
	254	*/
6d0f6bcf JCPV	255	#define CONFIG_SYS_LONGHELP /* undef to save memory */
6d0f6bcf JCPV	256	#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
71d7e4c0	257	#if defined(CONFIG_CMD_KGDB)
6d0f6bcf	258	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
71d7e4c0	259	#else
6d0f6bcf	260	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
71d7e4c0	261	#endif
6d0f6bcf JCPV	262	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	263	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	264	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
71d7e4c0	265
6d0f6bcf JCPV	266	#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
6d0f6bcf JCPV	267	#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
71d7e4c0	268
6d0f6bcf	269	#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
71d7e4c0	270
6d0f6bcf	271	#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
71d7e4c0 DH	272
	273	/*
	274	* Various low-level settings
	275	*/
	276
	277	/*-----------------------------------------------------------------------
	278	* USB stuff
	279	*-----------------------------------------------------------------------
	280	*/
	281	#define CONFIG_USB_CLOCK 0x0001BBBB
	282	#define CONFIG_USB_CONFIG 0x00005000
	283
	284	/*** Gaisler GRLIB IP-Cores Config ******/
	285
	286	/* AMBA Plug & Play info display on startup */
6d0f6bcf	287	/#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP/
71d7e4c0	288
6d0f6bcf	289	#define CONFIG_SYS_GRLIB_SDRAM 0
71d7e4c0 DH	290
	291	/* See, GRLIB Docs (grip.pdf) on how to set up
	292	* These the memory controller registers.
	293	*/
6d0f6bcf JCPV	294	#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff \| (1<<11))
	295	#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
	296	#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
71d7e4c0	297
6d0f6bcf JCPV	298	#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff \| (1<<11))
	299	#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
	300	#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
71d7e4c0 DH	301
71d7e4c0 DH	302	/* no DDR controller */
6d0f6bcf	303	#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
71d7e4c0 DH	304
71d7e4c0 DH	305	/* no DDR2 Controller */
6d0f6bcf JCPV	306	#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
6d0f6bcf JCPV	307	#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
71d7e4c0 DH	308
71d7e4c0 DH	309	/* Calculate scaler register value from default baudrate */
6d0f6bcf	310	#define CONFIG_SYS_GRLIB_APBUART_SCALER \
71d7e4c0 DH	311	((((CONFIG_SYS_CLK_FREQ10)/(CONFIG_BAUDRATE8))-5)/10)
	312
	313	/* Identification string */
	314	#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-XC3S-1500"
	315
	316	/* default kernel command line */
	317	#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
	318
	319	#endif /* __CONFIG_H */