[people/ms/u-boot.git] / include / configs / grsim_leon2.h

/* Configuration header file for LEON2 GRSIM.
 *
 * (C) Copyright 2003-2005
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * (C) Copyright 2007
 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
 *
 * SPDX-License-Identifier:	GPL-2.0+ 
 */

#ifndef __CONFIG_H__
#define __CONFIG_H__

/*
 * High Level Configuration Options
 * (easy to change)
 *
 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
 *
 * TSIM command
 *  tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu
 *
 */

#define CONFIG_LEON2		/* This is an LEON2 CPU */
#define CONFIG_LEON		1	/* This is an LEON CPU */
#define CONFIG_GRSIM		0	/* ... not running on GRSIM */
#define CONFIG_TSIM		1	/* ... running on TSIM */

/* CPU / AMBA BUS configuration */
#define CONFIG_SYS_CLK_FREQ	40000000	/* 40MHz */

/* Number of SPARC register windows */
#define CONFIG_SYS_SPARC_NWINDOWS 8

/*
 * Serial console configuration
 */
#define CONFIG_BAUDRATE		38400	/* ... at 38400 bps */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

/* Partitions */
#define CONFIG_DOS_PARTITION
#define CONFIG_MAC_PARTITION
#define CONFIG_ISO_PARTITION

/*
 * Supported commands
 */
#define CONFIG_CMD_BDI		/* bdinfo			*/
#define CONFIG_CMD_CONSOLE	/* coninfo			*/
#define CONFIG_CMD_DIAG
#define CONFIG_CMD_ECHO		/* echo arguments		*/
#define CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_ITEST	/* Integer (and string) test	*/
#define CONFIG_CMD_LOADB	/* loadb			*/
#define CONFIG_CMD_LOADS	/* loads			*/
#define CONFIG_CMD_MISC		/* Misc functions like sleep etc */
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_RUN		/* run command in env variable	*/
#define CONFIG_CMD_SETGETDCR	/* DCR support on 4xx		*/
#define CONFIG_CMD_SOURCE	/* "source" command support	*/
#define CONFIG_CMD_XIMG		/* Load part of Multi Image	*/

/*
 * Autobooting
 */
#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */

#define CONFIG_PREBOOT	"echo;"	\
	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	"echo"

#undef	CONFIG_BOOTARGS
/*#define CONFIG_SYS_HUSH_PARSER 0*/

#define	CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
		":${hostname}:${netdev}:off panic=1\0"			\
	"flash_nfs=run nfsargs addip;"					\
		"bootm ${kernel_addr}\0"				\
	"flash_self=run ramargs addip;"					\
		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0"	\
	"rootpath=/export/roofs\0"					\
	"scratch=40000000\0"					\
	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
	"ethaddr=00:00:7A:CC:00:12\0" \
	"bootargs=console=ttyS0,38400" \
	""
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_GATEWAYIP 192.168.0.1
#define CONFIG_SERVERIP 192.168.0.81
#define CONFIG_IPADDR 192.168.0.80
#define CONFIG_ROOTPATH "/export/rootfs"
#define CONFIG_HOSTNAME  grxc3s1500
#define CONFIG_BOOTFILE "/uImage"

#define CONFIG_BOOTCOMMAND	"run flash_self"

/* Memory MAP
 *
 *  Flash:
 *  |--------------------------------|
 *  | 0x00000000 Text & Data & BSS   | *
 *  |            for Monitor         | *
 *  | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
 *  | UNUSED / Growth                | * 256kb
 *  |--------------------------------|
 *  | 0x00050000 Base custom area    | *
 *  |            kernel / FS         | *
 *  |                                | * Rest of Flash
 *  |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
 *  | END-0x00008000 Environment     | * 32kb
 *  |--------------------------------|
 *
 *
 *
 *  Main Memory:
 *  |--------------------------------|
 *  | UNUSED / scratch area          |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |                                |
 *  |--------------------------------|
 *  | Monitor .Text / .DATA / .BSS   | * 256kb
 *  | Relocated!                     | *
 *  |--------------------------------|
 *  | Monitor Malloc                 | * 128kb (contains relocated environment)
 *  |--------------------------------|
 *  | Monitor/kernel STACK           | * 64kb
 *  |--------------------------------|
 *  | Page Table for MMU systems     | * 2k
 *  |--------------------------------|
 *  | PROM Code accessed from Linux  | * 6kb-128b
 *  |--------------------------------|
 *  | Global data (avail from kernel)| * 128b
 *  |--------------------------------|
 *
 */

/*
 * Flash configuration (8,16 or 32 MB)
 * TEXT base always at 0xFFF00000
 * ENV_ADDR always at  0xFFF40000
 * FLASH_BASE at 0xFC000000 for 64 MB
 *               0xFE000000 for 32 MB
 *               0xFF000000 for 16 MB
 *               0xFF800000 for  8 MB
 */
#define CONFIG_SYS_NO_FLASH		1
#define CONFIG_SYS_FLASH_BASE		0x00000000
#define CONFIG_SYS_FLASH_SIZE		0x00800000
#define CONFIG_ENV_SIZE		0x8000

#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)

#define PHYS_FLASH_SECT_SIZE	0x00020000	/* 128 KB sectors */
#define CONFIG_SYS_MAX_FLASH_SECT	64	/* max num of sects on one chip */
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks      */

#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)  */
#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)  */
#define CONFIG_SYS_FLASH_LOCK_TOUT	5	/* Timeout for Flash Set Lock Bit (in ms) */
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	10000	/* Timeout for Flash Clear Lock Bits (in ms) */

#ifdef ENABLE_FLASH_SUPPORT
/* For use with grsim FLASH emulation extension */
#define CONFIG_SYS_FLASH_PROTECTION	/* "Real" (hardware) sectors protection */

#undef CONFIG_FLASH_8BIT	/* Flash is 32-bit */

/*** CFI CONFIG ***/
#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_8BIT
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
#endif

/*
 * Environment settings
 */
#define CONFIG_ENV_IS_NOWHERE 1
/*#define CONFIG_ENV_IS_IN_FLASH*/
/*#define CONFIG_ENV_SIZE		0x8000*/
#define CONFIG_ENV_SECT_SIZE	0x40000
#define CONFIG_ENV_OVERWRITE	1

/*
 * Memory map
 */
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_SDRAM_SIZE		0x00800000
#define CONFIG_SYS_SDRAM_END		(CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)

/* no SRAM available */
#undef CONFIG_SYS_SRAM_BASE
#undef CONFIG_SYS_SRAM_SIZE


/* Always Run U-Boot from SDRAM */
#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END

#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_PROM_SIZE		(8192-GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_PROM_OFFSET		(CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_PROM_OFFSET-32)
#define CONFIG_SYS_STACK_SIZE		(0x10000-32)

#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#   define CONFIG_SYS_RAMBOOT		1
#endif

#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor   */
#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()  */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */

#define CONFIG_SYS_MALLOC_END		(CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
#define CONFIG_SYS_MALLOC_BASE		(CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)

/* relocated monitor area */
#define CONFIG_SYS_RELOC_MONITOR_MAX_END   CONFIG_SYS_MALLOC_BASE
#define CONFIG_SYS_RELOC_MONITOR_BASE     (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)

/* make un relocated address from relocated address */
#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))

/*
 * Ethernet configuration
 */
/*#define CONFIG_GRETH	1*/

/* Default HARDWARE address */
#define GRETH_HWADDR_0 0x00
#define GRETH_HWADDR_1 0x00
#define GRETH_HWADDR_2 0x7A
#define GRETH_HWADDR_3 0xcc
#define GRETH_HWADDR_4 0x00
#define GRETH_HWADDR_5 0x12

#define CONFIG_ETHADDR   00:00:7a:cc:00:12

/*
 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
 */
/* #define CONFIG_GRETH_10MBIT 1 */
#define CONFIG_PHY_ADDR		0x00

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP		/* undef to save memory     */
#define CONFIG_SYS_PROMPT		"=> "	/* Monitor Command Prompt   */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
#else
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
#endif
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16	/* max number of command args   */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size    */

#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM  */

#define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address */

#define CONFIG_SYS_HZ			1000	/* decrementer freq: 1 ms ticks */

/***** Gaisler GRLIB IP-Cores Config ********/

#define CONFIG_SYS_GRLIB_SDRAM    0
#define CONFIG_SYS_GRLIB_MEMCFG1  (0x000000ff | (1<<11))
#if CONFIG_GRSIM
#define CONFIG_SYS_GRLIB_MEMCFG2  0x82206000
#else
#define CONFIG_SYS_GRLIB_MEMCFG2  0x00001820
#endif
#define CONFIG_SYS_GRLIB_MEMCFG3  0x00136000

/*** LEON2 UART 1 ***/
#define CONFIG_SYS_LEON2_UART1_SCALER \
	((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)

/* UART1 Define to 1 or 0 */
#define LEON2_UART1_LOOPBACK_ENABLE 0
#define LEON2_UART1_FLOWCTRL_ENABLE 0
#define LEON2_UART1_PARITY_ENABLE 0
#define LEON2_UART1_ODDPAR_ENABLE 0

/*** LEON2 UART 2 ***/

#define CONFIG_SYS_LEON2_UART2_SCALER \
	((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)

/* UART2 Define to 1 or 0 */
#define LEON2_UART2_LOOPBACK_ENABLE 0
#define LEON2_UART2_FLOWCTRL_ENABLE 0
#define LEON2_UART2_PARITY_ENABLE 0
#define LEON2_UART2_ODDPAR_ENABLE 0

#define LEON_CONSOLE_UART1 1
#define LEON_CONSOLE_UART2 2

/* Use UART2 as console */
#define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1

/* LEON2 I/O Port */
/*#define LEON2_IO_PORT_DIR 0x0000aa00*/

/* default kernel command line */
#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"

#define CONFIG_IDENT_STRING "Gaisler GRSIM LEON2"

#endif				/* __CONFIG_H */
Commit	Line	Data
ab68f921 DH	1	/* Configuration header file for LEON2 GRSIM.
	2	*
	3	* (C) Copyright 2003-2005
	4	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	5	*
	6	* (C) Copyright 2007
	7	* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
	8	*
1a459660	9	* SPDX-License-Identifier: GPL-2.0+
ab68f921 DH	10	*/
	11
	12	#ifndef __CONFIG_H__
	13	#define __CONFIG_H__
	14
	15	/*
	16	* High Level Configuration Options
	17	* (easy to change)
	18	*
	19	* Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
	20	*
	21	* TSIM command
	22	* tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu
	23	*
	24	*/
	25
	26	#define CONFIG_LEON2 /* This is an LEON2 CPU */
	27	#define CONFIG_LEON 1 /* This is an LEON CPU */
	28	#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
	29	#define CONFIG_TSIM 1 /* ... running on TSIM */
	30
	31	/* CPU / AMBA BUS configuration */
53677ef1	32	#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
ab68f921 DH	33
ab68f921 DH	34	/* Number of SPARC register windows */
6d0f6bcf	35	#define CONFIG_SYS_SPARC_NWINDOWS 8
ab68f921 DH	36
	37	/*
	38	* Serial console configuration
	39	*/
	40	#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
6d0f6bcf	41	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
ab68f921 DH	42
	43	/* Partitions */
	44	#define CONFIG_DOS_PARTITION
	45	#define CONFIG_MAC_PARTITION
	46	#define CONFIG_ISO_PARTITION
	47
	48	/*
	49	* Supported commands
	50	*/
74de7aef WD	51	#define CONFIG_CMD_BDI /* bdinfo */
74de7aef WD	52	#define CONFIG_CMD_CONSOLE /* coninfo */
ab68f921	53	#define CONFIG_CMD_DIAG
74de7aef WD	54	#define CONFIG_CMD_ECHO /* echo arguments */
74de7aef WD	55	#define CONFIG_CMD_FPGA /* FPGA configuration Support */
ab68f921	56	#define CONFIG_CMD_IRQ
74de7aef WD	57	#define CONFIG_CMD_ITEST /* Integer (and string) test */
	58	#define CONFIG_CMD_LOADB /* loadb */
	59	#define CONFIG_CMD_LOADS /* loads */
ab68f921 DH	60	#define CONFIG_CMD_MISC /* Misc functions like sleep etc */
ab68f921 DH	61	#define CONFIG_CMD_REGINFO
74de7aef WD	62	#define CONFIG_CMD_RUN /* run command in env variable */
	63	#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
	64	#define CONFIG_CMD_SOURCE /* "source" command support */
	65	#define CONFIG_CMD_XIMG /* Load part of Multi Image */
ab68f921 DH	66
	67	/*
	68	* Autobooting
	69	*/
	70	#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
	71
	72	#define CONFIG_PREBOOT "echo;" \
	73	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
	74	"echo"
	75
	76	#undef CONFIG_BOOTARGS
6d0f6bcf	77	/#define CONFIG_SYS_HUSH_PARSER 0/
ab68f921 DH	78
	79	#define CONFIG_EXTRA_ENV_SETTINGS \
	80	"netdev=eth0\0" \
	81	"nfsargs=setenv bootargs root=/dev/nfs rw " \
	82	"nfsroot=${serverip}:${rootpath}\0" \
	83	"ramargs=setenv bootargs root=/dev/ram rw\0" \
	84	"addip=setenv bootargs ${bootargs} " \
	85	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
	86	":${hostname}:${netdev}:off panic=1\0" \
	87	"flash_nfs=run nfsargs addip;" \
	88	"bootm ${kernel_addr}\0" \
	89	"flash_self=run ramargs addip;" \
	90	"bootm ${kernel_addr} ${ramdisk_addr}\0" \
	91	"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
	92	"rootpath=/export/roofs\0" \
	93	"scratch=40000000\0" \
3a2b9f28	94	"getkernel=tftpboot $(scratch) $(bootfile)\0" \
ab68f921 DH	95	"ethaddr=00:00:7A:CC:00:12\0" \
	96	"bootargs=console=ttyS0,38400" \
	97	""
	98	#define CONFIG_NETMASK 255.255.255.0
	99	#define CONFIG_GATEWAYIP 192.168.0.1
	100	#define CONFIG_SERVERIP 192.168.0.81
	101	#define CONFIG_IPADDR 192.168.0.80
8b3637c6	102	#define CONFIG_ROOTPATH "/export/rootfs"
ab68f921	103	#define CONFIG_HOSTNAME grxc3s1500
b3f44c21	104	#define CONFIG_BOOTFILE "/uImage"
ab68f921 DH	105
	106	#define CONFIG_BOOTCOMMAND "run flash_self"
	107
	108	/* Memory MAP
	109	*
	110	* Flash:
	111	* \|--------------------------------\|
	112	* \| 0x00000000 Text & Data & BSS \| *
	113	* \| for Monitor \| *
	114	* \| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\| *
	115	* \| UNUSED / Growth \| * 256kb
	116	* \|--------------------------------\|
	117	* \| 0x00050000 Base custom area \| *
	118	* \| kernel / FS \| *
	119	* \| \| * Rest of Flash
	120	* \|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\|
	121	* \| END-0x00008000 Environment \| * 32kb
	122	* \|--------------------------------\|
	123	*
	124	*
	125	*
	126	* Main Memory:
	127	* \|--------------------------------\|
	128	* \| UNUSED / scratch area \|
	129	* \| \|
	130	* \| \|
	131	* \| \|
	132	* \| \|
	133	* \|--------------------------------\|
	134	* \| Monitor .Text / .DATA / .BSS \| * 256kb
	135	* \| Relocated! \| *
	136	* \|--------------------------------\|
	137	* \| Monitor Malloc \| * 128kb (contains relocated environment)
	138	* \|--------------------------------\|
	139	* \| Monitor/kernel STACK \| * 64kb
	140	* \|--------------------------------\|
	141	* \| Page Table for MMU systems \| * 2k
	142	* \|--------------------------------\|
	143	* \| PROM Code accessed from Linux \| * 6kb-128b
	144	* \|--------------------------------\|
	145	* \| Global data (avail from kernel)\| * 128b
	146	* \|--------------------------------\|
	147	*
	148	*/
	149
	150	/*
	151	* Flash configuration (8,16 or 32 MB)
	152	* TEXT base always at 0xFFF00000
	153	* ENV_ADDR always at 0xFFF40000
	154	* FLASH_BASE at 0xFC000000 for 64 MB
	155	* 0xFE000000 for 32 MB
	156	* 0xFF000000 for 16 MB
	157	* 0xFF800000 for 8 MB
	158	*/
6d0f6bcf JCPV	159	#define CONFIG_SYS_NO_FLASH 1
	160	#define CONFIG_SYS_FLASH_BASE 0x00000000
	161	#define CONFIG_SYS_FLASH_SIZE 0x00800000
0e8d1586	162	#define CONFIG_ENV_SIZE 0x8000
ab68f921	163
6d0f6bcf	164	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
ab68f921 DH	165
ab68f921 DH	166	#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
6d0f6bcf JCPV	167	#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
6d0f6bcf JCPV	168	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
ab68f921	169
6d0f6bcf JCPV	170	#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
	171	#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
	172	#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
	173	#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
ab68f921 DH	174
	175	#ifdef ENABLE_FLASH_SUPPORT
	176	/* For use with grsim FLASH emulation extension */
6d0f6bcf	177	#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
ab68f921 DH	178
	179	#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
	180
	181	/* CFI CONFIG */
6d0f6bcf	182	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
00b1883a	183	#define CONFIG_FLASH_CFI_DRIVER
6d0f6bcf	184	#define CONFIG_SYS_FLASH_CFI
ab68f921 DH	185	#endif
	186
	187	/*
	188	* Environment settings
	189	*/
93f6d725	190	#define CONFIG_ENV_IS_NOWHERE 1
5a1aceb0	191	/#define CONFIG_ENV_IS_IN_FLASH/
0e8d1586 JCPV	192	/#define CONFIG_ENV_SIZE 0x8000/
0e8d1586 JCPV	193	#define CONFIG_ENV_SECT_SIZE 0x40000
ab68f921 DH	194	#define CONFIG_ENV_OVERWRITE 1
	195
	196	/*
	197	* Memory map
	198	*/
6d0f6bcf JCPV	199	#define CONFIG_SYS_SDRAM_BASE 0x40000000
	200	#define CONFIG_SYS_SDRAM_SIZE 0x00800000
	201	#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
ab68f921 DH	202
ab68f921 DH	203	/* no SRAM available */
6d0f6bcf JCPV	204	#undef CONFIG_SYS_SRAM_BASE
6d0f6bcf JCPV	205	#undef CONFIG_SYS_SRAM_SIZE
ab68f921 DH	206
	207
	208	/* Always Run U-Boot from SDRAM */
6d0f6bcf JCPV	209	#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
	210	#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
	211	#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
ab68f921	212
25ddd1fb	213	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
ab68f921	214
25ddd1fb	215	#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
6d0f6bcf	216	#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
ab68f921	217
6d0f6bcf JCPV	218	#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
6d0f6bcf JCPV	219	#define CONFIG_SYS_STACK_SIZE (0x10000-32)
ab68f921	220
14d0a02a	221	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf JCPV	222	#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
6d0f6bcf JCPV	223	# define CONFIG_SYS_RAMBOOT 1
ab68f921 DH	224	#endif
ab68f921 DH	225
6d0f6bcf JCPV	226	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
	227	#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
	228	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
ab68f921	229
6d0f6bcf JCPV	230	#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
6d0f6bcf JCPV	231	#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
ab68f921 DH	232
ab68f921 DH	233	/* relocated monitor area */
6d0f6bcf JCPV	234	#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
6d0f6bcf JCPV	235	#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
ab68f921 DH	236
ab68f921 DH	237	/* make un relocated address from relocated address */
14d0a02a	238	#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
ab68f921 DH	239
	240	/*
	241	* Ethernet configuration
	242	*/
	243	/#define CONFIG_GRETH 1/
ab68f921 DH	244
	245	/* Default HARDWARE address */
	246	#define GRETH_HWADDR_0 0x00
	247	#define GRETH_HWADDR_1 0x00
	248	#define GRETH_HWADDR_2 0x7A
	249	#define GRETH_HWADDR_3 0xcc
	250	#define GRETH_HWADDR_4 0x00
	251	#define GRETH_HWADDR_5 0x12
	252
	253	#define CONFIG_ETHADDR 00:00:7a:cc:00:12
	254
	255	/*
	256	* Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
	257	*/
	258	/* #define CONFIG_GRETH_10MBIT 1 */
	259	#define CONFIG_PHY_ADDR 0x00
	260
	261	/*
	262	* Miscellaneous configurable options
	263	*/
6d0f6bcf JCPV	264	#define CONFIG_SYS_LONGHELP /* undef to save memory */
6d0f6bcf JCPV	265	#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
ab68f921	266	#if defined(CONFIG_CMD_KGDB)
6d0f6bcf	267	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
ab68f921	268	#else
6d0f6bcf	269	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
ab68f921	270	#endif
6d0f6bcf JCPV	271	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	272	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	273	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
ab68f921	274
6d0f6bcf JCPV	275	#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
6d0f6bcf JCPV	276	#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
ab68f921	277
6d0f6bcf	278	#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
ab68f921	279
6d0f6bcf	280	#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
ab68f921 DH	281
	282	/*** Gaisler GRLIB IP-Cores Config ******/
	283
6d0f6bcf JCPV	284	#define CONFIG_SYS_GRLIB_SDRAM 0
6d0f6bcf JCPV	285	#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff \| (1<<11))
ab68f921	286	#if CONFIG_GRSIM
6d0f6bcf	287	#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
ab68f921	288	#else
6d0f6bcf	289	#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
ab68f921	290	#endif
6d0f6bcf	291	#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
ab68f921 DH	292
ab68f921 DH	293	/* LEON2 UART 1 */
6d0f6bcf	294	#define CONFIG_SYS_LEON2_UART1_SCALER \
1aeed8d7 WD	295	((((CONFIG_SYS_CLK_FREQ10)/(CONFIG_BAUDRATE8))-5)/10)
1aeed8d7 WD	296
ab68f921 DH	297	/* UART1 Define to 1 or 0 */
	298	#define LEON2_UART1_LOOPBACK_ENABLE 0
	299	#define LEON2_UART1_FLOWCTRL_ENABLE 0
	300	#define LEON2_UART1_PARITY_ENABLE 0
	301	#define LEON2_UART1_ODDPAR_ENABLE 0
	302
	303	/* LEON2 UART 2 */
	304
6d0f6bcf	305	#define CONFIG_SYS_LEON2_UART2_SCALER \
1aeed8d7	306	((((CONFIG_SYS_CLK_FREQ10)/(CONFIG_BAUDRATE8))-5)/10)
ab68f921 DH	307
	308	/* UART2 Define to 1 or 0 */
	309	#define LEON2_UART2_LOOPBACK_ENABLE 0
	310	#define LEON2_UART2_FLOWCTRL_ENABLE 0
	311	#define LEON2_UART2_PARITY_ENABLE 0
	312	#define LEON2_UART2_ODDPAR_ENABLE 0
	313
	314	#define LEON_CONSOLE_UART1 1
	315	#define LEON_CONSOLE_UART2 2
	316
	317	/* Use UART2 as console */
	318	#define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1
	319
	320	/* LEON2 I/O Port */
	321	/#define LEON2_IO_PORT_DIR 0x0000aa00/
	322
	323	/* default kernel command line */
	324	#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
	325
	326	#define CONFIG_IDENT_STRING "Gaisler GRSIM LEON2"
	327
	328	#endif /* __CONFIG_H */