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ab68f921 DH |
1 | /* Configuration header file for LEON2 GRSIM. |
2 | * | |
3 | * (C) Copyright 2003-2005 | |
4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
5 | * | |
6 | * (C) Copyright 2007 | |
7 | * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com. | |
8 | * | |
3765b3e7 | 9 | * SPDX-License-Identifier: GPL-2.0+ |
ab68f921 DH |
10 | */ |
11 | ||
12 | #ifndef __CONFIG_H__ | |
13 | #define __CONFIG_H__ | |
14 | ||
15 | /* | |
16 | * High Level Configuration Options | |
17 | * (easy to change) | |
18 | * | |
19 | * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1. | |
20 | * | |
21 | * TSIM command | |
22 | * tsim-leon -sdram 0 -ram 32000 -rom 8192 -mmu | |
23 | * | |
24 | */ | |
25 | ||
ab68f921 DH |
26 | #define CONFIG_GRSIM 0 /* ... not running on GRSIM */ |
27 | #define CONFIG_TSIM 1 /* ... running on TSIM */ | |
28 | ||
29 | /* CPU / AMBA BUS configuration */ | |
53677ef1 | 30 | #define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */ |
ab68f921 DH |
31 | |
32 | /* Number of SPARC register windows */ | |
6d0f6bcf | 33 | #define CONFIG_SYS_SPARC_NWINDOWS 8 |
ab68f921 DH |
34 | |
35 | /* | |
36 | * Serial console configuration | |
37 | */ | |
38 | #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */ | |
6d0f6bcf | 39 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } |
ab68f921 DH |
40 | |
41 | /* Partitions */ | |
42 | #define CONFIG_DOS_PARTITION | |
43 | #define CONFIG_MAC_PARTITION | |
44 | #define CONFIG_ISO_PARTITION | |
45 | ||
46 | /* | |
47 | * Supported commands | |
48 | */ | |
74de7aef WD |
49 | #define CONFIG_CMD_BDI /* bdinfo */ |
50 | #define CONFIG_CMD_CONSOLE /* coninfo */ | |
ab68f921 | 51 | #define CONFIG_CMD_DIAG |
74de7aef WD |
52 | #define CONFIG_CMD_ECHO /* echo arguments */ |
53 | #define CONFIG_CMD_FPGA /* FPGA configuration Support */ | |
64e809af | 54 | #define CONFIG_CMD_FPGA_LOADMK |
ab68f921 | 55 | #define CONFIG_CMD_IRQ |
74de7aef WD |
56 | #define CONFIG_CMD_ITEST /* Integer (and string) test */ |
57 | #define CONFIG_CMD_LOADB /* loadb */ | |
58 | #define CONFIG_CMD_LOADS /* loads */ | |
ab68f921 DH |
59 | #define CONFIG_CMD_MISC /* Misc functions like sleep etc */ |
60 | #define CONFIG_CMD_REGINFO | |
74de7aef WD |
61 | #define CONFIG_CMD_RUN /* run command in env variable */ |
62 | #define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ | |
63 | #define CONFIG_CMD_SOURCE /* "source" command support */ | |
64 | #define CONFIG_CMD_XIMG /* Load part of Multi Image */ | |
ab68f921 DH |
65 | |
66 | /* | |
67 | * Autobooting | |
68 | */ | |
69 | #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ | |
70 | ||
71 | #define CONFIG_PREBOOT "echo;" \ | |
72 | "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ | |
73 | "echo" | |
74 | ||
75 | #undef CONFIG_BOOTARGS | |
6d0f6bcf | 76 | /*#define CONFIG_SYS_HUSH_PARSER 0*/ |
ab68f921 DH |
77 | |
78 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
79 | "netdev=eth0\0" \ | |
80 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ | |
81 | "nfsroot=${serverip}:${rootpath}\0" \ | |
82 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ | |
83 | "addip=setenv bootargs ${bootargs} " \ | |
84 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ | |
85 | ":${hostname}:${netdev}:off panic=1\0" \ | |
86 | "flash_nfs=run nfsargs addip;" \ | |
87 | "bootm ${kernel_addr}\0" \ | |
88 | "flash_self=run ramargs addip;" \ | |
89 | "bootm ${kernel_addr} ${ramdisk_addr}\0" \ | |
90 | "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \ | |
91 | "rootpath=/export/roofs\0" \ | |
92 | "scratch=40000000\0" \ | |
3a2b9f28 | 93 | "getkernel=tftpboot $(scratch) $(bootfile)\0" \ |
ab68f921 DH |
94 | "bootargs=console=ttyS0,38400" \ |
95 | "" | |
96 | #define CONFIG_NETMASK 255.255.255.0 | |
97 | #define CONFIG_GATEWAYIP 192.168.0.1 | |
98 | #define CONFIG_SERVERIP 192.168.0.81 | |
99 | #define CONFIG_IPADDR 192.168.0.80 | |
8b3637c6 | 100 | #define CONFIG_ROOTPATH "/export/rootfs" |
ab68f921 | 101 | #define CONFIG_HOSTNAME grxc3s1500 |
b3f44c21 | 102 | #define CONFIG_BOOTFILE "/uImage" |
ab68f921 DH |
103 | |
104 | #define CONFIG_BOOTCOMMAND "run flash_self" | |
105 | ||
106 | /* Memory MAP | |
107 | * | |
108 | * Flash: | |
109 | * |--------------------------------| | |
110 | * | 0x00000000 Text & Data & BSS | * | |
111 | * | for Monitor | * | |
112 | * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| * | |
113 | * | UNUSED / Growth | * 256kb | |
114 | * |--------------------------------| | |
115 | * | 0x00050000 Base custom area | * | |
116 | * | kernel / FS | * | |
117 | * | | * Rest of Flash | |
118 | * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| | |
119 | * | END-0x00008000 Environment | * 32kb | |
120 | * |--------------------------------| | |
121 | * | |
122 | * | |
123 | * | |
124 | * Main Memory: | |
125 | * |--------------------------------| | |
126 | * | UNUSED / scratch area | | |
127 | * | | | |
128 | * | | | |
129 | * | | | |
130 | * | | | |
131 | * |--------------------------------| | |
132 | * | Monitor .Text / .DATA / .BSS | * 256kb | |
133 | * | Relocated! | * | |
134 | * |--------------------------------| | |
135 | * | Monitor Malloc | * 128kb (contains relocated environment) | |
136 | * |--------------------------------| | |
137 | * | Monitor/kernel STACK | * 64kb | |
138 | * |--------------------------------| | |
139 | * | Page Table for MMU systems | * 2k | |
140 | * |--------------------------------| | |
141 | * | PROM Code accessed from Linux | * 6kb-128b | |
142 | * |--------------------------------| | |
143 | * | Global data (avail from kernel)| * 128b | |
144 | * |--------------------------------| | |
145 | * | |
146 | */ | |
147 | ||
148 | /* | |
149 | * Flash configuration (8,16 or 32 MB) | |
150 | * TEXT base always at 0xFFF00000 | |
151 | * ENV_ADDR always at 0xFFF40000 | |
152 | * FLASH_BASE at 0xFC000000 for 64 MB | |
153 | * 0xFE000000 for 32 MB | |
154 | * 0xFF000000 for 16 MB | |
155 | * 0xFF800000 for 8 MB | |
156 | */ | |
6d0f6bcf JCPV |
157 | #define CONFIG_SYS_NO_FLASH 1 |
158 | #define CONFIG_SYS_FLASH_BASE 0x00000000 | |
159 | #define CONFIG_SYS_FLASH_SIZE 0x00800000 | |
0e8d1586 | 160 | #define CONFIG_ENV_SIZE 0x8000 |
ab68f921 | 161 | |
6d0f6bcf | 162 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE) |
ab68f921 DH |
163 | |
164 | #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */ | |
6d0f6bcf JCPV |
165 | #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */ |
166 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */ | |
ab68f921 | 167 | |
6d0f6bcf JCPV |
168 | #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ |
169 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ | |
170 | #define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */ | |
171 | #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */ | |
ab68f921 DH |
172 | |
173 | #ifdef ENABLE_FLASH_SUPPORT | |
174 | /* For use with grsim FLASH emulation extension */ | |
6d0f6bcf | 175 | #define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ |
ab68f921 DH |
176 | |
177 | #undef CONFIG_FLASH_8BIT /* Flash is 32-bit */ | |
178 | ||
179 | /*** CFI CONFIG ***/ | |
6d0f6bcf | 180 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT |
00b1883a | 181 | #define CONFIG_FLASH_CFI_DRIVER |
6d0f6bcf | 182 | #define CONFIG_SYS_FLASH_CFI |
ab68f921 DH |
183 | #endif |
184 | ||
185 | /* | |
186 | * Environment settings | |
187 | */ | |
93f6d725 | 188 | #define CONFIG_ENV_IS_NOWHERE 1 |
5a1aceb0 | 189 | /*#define CONFIG_ENV_IS_IN_FLASH*/ |
0e8d1586 JCPV |
190 | /*#define CONFIG_ENV_SIZE 0x8000*/ |
191 | #define CONFIG_ENV_SECT_SIZE 0x40000 | |
ab68f921 DH |
192 | #define CONFIG_ENV_OVERWRITE 1 |
193 | ||
194 | /* | |
195 | * Memory map | |
196 | */ | |
6d0f6bcf JCPV |
197 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
198 | #define CONFIG_SYS_SDRAM_SIZE 0x00800000 | |
199 | #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE) | |
ab68f921 DH |
200 | |
201 | /* no SRAM available */ | |
6d0f6bcf JCPV |
202 | #undef CONFIG_SYS_SRAM_BASE |
203 | #undef CONFIG_SYS_SRAM_SIZE | |
ab68f921 DH |
204 | |
205 | ||
206 | /* Always Run U-Boot from SDRAM */ | |
6d0f6bcf JCPV |
207 | #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE |
208 | #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE | |
209 | #define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END | |
ab68f921 | 210 | |
25ddd1fb | 211 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE) |
ab68f921 | 212 | |
25ddd1fb | 213 | #define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE) |
6d0f6bcf | 214 | #define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE) |
ab68f921 | 215 | |
6d0f6bcf JCPV |
216 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32) |
217 | #define CONFIG_SYS_STACK_SIZE (0x10000-32) | |
ab68f921 | 218 | |
14d0a02a | 219 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
6d0f6bcf JCPV |
220 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) |
221 | # define CONFIG_SYS_RAMBOOT 1 | |
ab68f921 DH |
222 | #endif |
223 | ||
6d0f6bcf JCPV |
224 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
225 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ | |
226 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ | |
ab68f921 | 227 | |
6d0f6bcf JCPV |
228 | #define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE) |
229 | #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN) | |
ab68f921 DH |
230 | |
231 | /* relocated monitor area */ | |
6d0f6bcf JCPV |
232 | #define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE |
233 | #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN) | |
ab68f921 DH |
234 | |
235 | /* make un relocated address from relocated address */ | |
14d0a02a | 236 | #define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE)) |
ab68f921 DH |
237 | |
238 | /* | |
239 | * Ethernet configuration | |
240 | */ | |
241 | /*#define CONFIG_GRETH 1*/ | |
ab68f921 | 242 | |
ab68f921 DH |
243 | /* |
244 | * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s | |
245 | */ | |
246 | /* #define CONFIG_GRETH_10MBIT 1 */ | |
247 | #define CONFIG_PHY_ADDR 0x00 | |
248 | ||
249 | /* | |
250 | * Miscellaneous configurable options | |
251 | */ | |
6d0f6bcf | 252 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
ab68f921 | 253 | #if defined(CONFIG_CMD_KGDB) |
6d0f6bcf | 254 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
ab68f921 | 255 | #else |
6d0f6bcf | 256 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
ab68f921 | 257 | #endif |
6d0f6bcf JCPV |
258 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
259 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
260 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
ab68f921 | 261 | |
6d0f6bcf JCPV |
262 | #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ |
263 | #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ | |
ab68f921 | 264 | |
6d0f6bcf | 265 | #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ |
ab68f921 | 266 | |
ab68f921 DH |
267 | /***** Gaisler GRLIB IP-Cores Config ********/ |
268 | ||
6d0f6bcf JCPV |
269 | #define CONFIG_SYS_GRLIB_SDRAM 0 |
270 | #define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11)) | |
ab68f921 | 271 | #if CONFIG_GRSIM |
6d0f6bcf | 272 | #define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000 |
ab68f921 | 273 | #else |
6d0f6bcf | 274 | #define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820 |
ab68f921 | 275 | #endif |
6d0f6bcf | 276 | #define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000 |
ab68f921 DH |
277 | |
278 | /*** LEON2 UART 1 ***/ | |
6d0f6bcf | 279 | #define CONFIG_SYS_LEON2_UART1_SCALER \ |
1aeed8d7 WD |
280 | ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) |
281 | ||
ab68f921 DH |
282 | /* UART1 Define to 1 or 0 */ |
283 | #define LEON2_UART1_LOOPBACK_ENABLE 0 | |
284 | #define LEON2_UART1_FLOWCTRL_ENABLE 0 | |
285 | #define LEON2_UART1_PARITY_ENABLE 0 | |
286 | #define LEON2_UART1_ODDPAR_ENABLE 0 | |
287 | ||
288 | /*** LEON2 UART 2 ***/ | |
289 | ||
6d0f6bcf | 290 | #define CONFIG_SYS_LEON2_UART2_SCALER \ |
1aeed8d7 | 291 | ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10) |
ab68f921 DH |
292 | |
293 | /* UART2 Define to 1 or 0 */ | |
294 | #define LEON2_UART2_LOOPBACK_ENABLE 0 | |
295 | #define LEON2_UART2_FLOWCTRL_ENABLE 0 | |
296 | #define LEON2_UART2_PARITY_ENABLE 0 | |
297 | #define LEON2_UART2_ODDPAR_ENABLE 0 | |
298 | ||
299 | #define LEON_CONSOLE_UART1 1 | |
300 | #define LEON_CONSOLE_UART2 2 | |
301 | ||
302 | /* Use UART2 as console */ | |
303 | #define LEON2_CONSOLE_SELECT LEON_CONSOLE_UART1 | |
304 | ||
305 | /* LEON2 I/O Port */ | |
306 | /*#define LEON2_IO_PORT_DIR 0x0000aa00*/ | |
307 | ||
308 | /* default kernel command line */ | |
309 | #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" | |
310 | ||
311 | #define CONFIG_IDENT_STRING "Gaisler GRSIM LEON2" | |
312 | ||
313 | #endif /* __CONFIG_H */ |