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59189a8b TH |
1 | /* |
2 | * Copyright (C) 2013 Gateworks Corporation | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #ifndef __CONFIG_H | |
8 | #define __CONFIG_H | |
9 | ||
0cc11dea | 10 | /* SPL */ |
06c3564d | 11 | #define CONFIG_SPL_BOARD_INIT |
0cc11dea TH |
12 | #define CONFIG_SPL_NAND_SUPPORT |
13 | #define CONFIG_SPL_MMC_SUPPORT | |
e06a0362 | 14 | #define CONFIG_SPL_POWER_SUPPORT |
0cc11dea | 15 | /* Location in NAND to read U-Boot from */ |
55ff55e9 | 16 | #define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M) |
0cc11dea | 17 | |
53940a50 TH |
18 | /* Falcon Mode */ |
19 | #define CONFIG_CMD_SPL | |
20 | #define CONFIG_SPL_OS_BOOT | |
21 | #define CONFIG_SPL_ENV_SUPPORT | |
22 | #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 | |
23 | #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) | |
24 | ||
25 | /* Falcon Mode - NAND support: args@17MB kernel@18MB */ | |
26 | #define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M) | |
27 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M) | |
28 | ||
29 | /* Falcon Mode - MMC support: args@1MB kernel@2MB */ | |
30 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ | |
31 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) | |
32 | #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ | |
33 | ||
0cc11dea | 34 | #include "imx6_spl.h" /* common IMX6 SPL configuration */ |
59189a8b | 35 | #include "mx6_common.h" |
59189a8b TH |
36 | |
37 | #define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */ | |
38 | ||
ea690917 | 39 | /* Serial ATAG */ |
59189a8b | 40 | #define CONFIG_SERIAL_TAG |
59189a8b TH |
41 | |
42 | /* Size of malloc() pool */ | |
55ff55e9 | 43 | #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) |
59189a8b TH |
44 | |
45 | /* Init Functions */ | |
46 | #define CONFIG_BOARD_EARLY_INIT_F | |
47 | #define CONFIG_MISC_INIT_R | |
48 | ||
e1b4770c TH |
49 | /* Driver Model */ |
50 | #ifndef CONFIG_SPL_BUILD | |
e1b4770c | 51 | #define CONFIG_DM_GPIO |
50de5088 | 52 | #define CONFIG_DM_THERMAL |
e1b4770c TH |
53 | #endif |
54 | ||
59189a8b TH |
55 | /* GPIO */ |
56 | #define CONFIG_MXC_GPIO | |
32a6eaea | 57 | #define CONFIG_CMD_GPIO |
59189a8b | 58 | |
50de5088 TH |
59 | /* Thermal */ |
60 | #define CONFIG_IMX6_THERMAL | |
61 | ||
59189a8b TH |
62 | /* Serial */ |
63 | #define CONFIG_MXC_UART | |
64 | #define CONFIG_MXC_UART_BASE UART2_BASE | |
65 | ||
66 | #ifdef CONFIG_SPI_FLASH | |
67 | ||
68 | /* SPI */ | |
69 | #define CONFIG_CMD_SF | |
70 | #ifdef CONFIG_CMD_SF | |
71 | #define CONFIG_MXC_SPI | |
72 | #define CONFIG_SPI_FLASH_MTD | |
73 | #define CONFIG_SPI_FLASH_BAR | |
74 | #define CONFIG_SPI_FLASH_WINBOND | |
75 | #define CONFIG_SF_DEFAULT_BUS 0 | |
155fa9af | 76 | #define CONFIG_SF_DEFAULT_CS 0 |
59189a8b TH |
77 | /* GPIO 3-19 (21248) */ |
78 | #define CONFIG_SF_DEFAULT_SPEED 30000000 | |
79 | #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) | |
80 | #endif | |
81 | ||
82 | #else | |
83 | /* Enable NAND support */ | |
84 | #define CONFIG_CMD_TIME | |
85 | #define CONFIG_CMD_NAND | |
86 | #define CONFIG_CMD_NAND_TRIMFFS | |
87 | #ifdef CONFIG_CMD_NAND | |
88 | #define CONFIG_NAND_MXS | |
89 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
90 | #define CONFIG_SYS_NAND_BASE 0x40000000 | |
91 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
92 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
93 | ||
94 | /* DMA stuff, needed for GPMI/MXS NAND support */ | |
95 | #define CONFIG_APBH_DMA | |
96 | #define CONFIG_APBH_DMA_BURST | |
97 | #define CONFIG_APBH_DMA_BURST8 | |
98 | #endif | |
99 | ||
100 | #endif /* CONFIG_SPI_FLASH */ | |
101 | ||
102 | /* Flattened Image Tree Suport */ | |
103 | #define CONFIG_FIT | |
104 | #define CONFIG_FIT_VERBOSE | |
105 | ||
106 | /* I2C Configs */ | |
107 | #define CONFIG_CMD_I2C | |
108 | #define CONFIG_SYS_I2C | |
109 | #define CONFIG_SYS_I2C_MXC | |
f8cb101e | 110 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
9c0fe83e TH |
111 | #define CONFIG_SYS_I2C_SPEED 100000 |
112 | #define CONFIG_I2C_GSC 0 | |
113 | #define CONFIG_I2C_PMIC 1 | |
f6747cda | 114 | #define CONFIG_I2C_EDID |
59189a8b TH |
115 | |
116 | /* MMC Configs */ | |
59189a8b TH |
117 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
118 | #define CONFIG_SYS_FSL_USDHC_NUM 1 | |
59189a8b TH |
119 | |
120 | /* Filesystem support */ | |
59189a8b | 121 | #define CONFIG_CMD_UBIFS |
59189a8b | 122 | |
59189a8b TH |
123 | /* |
124 | * SATA Configs | |
125 | */ | |
126 | #define CONFIG_CMD_SATA | |
127 | #ifdef CONFIG_CMD_SATA | |
128 | #define CONFIG_DWC_AHSATA | |
129 | #define CONFIG_SYS_SATA_MAX_DEVICE 1 | |
130 | #define CONFIG_DWC_AHSATA_PORT_ID 0 | |
131 | #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR | |
132 | #define CONFIG_LBA48 | |
133 | #define CONFIG_LIBATA | |
134 | #endif | |
135 | ||
136 | /* | |
137 | * PCI express | |
138 | */ | |
139 | #define CONFIG_CMD_PCI | |
140 | #ifdef CONFIG_CMD_PCI | |
141 | #define CONFIG_PCI | |
142 | #define CONFIG_PCI_PNP | |
143 | #define CONFIG_PCI_SCAN_SHOW | |
dad08286 | 144 | #define CONFIG_PCI_FIXUP_DEV |
59189a8b TH |
145 | #define CONFIG_PCIE_IMX |
146 | #endif | |
147 | ||
148 | /* | |
149 | * PMIC | |
150 | */ | |
151 | #define CONFIG_POWER | |
152 | #define CONFIG_POWER_I2C | |
153 | #define CONFIG_POWER_PFUZE100 | |
154 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 | |
234d89da TH |
155 | #define CONFIG_POWER_LTC3676 |
156 | #define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c | |
59189a8b TH |
157 | |
158 | /* Various command support */ | |
59189a8b TH |
159 | #define CONFIG_CMD_PING |
160 | #define CONFIG_CMD_DHCP | |
161 | #define CONFIG_CMD_MII | |
59189a8b TH |
162 | #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */ |
163 | #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */ | |
59189a8b | 164 | #define CONFIG_CMD_GSC |
9c0fe83e | 165 | #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ |
59189a8b TH |
166 | #define CONFIG_CMD_UBI |
167 | #define CONFIG_RBTREE | |
59189a8b TH |
168 | |
169 | /* Ethernet support */ | |
170 | #define CONFIG_FEC_MXC | |
171 | #define CONFIG_MII | |
172 | #define IMX_FEC_BASE ENET_BASE_ADDR | |
173 | #define CONFIG_FEC_XCV_TYPE RGMII | |
59189a8b TH |
174 | #define CONFIG_FEC_MXC_PHYADDR 0 |
175 | #define CONFIG_PHYLIB | |
176 | #define CONFIG_ARP_TIMEOUT 200UL | |
177 | ||
178 | /* USB Configs */ | |
179 | #define CONFIG_CMD_USB | |
180 | #define CONFIG_USB_EHCI | |
181 | #define CONFIG_USB_EHCI_MX6 | |
182 | #define CONFIG_USB_STORAGE | |
183 | #define CONFIG_USB_HOST_ETHER | |
184 | #define CONFIG_USB_ETHER_ASIX | |
185 | #define CONFIG_USB_ETHER_SMSC95XX | |
186 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
187 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ | |
188 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
189 | #define CONFIG_MXC_USB_FLAGS 0 | |
190 | #define CONFIG_USB_KEYBOARD | |
191 | #define CONFIG_CI_UDC | |
192 | #define CONFIG_USBD_HS | |
193 | #define CONFIG_USB_GADGET_DUALSPEED | |
194 | #define CONFIG_USB_ETHER | |
195 | #define CONFIG_USB_ETH_CDC | |
196 | #define CONFIG_NETCONSOLE | |
197 | #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP | |
59189a8b | 198 | |
9543e954 TH |
199 | /* USB Mass Storage Gadget */ |
200 | #define CONFIG_USB_GADGET | |
201 | #define CONFIG_CMD_USB_MASS_STORAGE | |
01acd6ab PK |
202 | #define CONFIG_USB_FUNCTION_MASS_STORAGE |
203 | #define CONFIG_USB_GADGET_DOWNLOAD | |
9543e954 TH |
204 | #define CONFIG_USB_GADGET_VBUS_DRAW 2 |
205 | ||
206 | /* Netchip IDs */ | |
207 | #define CONFIG_G_DNL_VENDOR_NUM 0x0525 | |
208 | #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 | |
209 | #define CONFIG_G_DNL_MANUFACTURER "Gateworks" | |
210 | ||
7a278f9f TH |
211 | /* Framebuffer and LCD */ |
212 | #define CONFIG_VIDEO | |
213 | #define CONFIG_VIDEO_IPUV3 | |
214 | #define CONFIG_CFB_CONSOLE | |
215 | #define CONFIG_VGA_AS_SINGLE_DEVICE | |
216 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | |
217 | #define CONFIG_VIDEO_BMP_RLE8 | |
218 | #define CONFIG_SPLASH_SCREEN | |
219 | #define CONFIG_BMP_16BPP | |
220 | #define CONFIG_VIDEO_LOGO | |
221 | #define CONFIG_IPUV3_CLK 260000000 | |
222 | #define CONFIG_CMD_HDMIDETECT | |
223 | #define CONFIG_CONSOLE_MUX | |
224 | #define CONFIG_IMX_HDMI | |
225 | #define CONFIG_IMX_VIDEO_SKIP | |
226 | ||
59189a8b | 227 | /* Miscellaneous configurable options */ |
59189a8b TH |
228 | #define CONFIG_HWCONFIG |
229 | ||
230 | /* Print Buffer Size */ | |
231 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
59189a8b TH |
232 | |
233 | /* Memory configuration */ | |
234 | #define CONFIG_SYS_MEMTEST_START 0x10000000 | |
235 | #define CONFIG_SYS_MEMTEST_END 0x10010000 | |
236 | #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 | |
59189a8b TH |
237 | |
238 | /* Physical Memory Map */ | |
239 | #define CONFIG_NR_DRAM_BANKS 1 | |
240 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
241 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
242 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
243 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
244 | ||
245 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
246 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
247 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
248 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
249 | ||
59189a8b TH |
250 | /* |
251 | * MTD Command for mtdparts | |
252 | */ | |
a380ce6e | 253 | #define CONFIG_LZO |
59189a8b TH |
254 | #define CONFIG_CMD_MTDPARTS |
255 | #define CONFIG_MTD_DEVICE | |
256 | #define CONFIG_MTD_PARTITIONS | |
257 | #ifdef CONFIG_SPI_FLASH | |
258 | #define MTDIDS_DEFAULT "nor0=nor" | |
259 | #define MTDPARTS_DEFAULT \ | |
260 | "mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)" | |
261 | #else | |
262 | #define MTDIDS_DEFAULT "nand0=nand" | |
263 | #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)" | |
264 | #endif | |
265 | ||
266 | /* Persistent Environment Config */ | |
59189a8b TH |
267 | #ifdef CONFIG_SPI_FLASH |
268 | #define CONFIG_ENV_IS_IN_SPI_FLASH | |
269 | #else | |
270 | #define CONFIG_ENV_IS_IN_NAND | |
271 | #endif | |
272 | #if defined(CONFIG_ENV_IS_IN_MMC) | |
59189a8b | 273 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
0a9c2150 TH |
274 | #define CONFIG_ENV_OFFSET (709 * SZ_1K) |
275 | #define CONFIG_ENV_SIZE (128 * SZ_1K) | |
276 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K)) | |
59189a8b | 277 | #elif defined(CONFIG_ENV_IS_IN_NAND) |
55ff55e9 TH |
278 | #define CONFIG_ENV_OFFSET (16 * SZ_1M) |
279 | #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K) | |
59189a8b | 280 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
55ff55e9 | 281 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K)) |
59189a8b TH |
282 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
283 | #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) | |
55ff55e9 TH |
284 | #define CONFIG_ENV_OFFSET (512 * SZ_1K) |
285 | #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) | |
286 | #define CONFIG_ENV_SIZE (8 * SZ_1K) | |
59189a8b TH |
287 | #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS |
288 | #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS | |
289 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE | |
290 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
291 | #endif | |
292 | ||
293 | /* Environment */ | |
59189a8b TH |
294 | #define CONFIG_IPADDR 192.168.1.1 |
295 | #define CONFIG_SERVERIP 192.168.1.146 | |
296 | #define HWCONFIG_DEFAULT \ | |
297 | "hwconfig=rs232;" \ | |
298 | "dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \ | |
299 | ||
300 | #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ | |
04171690 | 301 | "usb_pgood_delay=2000\0" \ |
59189a8b TH |
302 | "console=ttymxc1\0" \ |
303 | "bootdevs=usb mmc sata flash\0" \ | |
304 | HWCONFIG_DEFAULT \ | |
305 | "video=\0" \ | |
306 | \ | |
307 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
308 | "mtdids=" MTDIDS_DEFAULT "\0" \ | |
309 | \ | |
310 | "fdt_high=0xffffffff\0" \ | |
311 | "fdt_addr=0x18000000\0" \ | |
8cc25eb8 | 312 | "initrd_high=0xffffffff\0" \ |
e2801a96 | 313 | "bootdir=boot\0" \ |
59189a8b | 314 | "loadfdt=" \ |
e2801a96 TH |
315 | "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \ |
316 | "echo Loaded DTB from ${bootdir}/${fdt_file}; " \ | |
317 | "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \ | |
318 | "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \ | |
319 | "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \ | |
320 | "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \ | |
59189a8b TH |
321 | "fi\0" \ |
322 | \ | |
e2801a96 | 323 | "script=6x_bootscript-ventana\0" \ |
59189a8b | 324 | "loadscript=" \ |
e2801a96 | 325 | "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \ |
59189a8b TH |
326 | "source; " \ |
327 | "fi\0" \ | |
328 | \ | |
e2801a96 | 329 | "uimage=uImage\0" \ |
59189a8b TH |
330 | "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \ |
331 | "mmc_boot=" \ | |
332 | "setenv fsload 'ext2load mmc 0:1'; " \ | |
333 | "mmc dev 0 && mmc rescan && " \ | |
560e8b3f | 334 | "setenv dtype mmc; run loadscript; " \ |
e2801a96 | 335 | "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ |
59189a8b TH |
336 | "setenv bootargs console=${console},${baudrate} " \ |
337 | "root=/dev/mmcblk0p1 rootfstype=ext4 " \ | |
338 | "rootwait rw ${video} ${extra}; " \ | |
339 | "if run loadfdt && fdt addr ${fdt_addr}; then " \ | |
340 | "bootm ${loadaddr} - ${fdt_addr}; " \ | |
341 | "else " \ | |
342 | "bootm; " \ | |
343 | "fi; " \ | |
344 | "fi\0" \ | |
345 | \ | |
346 | "sata_boot=" \ | |
347 | "setenv fsload 'ext2load sata 0:1'; sata init && " \ | |
560e8b3f | 348 | "setenv dtype sata; run loadscript; " \ |
e2801a96 | 349 | "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ |
59189a8b TH |
350 | "setenv bootargs console=${console},${baudrate} " \ |
351 | "root=/dev/sda1 rootfstype=ext4 " \ | |
352 | "rootwait rw ${video} ${extra}; " \ | |
353 | "if run loadfdt && fdt addr ${fdt_addr}; then " \ | |
354 | "bootm ${loadaddr} - ${fdt_addr}; " \ | |
355 | "else " \ | |
356 | "bootm; " \ | |
357 | "fi; " \ | |
358 | "fi\0" \ | |
359 | "usb_boot=" \ | |
360 | "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \ | |
560e8b3f | 361 | "setenv dtype usb; run loadscript; " \ |
e2801a96 | 362 | "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ |
59189a8b TH |
363 | "setenv bootargs console=${console},${baudrate} " \ |
364 | "root=/dev/sda1 rootfstype=ext4 " \ | |
365 | "rootwait rw ${video} ${extra}; " \ | |
366 | "if run loadfdt && fdt addr ${fdt_addr}; then " \ | |
367 | "bootm ${loadaddr} - ${fdt_addr}; " \ | |
368 | "else " \ | |
369 | "bootm; " \ | |
370 | "fi; " \ | |
371 | "fi\0" | |
372 | ||
373 | #ifdef CONFIG_SPI_FLASH | |
374 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
375 | CONFIG_EXTRA_ENV_SETTINGS_COMMON \ | |
376 | "image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \ | |
377 | "image_uboot=ventana/u-boot_spi.imx\0" \ | |
378 | \ | |
379 | "spi_koffset=0x90000\0" \ | |
380 | "spi_klen=0x200000\0" \ | |
381 | \ | |
382 | "spi_updateuboot=echo Updating uboot from " \ | |
383 | "${serverip}:${image_uboot}...; " \ | |
384 | "tftpboot ${loadaddr} ${image_uboot} && " \ | |
385 | "sf probe && sf erase 0 80000 && " \ | |
386 | "sf write ${loadaddr} 400 ${filesize}\0" \ | |
387 | "spi_update=echo Updating OS from ${serverip}:${image_os} " \ | |
388 | "to ${spi_koffset} ...; " \ | |
389 | "tftp ${loadaddr} ${image_os} && " \ | |
390 | "sf probe && " \ | |
391 | "sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \ | |
392 | \ | |
393 | "flash_boot=" \ | |
394 | "if sf probe && " \ | |
395 | "sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \ | |
396 | "setenv bootargs console=${console},${baudrate} " \ | |
397 | "root=/dev/mtdblock3 " \ | |
398 | "rootfstype=squashfs,jffs2 " \ | |
399 | "${video} ${extra}; " \ | |
400 | "bootm; " \ | |
401 | "fi\0" | |
402 | #else | |
403 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
404 | CONFIG_EXTRA_ENV_SETTINGS_COMMON \ | |
59189a8b | 405 | \ |
e2801a96 | 406 | "image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \ |
59189a8b TH |
407 | "nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \ |
408 | "tftp ${loadaddr} ${image_rootfs} && " \ | |
409 | "nand erase.part rootfs && " \ | |
410 | "nand write ${loadaddr} rootfs ${filesize}\0" \ | |
411 | \ | |
412 | "flash_boot=" \ | |
413 | "setenv fsload 'ubifsload'; " \ | |
e2801a96 TH |
414 | "ubi part rootfs; " \ |
415 | "if ubi check boot; then " \ | |
416 | "ubifsmount ubi0:boot; " \ | |
417 | "setenv root ubi0:rootfs ubi.mtd=2 " \ | |
418 | "rootfstype=squashfs,ubifs; " \ | |
419 | "setenv bootdir; " \ | |
420 | "elif ubi check rootfs; then " \ | |
421 | "ubifsmount ubi0:rootfs; " \ | |
422 | "setenv root ubi0:rootfs ubi.mtd=2 " \ | |
423 | "rootfstype=ubifs; " \ | |
424 | "fi; " \ | |
560e8b3f | 425 | "setenv dtype nand; run loadscript; " \ |
e2801a96 | 426 | "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ |
59189a8b | 427 | "setenv bootargs console=${console},${baudrate} " \ |
e2801a96 | 428 | "root=${root} ${video} ${extra}; " \ |
59189a8b TH |
429 | "if run loadfdt && fdt addr ${fdt_addr}; then " \ |
430 | "ubifsumount; " \ | |
431 | "bootm ${loadaddr} - ${fdt_addr}; " \ | |
432 | "else " \ | |
433 | "ubifsumount; bootm; " \ | |
434 | "fi; " \ | |
435 | "fi\0" | |
436 | #endif | |
437 | ||
438 | #define CONFIG_BOOTCOMMAND \ | |
439 | "for btype in ${bootdevs}; do " \ | |
440 | "echo; echo Attempting ${btype} boot...; " \ | |
441 | "if run ${btype}_boot; then; fi; " \ | |
442 | "done" | |
443 | ||
444 | /* Device Tree Support */ | |
445 | #define CONFIG_OF_BOARD_SETUP | |
59189a8b TH |
446 | #define CONFIG_FDT_FIXUP_PARTITIONS |
447 | ||
59189a8b | 448 | #endif /* __CONFIG_H */ |