[thirdparty/u-boot.git] / include / configs / gw_ventana.h

/*
 * Copyright (C) 2013 Gateworks Corporation
 *
 * SPDX-License-Identifier: GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* SPL */
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_POWER_SUPPORT
/* Location in NAND to read U-Boot from */
#define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * SZ_1M)

/* Falcon Mode */
#define CONFIG_CMD_SPL
#define CONFIG_SPL_OS_BOOT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SYS_SPL_ARGS_ADDR	0x18000000
#define CONFIG_CMD_SPL_WRITE_SIZE	(128 * SZ_1K)

/* Falcon Mode - NAND support: args@17MB kernel@18MB */
#define CONFIG_CMD_SPL_NAND_OFS		(17 * SZ_1M)
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	(18 * SZ_1M)

/* Falcon Mode - MMC support: args@1MB kernel@2MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x800	/* 1MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	(CONFIG_CMD_SPL_WRITE_SIZE / 512)
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x1000	/* 2MB */

#include "imx6_spl.h"                  /* common IMX6 SPL configuration */
#include "mx6_common.h"

#define CONFIG_MACH_TYPE	4520   /* Gateworks Ventana Platform */

/* Serial ATAG */
#define CONFIG_SERIAL_TAG

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)

/* Init Functions */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R

/* Driver Model */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_DM_GPIO
#define CONFIG_DM_THERMAL
#endif

/* GPIO */
#define CONFIG_MXC_GPIO

/* Thermal */
#define CONFIG_IMX_THERMAL

/* Serial */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	       UART2_BASE

#ifdef CONFIG_SPI_FLASH

/* SPI */
#ifdef CONFIG_CMD_SF
  #define CONFIG_MXC_SPI
  #define CONFIG_SPI_FLASH_MTD
  #define CONFIG_SPI_FLASH_BAR
  #define CONFIG_SF_DEFAULT_BUS              0
  #define CONFIG_SF_DEFAULT_CS               0
					     /* GPIO 3-19 (21248) */
  #define CONFIG_SF_DEFAULT_SPEED            30000000
  #define CONFIG_SF_DEFAULT_MODE             (SPI_MODE_0)
#endif

#else
/* Enable NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
#ifdef CONFIG_CMD_NAND
  #define CONFIG_NAND_MXS
  #define CONFIG_SYS_MAX_NAND_DEVICE	1
  #define CONFIG_SYS_NAND_BASE		0x40000000
  #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  #define CONFIG_SYS_NAND_ONFI_DETECTION

  /* DMA stuff, needed for GPMI/MXS NAND support */
  #define CONFIG_APBH_DMA
  #define CONFIG_APBH_DMA_BURST
  #define CONFIG_APBH_DMA_BURST8
#endif

#endif /* CONFIG_SPI_FLASH */

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_I2C_GSC			0
#define CONFIG_I2C_PMIC			1
#define CONFIG_I2C_EDID

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR      0
#define CONFIG_SYS_FSL_USDHC_NUM       1

/* Filesystem support */
#define CONFIG_CMD_UBIFS

/*
 * SATA Configs
 */
#define CONFIG_CMD_SATA
#ifdef CONFIG_CMD_SATA
  #define CONFIG_DWC_AHSATA
  #define CONFIG_SYS_SATA_MAX_DEVICE	1
  #define CONFIG_DWC_AHSATA_PORT_ID	0
  #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
  #define CONFIG_LBA48
  #define CONFIG_LIBATA
#endif

/*
 * PCI express
 */
#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCI_FIXUP_DEV
#define CONFIG_PCIE_IMX
#endif

/*
 * PMIC
 */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
#define CONFIG_POWER_LTC3676
#define CONFIG_POWER_LTC3676_I2C_ADDR  0x3c

/* Various command support */
#define CONFIG_CMD_MII
#define CONFIG_CMD_BMODE         /* set eFUSE shadow for a boot dev and reset */
#define CONFIG_CMD_HDMIDETECT    /* detect HDMI output device */
#define CONFIG_CMD_GSC
#define CONFIG_CMD_EECONFIG      /* Gateworks EEPROM config cmd */
#define CONFIG_CMD_UBI
#define CONFIG_RBTREE

/* Ethernet support */
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE             ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE      RGMII
#define CONFIG_FEC_MXC_PHYADDR   0
#define CONFIG_PHYLIB
#define CONFIG_ARP_TIMEOUT       200UL

/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET  /* For OTG port */
#define CONFIG_MXC_USB_PORTSC     (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS      0
#define CONFIG_USB_KEYBOARD
#define CONFIG_USBD_HS
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_CDC
#define CONFIG_NETCONSOLE
#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP

/* USB Mass Storage Gadget */
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_FUNCTION_MASS_STORAGE

/* Framebuffer and LCD */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK          260000000
#define CONFIG_CMD_HDMIDETECT
#define CONFIG_CONSOLE_MUX
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP

/* Miscellaneous configurable options */
#define CONFIG_HWCONFIG

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)

/* Memory configuration */
#define CONFIG_SYS_MEMTEST_START       0x10000000
#define CONFIG_SYS_MEMTEST_END	       0x10010000
#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS           1
#define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/*
 * MTD Command for mtdparts
 */
#define CONFIG_LZO
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#ifdef CONFIG_SPI_FLASH
#define MTDIDS_DEFAULT    "nor0=nor"
#define MTDPARTS_DEFAULT  \
	"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
#else
#define MTDIDS_DEFAULT    "nand0=nand"
#define MTDPARTS_DEFAULT  "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
#endif

/* Persistent Environment Config */
#ifdef CONFIG_SPI_FLASH
#define CONFIG_ENV_IS_IN_SPI_FLASH
#else
#define CONFIG_ENV_IS_IN_NAND
#endif
#if defined(CONFIG_ENV_IS_IN_MMC)
  #define CONFIG_SYS_MMC_ENV_DEV         0
  #define CONFIG_ENV_OFFSET              (709 * SZ_1K)
  #define CONFIG_ENV_SIZE                (128 * SZ_1K)
  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (128 * SZ_1K))
#elif defined(CONFIG_ENV_IS_IN_NAND)
  #define CONFIG_ENV_OFFSET              (16 * SZ_1M)
  #define CONFIG_ENV_SECT_SIZE           (128 * SZ_1K)
  #define CONFIG_ENV_SIZE                CONFIG_ENV_SECT_SIZE
  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (512 * SZ_1K))
  #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
  #define CONFIG_ENV_OFFSET		(512 * SZ_1K)
  #define CONFIG_ENV_SECT_SIZE		(64 * SZ_1K)
  #define CONFIG_ENV_SIZE		(8 * SZ_1K)
  #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
  #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
  #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
  #define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
#endif

/* Environment */
#define CONFIG_IPADDR             192.168.1.1
#define CONFIG_SERVERIP           192.168.1.146
#define HWCONFIG_DEFAULT \
	"hwconfig=rs232;" \
	"dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \

#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	"usb_pgood_delay=2000\0" \
	"console=ttymxc1\0" \
	"bootdevs=usb mmc sata flash\0" \
	HWCONFIG_DEFAULT \
	"video=\0" \
	\
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"mtdids=" MTDIDS_DEFAULT "\0" \
	\
	"fdt_high=0xffffffff\0" \
	"fdt_addr=0x18000000\0" \
	"initrd_high=0xffffffff\0" \
	"bootdir=boot\0" \
	"loadfdt=" \
		"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
			"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
			"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
			"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
		"fi\0" \
	\
	"script=6x_bootscript-ventana\0" \
	"loadscript=" \
		"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
			"source; " \
		"fi\0" \
	\
	"uimage=uImage\0" \
	"mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
	"mmc_boot=" \
		"setenv fsload 'ext2load mmc 0:1'; " \
		"mmc dev 0 && mmc rescan && " \
		"setenv dtype mmc; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/mmcblk0p1 rootfstype=ext4 " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt && fdt addr ${fdt_addr}; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0" \
	\
	"sata_boot=" \
		"setenv fsload 'ext2load sata 0:1'; sata init && " \
		"setenv dtype sata; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/sda1 rootfstype=ext4 " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt && fdt addr ${fdt_addr}; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0" \
	"usb_boot=" \
		"setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
		"setenv dtype usb; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/sda1 rootfstype=ext4 " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt && fdt addr ${fdt_addr}; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0"

#ifdef CONFIG_SPI_FLASH
	#define CONFIG_EXTRA_ENV_SETTINGS \
	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
	"image_uboot=ventana/u-boot_spi.imx\0" \
	\
	"spi_koffset=0x90000\0" \
	"spi_klen=0x200000\0" \
	\
	"spi_updateuboot=echo Updating uboot from " \
		"${serverip}:${image_uboot}...; " \
		"tftpboot ${loadaddr} ${image_uboot} && " \
		"sf probe && sf erase 0 80000 && " \
			"sf write ${loadaddr} 400 ${filesize}\0" \
	"spi_update=echo Updating OS from ${serverip}:${image_os} " \
		"to ${spi_koffset} ...; " \
		"tftp ${loadaddr} ${image_os} && " \
		"sf probe && " \
		"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
	\
	"flash_boot=" \
		"if sf probe && " \
		"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/mtdblock3 " \
				"rootfstype=squashfs,jffs2 " \
				"${video} ${extra}; " \
			"bootm; " \
		"fi\0"
#else
	#define CONFIG_EXTRA_ENV_SETTINGS \
	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	\
	"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
	"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
		"tftp ${loadaddr} ${image_rootfs} && " \
		"nand erase.part rootfs && " \
		"nand write ${loadaddr} rootfs ${filesize}\0" \
	\
	"flash_boot=" \
		"setenv fsload 'ubifsload'; " \
		"ubi part rootfs; " \
		"if ubi check boot; then " \
			"ubifsmount ubi0:boot; " \
			"setenv root ubi0:rootfs ubi.mtd=2 " \
				"rootfstype=squashfs,ubifs; " \
			"setenv bootdir; " \
		"elif ubi check rootfs; then " \
			"ubifsmount ubi0:rootfs; " \
			"setenv root ubi0:rootfs ubi.mtd=2 " \
				"rootfstype=ubifs; " \
		"fi; " \
		"setenv dtype nand; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=${root} ${video} ${extra}; " \
			"if run loadfdt && fdt addr ${fdt_addr}; then " \
				"ubifsumount; " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"ubifsumount; bootm; " \
			"fi; " \
		"fi\0"
#endif

#define CONFIG_BOOTCOMMAND \
	"for btype in ${bootdevs}; do " \
		"echo; echo Attempting ${btype} boot...; " \
		"if run ${btype}_boot; then; fi; " \
	"done"

/* Device Tree Support */
#define CONFIG_FDT_FIXUP_PARTITIONS

#endif			       /* __CONFIG_H */
Commit	Line	Data
59189a8b TH	1	/*
	2	* Copyright (C) 2013 Gateworks Corporation
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#ifndef __CONFIG_H
	8	#define __CONFIG_H
	9
0cc11dea	10	/* SPL */
06c3564d	11	#define CONFIG_SPL_BOARD_INIT
0cc11dea TH	12	#define CONFIG_SPL_NAND_SUPPORT
0cc11dea TH	13	#define CONFIG_SPL_MMC_SUPPORT
e06a0362	14	#define CONFIG_SPL_POWER_SUPPORT
0cc11dea	15	/* Location in NAND to read U-Boot from */
55ff55e9	16	#define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
0cc11dea	17
53940a50 TH	18	/* Falcon Mode */
	19	#define CONFIG_CMD_SPL
	20	#define CONFIG_SPL_OS_BOOT
	21	#define CONFIG_SPL_ENV_SUPPORT
	22	#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
	23	#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
	24
	25	/* Falcon Mode - NAND support: args@17MB kernel@18MB */
	26	#define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M)
	27	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
	28
	29	/* Falcon Mode - MMC support: args@1MB kernel@2MB */
	30	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
	31	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
	32	#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
	33
0cc11dea	34	#include "imx6_spl.h" /* common IMX6 SPL configuration */
59189a8b	35	#include "mx6_common.h"
59189a8b TH	36
	37	#define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
	38
ea690917	39	/* Serial ATAG */
59189a8b	40	#define CONFIG_SERIAL_TAG
59189a8b TH	41
59189a8b TH	42	/* Size of malloc() pool */
55ff55e9	43	#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
59189a8b TH	44
	45	/* Init Functions */
	46	#define CONFIG_BOARD_EARLY_INIT_F
	47	#define CONFIG_MISC_INIT_R
	48
e1b4770c TH	49	/* Driver Model */
e1b4770c TH	50	#ifndef CONFIG_SPL_BUILD
e1b4770c	51	#define CONFIG_DM_GPIO
50de5088	52	#define CONFIG_DM_THERMAL
e1b4770c TH	53	#endif
e1b4770c TH	54
59189a8b TH	55	/* GPIO */
	56	#define CONFIG_MXC_GPIO
	57
50de5088	58	/* Thermal */
1368f993	59	#define CONFIG_IMX_THERMAL
50de5088	60
59189a8b TH	61	/* Serial */
	62	#define CONFIG_MXC_UART
	63	#define CONFIG_MXC_UART_BASE UART2_BASE
	64
	65	#ifdef CONFIG_SPI_FLASH
	66
	67	/* SPI */
59189a8b TH	68	#ifdef CONFIG_CMD_SF
	69	#define CONFIG_MXC_SPI
	70	#define CONFIG_SPI_FLASH_MTD
	71	#define CONFIG_SPI_FLASH_BAR
59189a8b	72	#define CONFIG_SF_DEFAULT_BUS 0
155fa9af	73	#define CONFIG_SF_DEFAULT_CS 0
59189a8b TH	74	/* GPIO 3-19 (21248) */
	75	#define CONFIG_SF_DEFAULT_SPEED 30000000
	76	#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
	77	#endif
	78
	79	#else
	80	/* Enable NAND support */
59189a8b TH	81	#define CONFIG_CMD_NAND
	82	#define CONFIG_CMD_NAND_TRIMFFS
	83	#ifdef CONFIG_CMD_NAND
	84	#define CONFIG_NAND_MXS
	85	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	86	#define CONFIG_SYS_NAND_BASE 0x40000000
	87	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	88	#define CONFIG_SYS_NAND_ONFI_DETECTION
	89
	90	/* DMA stuff, needed for GPMI/MXS NAND support */
	91	#define CONFIG_APBH_DMA
	92	#define CONFIG_APBH_DMA_BURST
	93	#define CONFIG_APBH_DMA_BURST8
	94	#endif
	95
	96	#endif /* CONFIG_SPI_FLASH */
	97
59189a8b	98	/* I2C Configs */
59189a8b TH	99	#define CONFIG_SYS_I2C
59189a8b TH	100	#define CONFIG_SYS_I2C_MXC
03544c66 AA	101	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	102	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	103	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
9c0fe83e TH	104	#define CONFIG_SYS_I2C_SPEED 100000
	105	#define CONFIG_I2C_GSC 0
	106	#define CONFIG_I2C_PMIC 1
f6747cda	107	#define CONFIG_I2C_EDID
59189a8b TH	108
59189a8b TH	109	/* MMC Configs */
59189a8b TH	110	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
59189a8b TH	111	#define CONFIG_SYS_FSL_USDHC_NUM 1
59189a8b TH	112
59189a8b TH	113	/* Filesystem support */
59189a8b	114	#define CONFIG_CMD_UBIFS
59189a8b	115
59189a8b TH	116	/*
	117	* SATA Configs
	118	*/
	119	#define CONFIG_CMD_SATA
	120	#ifdef CONFIG_CMD_SATA
	121	#define CONFIG_DWC_AHSATA
	122	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	123	#define CONFIG_DWC_AHSATA_PORT_ID 0
	124	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	125	#define CONFIG_LBA48
	126	#define CONFIG_LIBATA
	127	#endif
	128
	129	/*
	130	* PCI express
	131	*/
	132	#define CONFIG_CMD_PCI
	133	#ifdef CONFIG_CMD_PCI
	134	#define CONFIG_PCI
	135	#define CONFIG_PCI_PNP
	136	#define CONFIG_PCI_SCAN_SHOW
dad08286	137	#define CONFIG_PCI_FIXUP_DEV
59189a8b TH	138	#define CONFIG_PCIE_IMX
	139	#endif
	140
	141	/*
	142	* PMIC
	143	*/
	144	#define CONFIG_POWER
	145	#define CONFIG_POWER_I2C
	146	#define CONFIG_POWER_PFUZE100
	147	#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
234d89da TH	148	#define CONFIG_POWER_LTC3676
234d89da TH	149	#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
59189a8b TH	150
59189a8b TH	151	/* Various command support */
59189a8b	152	#define CONFIG_CMD_MII
59189a8b TH	153	#define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
59189a8b TH	154	#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
59189a8b	155	#define CONFIG_CMD_GSC
9c0fe83e	156	#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
59189a8b TH	157	#define CONFIG_CMD_UBI
59189a8b TH	158	#define CONFIG_RBTREE
59189a8b TH	159
	160	/* Ethernet support */
	161	#define CONFIG_FEC_MXC
	162	#define CONFIG_MII
	163	#define IMX_FEC_BASE ENET_BASE_ADDR
	164	#define CONFIG_FEC_XCV_TYPE RGMII
59189a8b TH	165	#define CONFIG_FEC_MXC_PHYADDR 0
	166	#define CONFIG_PHYLIB
	167	#define CONFIG_ARP_TIMEOUT 200UL
	168
	169	/* USB Configs */
59189a8b TH	170	#define CONFIG_USB_EHCI
	171	#define CONFIG_USB_EHCI_MX6
	172	#define CONFIG_USB_STORAGE
	173	#define CONFIG_USB_HOST_ETHER
	174	#define CONFIG_USB_ETHER_ASIX
	175	#define CONFIG_USB_ETHER_SMSC95XX
	176	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	177	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
	178	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	179	#define CONFIG_MXC_USB_FLAGS 0
	180	#define CONFIG_USB_KEYBOARD
59189a8b	181	#define CONFIG_USBD_HS
59189a8b TH	182	#define CONFIG_USB_ETHER
	183	#define CONFIG_USB_ETH_CDC
	184	#define CONFIG_NETCONSOLE
	185	#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
59189a8b	186
9543e954	187	/* USB Mass Storage Gadget */
9543e954	188	#define CONFIG_CMD_USB_MASS_STORAGE
01acd6ab	189	#define CONFIG_USB_FUNCTION_MASS_STORAGE
9543e954	190
7a278f9f TH	191	/* Framebuffer and LCD */
	192	#define CONFIG_VIDEO
	193	#define CONFIG_VIDEO_IPUV3
	194	#define CONFIG_CFB_CONSOLE
	195	#define CONFIG_VGA_AS_SINGLE_DEVICE
	196	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	197	#define CONFIG_VIDEO_BMP_RLE8
	198	#define CONFIG_SPLASH_SCREEN
	199	#define CONFIG_BMP_16BPP
	200	#define CONFIG_VIDEO_LOGO
	201	#define CONFIG_IPUV3_CLK 260000000
	202	#define CONFIG_CMD_HDMIDETECT
	203	#define CONFIG_CONSOLE_MUX
	204	#define CONFIG_IMX_HDMI
	205	#define CONFIG_IMX_VIDEO_SKIP
	206
59189a8b	207	/* Miscellaneous configurable options */
59189a8b TH	208	#define CONFIG_HWCONFIG
	209
	210	/* Print Buffer Size */
	211	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
59189a8b TH	212
	213	/* Memory configuration */
	214	#define CONFIG_SYS_MEMTEST_START 0x10000000
	215	#define CONFIG_SYS_MEMTEST_END 0x10010000
	216	#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
59189a8b TH	217
	218	/* Physical Memory Map */
	219	#define CONFIG_NR_DRAM_BANKS 1
	220	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	221	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	222	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	223	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	224
	225	#define CONFIG_SYS_INIT_SP_OFFSET \
	226	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	227	#define CONFIG_SYS_INIT_SP_ADDR \
	228	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	229
59189a8b TH	230	/*
	231	* MTD Command for mtdparts
	232	*/
a380ce6e	233	#define CONFIG_LZO
59189a8b TH	234	#define CONFIG_CMD_MTDPARTS
	235	#define CONFIG_MTD_DEVICE
	236	#define CONFIG_MTD_PARTITIONS
	237	#ifdef CONFIG_SPI_FLASH
	238	#define MTDIDS_DEFAULT "nor0=nor"
	239	#define MTDPARTS_DEFAULT \
	240	"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
	241	#else
	242	#define MTDIDS_DEFAULT "nand0=nand"
	243	#define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
	244	#endif
	245
	246	/* Persistent Environment Config */
59189a8b TH	247	#ifdef CONFIG_SPI_FLASH
	248	#define CONFIG_ENV_IS_IN_SPI_FLASH
	249	#else
	250	#define CONFIG_ENV_IS_IN_NAND
	251	#endif
	252	#if defined(CONFIG_ENV_IS_IN_MMC)
59189a8b	253	#define CONFIG_SYS_MMC_ENV_DEV 0
0a9c2150 TH	254	#define CONFIG_ENV_OFFSET (709 * SZ_1K)
	255	#define CONFIG_ENV_SIZE (128 * SZ_1K)
	256	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K))
59189a8b	257	#elif defined(CONFIG_ENV_IS_IN_NAND)
55ff55e9 TH	258	#define CONFIG_ENV_OFFSET (16 * SZ_1M)
55ff55e9 TH	259	#define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
59189a8b	260	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
55ff55e9	261	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K))
59189a8b TH	262	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
59189a8b TH	263	#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
55ff55e9 TH	264	#define CONFIG_ENV_OFFSET (512 * SZ_1K)
	265	#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
	266	#define CONFIG_ENV_SIZE (8 * SZ_1K)
59189a8b TH	267	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	268	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	269	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	270	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	271	#endif
	272
	273	/* Environment */
59189a8b TH	274	#define CONFIG_IPADDR 192.168.1.1
	275	#define CONFIG_SERVERIP 192.168.1.146
	276	#define HWCONFIG_DEFAULT \
	277	"hwconfig=rs232;" \
	278	"dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \
	279
	280	#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
04171690	281	"usb_pgood_delay=2000\0" \
59189a8b TH	282	"console=ttymxc1\0" \
	283	"bootdevs=usb mmc sata flash\0" \
	284	HWCONFIG_DEFAULT \
	285	"video=\0" \
	286	\
	287	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	288	"mtdids=" MTDIDS_DEFAULT "\0" \
	289	\
	290	"fdt_high=0xffffffff\0" \
	291	"fdt_addr=0x18000000\0" \
8cc25eb8	292	"initrd_high=0xffffffff\0" \
e2801a96	293	"bootdir=boot\0" \
59189a8b	294	"loadfdt=" \
e2801a96 TH	295	"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
	296	"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
	297	"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
	298	"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
	299	"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
	300	"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
59189a8b TH	301	"fi\0" \
59189a8b TH	302	\
e2801a96	303	"script=6x_bootscript-ventana\0" \
59189a8b	304	"loadscript=" \
e2801a96	305	"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
59189a8b TH	306	"source; " \
	307	"fi\0" \
	308	\
e2801a96	309	"uimage=uImage\0" \
59189a8b TH	310	"mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
	311	"mmc_boot=" \
	312	"setenv fsload 'ext2load mmc 0:1'; " \
	313	"mmc dev 0 && mmc rescan && " \
560e8b3f	314	"setenv dtype mmc; run loadscript; " \
e2801a96	315	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b TH	316	"setenv bootargs console=${console},${baudrate} " \
	317	"root=/dev/mmcblk0p1 rootfstype=ext4 " \
	318	"rootwait rw ${video} ${extra}; " \
	319	"if run loadfdt && fdt addr ${fdt_addr}; then " \
	320	"bootm ${loadaddr} - ${fdt_addr}; " \
	321	"else " \
	322	"bootm; " \
	323	"fi; " \
	324	"fi\0" \
	325	\
	326	"sata_boot=" \
	327	"setenv fsload 'ext2load sata 0:1'; sata init && " \
560e8b3f	328	"setenv dtype sata; run loadscript; " \
e2801a96	329	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b TH	330	"setenv bootargs console=${console},${baudrate} " \
	331	"root=/dev/sda1 rootfstype=ext4 " \
	332	"rootwait rw ${video} ${extra}; " \
	333	"if run loadfdt && fdt addr ${fdt_addr}; then " \
	334	"bootm ${loadaddr} - ${fdt_addr}; " \
	335	"else " \
	336	"bootm; " \
	337	"fi; " \
	338	"fi\0" \
	339	"usb_boot=" \
	340	"setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
560e8b3f	341	"setenv dtype usb; run loadscript; " \
e2801a96	342	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b TH	343	"setenv bootargs console=${console},${baudrate} " \
	344	"root=/dev/sda1 rootfstype=ext4 " \
	345	"rootwait rw ${video} ${extra}; " \
	346	"if run loadfdt && fdt addr ${fdt_addr}; then " \
	347	"bootm ${loadaddr} - ${fdt_addr}; " \
	348	"else " \
	349	"bootm; " \
	350	"fi; " \
	351	"fi\0"
	352
	353	#ifdef CONFIG_SPI_FLASH
	354	#define CONFIG_EXTRA_ENV_SETTINGS \
	355	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	356	"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
	357	"image_uboot=ventana/u-boot_spi.imx\0" \
	358	\
	359	"spi_koffset=0x90000\0" \
	360	"spi_klen=0x200000\0" \
	361	\
	362	"spi_updateuboot=echo Updating uboot from " \
	363	"${serverip}:${image_uboot}...; " \
	364	"tftpboot ${loadaddr} ${image_uboot} && " \
	365	"sf probe && sf erase 0 80000 && " \
	366	"sf write ${loadaddr} 400 ${filesize}\0" \
	367	"spi_update=echo Updating OS from ${serverip}:${image_os} " \
	368	"to ${spi_koffset} ...; " \
	369	"tftp ${loadaddr} ${image_os} && " \
	370	"sf probe && " \
	371	"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
	372	\
	373	"flash_boot=" \
	374	"if sf probe && " \
	375	"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
	376	"setenv bootargs console=${console},${baudrate} " \
	377	"root=/dev/mtdblock3 " \
	378	"rootfstype=squashfs,jffs2 " \
	379	"${video} ${extra}; " \
	380	"bootm; " \
	381	"fi\0"
	382	#else
	383	#define CONFIG_EXTRA_ENV_SETTINGS \
	384	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
59189a8b	385	\
e2801a96	386	"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
59189a8b TH	387	"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
	388	"tftp ${loadaddr} ${image_rootfs} && " \
	389	"nand erase.part rootfs && " \
	390	"nand write ${loadaddr} rootfs ${filesize}\0" \
	391	\
	392	"flash_boot=" \
	393	"setenv fsload 'ubifsload'; " \
e2801a96 TH	394	"ubi part rootfs; " \
	395	"if ubi check boot; then " \
	396	"ubifsmount ubi0:boot; " \
	397	"setenv root ubi0:rootfs ubi.mtd=2 " \
	398	"rootfstype=squashfs,ubifs; " \
	399	"setenv bootdir; " \
	400	"elif ubi check rootfs; then " \
	401	"ubifsmount ubi0:rootfs; " \
	402	"setenv root ubi0:rootfs ubi.mtd=2 " \
	403	"rootfstype=ubifs; " \
	404	"fi; " \
560e8b3f	405	"setenv dtype nand; run loadscript; " \
e2801a96	406	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b	407	"setenv bootargs console=${console},${baudrate} " \
e2801a96	408	"root=${root} ${video} ${extra}; " \
59189a8b TH	409	"if run loadfdt && fdt addr ${fdt_addr}; then " \
	410	"ubifsumount; " \
	411	"bootm ${loadaddr} - ${fdt_addr}; " \
	412	"else " \
	413	"ubifsumount; bootm; " \
	414	"fi; " \
	415	"fi\0"
	416	#endif
	417
	418	#define CONFIG_BOOTCOMMAND \
	419	"for btype in ${bootdevs}; do " \
	420	"echo; echo Attempting ${btype} boot...; " \
	421	"if run ${btype}_boot; then; fi; " \
	422	"done"
	423
	424	/* Device Tree Support */
59189a8b TH	425	#define CONFIG_FDT_FIXUP_PARTITIONS
59189a8b TH	426
59189a8b	427	#endif /* __CONFIG_H */