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34cda7a0 ŁD |
1 | /* |
2 | * iPAQ h2200 board configuration | |
3 | * | |
4 | * Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com> | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
34cda7a0 ŁD |
7 | */ |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
12 | #define MACH_TYPE_H2200 341 | |
13 | #define CONFIG_MACH_TYPE MACH_TYPE_H2200 | |
14 | ||
445abdf9 | 15 | #define CONFIG_SYS_GENERIC_BOARD |
34cda7a0 ŁD |
16 | #define CONFIG_CPU_PXA25X 1 |
17 | #define CONFIG_BOARD_H2200 | |
18 | ||
19 | #define CONFIG_SYS_NO_FLASH | |
20 | ||
34cda7a0 ŁD |
21 | #define CONFIG_NR_DRAM_BANKS 1 |
22 | #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ | |
23 | #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ | |
24 | ||
25 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
26 | #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE | |
27 | ||
28 | #define CONFIG_SYS_INIT_SP_ADDR 0xfffff800 | |
29 | ||
30 | #define CONFIG_ENV_SIZE 0x00040000 | |
31 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) | |
32 | ||
33 | #define CONFIG_ENV_IS_NOWHERE | |
34 | #define CONFIG_SYS_MAXARGS 16 | |
35 | #define CONFIG_SYS_LOAD_ADDR 0xa3000000 /* default load address */ | |
36 | ||
37 | /* | |
38 | * iPAQ 1st stage bootloader loads 2nd stage bootloader | |
39 | * at address 0xa0040000 but bootloader requires header | |
40 | * which is 0x1000 long. | |
41 | * | |
42 | * --- Header begin --- | |
43 | * .word 0xea0003fe ; b 0x1000 | |
44 | * | |
45 | * .org 0x40 | |
46 | * .ascii "ECEC" | |
47 | * | |
48 | * .org 0x1000 | |
49 | * --- Header end --- | |
50 | */ | |
51 | ||
52 | #define CONFIG_SYS_TEXT_BASE 0xa0041000 | |
53 | ||
54 | /* | |
55 | * Static chips | |
56 | */ | |
57 | ||
58 | #define CONFIG_SYS_MSC0_VAL 0x246c7ffc | |
59 | #define CONFIG_SYS_MSC1_VAL 0x7ff07ff0 | |
60 | #define CONFIG_SYS_MSC2_VAL 0x7ff07ff0 | |
61 | ||
62 | /* | |
63 | * PCMCIA and CF Interfaces | |
64 | */ | |
65 | ||
66 | #define CONFIG_SYS_MECR_VAL 0x00000000 | |
67 | #define CONFIG_SYS_MCMEM0_VAL 0x00000000 | |
68 | #define CONFIG_SYS_MCMEM1_VAL 0x00000000 | |
69 | #define CONFIG_SYS_MCATT0_VAL 0x00000000 | |
70 | #define CONFIG_SYS_MCATT1_VAL 0x00000000 | |
71 | #define CONFIG_SYS_MCIO0_VAL 0x00000000 | |
72 | #define CONFIG_SYS_MCIO1_VAL 0x00000000 | |
73 | ||
74 | #define CONFIG_SYS_FLYCNFG_VAL 0x00000000 | |
75 | #define CONFIG_SYS_SXCNFG_VAL 0x00040004 | |
76 | ||
77 | #define CONFIG_SYS_MDREFR_VAL 0x0099E018 | |
78 | #define CONFIG_SYS_MDCNFG_VAL 0x01C801CB | |
79 | #define CONFIG_SYS_MDMRS_VAL 0x00220022 | |
80 | ||
81 | #define CONFIG_SYS_PSSR_VAL 0x00000000 | |
82 | #define CONFIG_SYS_CKEN 0x00004840 | |
83 | #define CONFIG_SYS_CCCR 0x00000161 | |
84 | ||
85 | /* | |
86 | * GPIOs | |
87 | */ | |
88 | ||
89 | #define CONFIG_SYS_GPSR0_VAL 0x01000000 | |
90 | #define CONFIG_SYS_GPSR1_VAL 0x00000000 | |
91 | #define CONFIG_SYS_GPSR2_VAL 0x00010000 | |
92 | ||
93 | #define CONFIG_SYS_GPCR0_VAL 0x00000000 | |
94 | #define CONFIG_SYS_GPCR1_VAL 0x00000000 | |
95 | #define CONFIG_SYS_GPCR2_VAL 0x00000000 | |
96 | ||
97 | #define CONFIG_SYS_GPDR0_VAL 0xF7E38C00 | |
98 | #define CONFIG_SYS_GPDR1_VAL 0xBCFFBF83 | |
99 | #define CONFIG_SYS_GPDR2_VAL 0x000157FF | |
100 | ||
101 | #define CONFIG_SYS_GAFR0_L_VAL 0x80401000 | |
102 | #define CONFIG_SYS_GAFR0_U_VAL 0x00000112 | |
103 | #define CONFIG_SYS_GAFR1_L_VAL 0x600A9550 | |
104 | #define CONFIG_SYS_GAFR1_U_VAL 0x0005AAAA | |
105 | #define CONFIG_SYS_GAFR2_L_VAL 0x20000000 | |
106 | #define CONFIG_SYS_GAFR2_U_VAL 0x00000000 | |
107 | ||
108 | /* | |
109 | * Serial port | |
110 | */ | |
111 | ||
112 | #define CONFIG_PXA_SERIAL | |
113 | #define CONFIG_FFUART | |
114 | #define CONFIG_CONS_INDEX 3 | |
115 | ||
116 | #define CONFIG_BAUDRATE 115200 | |
117 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200 } | |
118 | ||
34cda7a0 ŁD |
119 | #define CONFIG_CMD_LOADB |
120 | #define CONFIG_CMD_SOURCE | |
121 | #define CONFIG_CMD_RUN | |
122 | #define CONFIG_CMD_IMI | |
123 | ||
124 | #define CONFIG_FIT | |
8973601c | 125 | #define CONFIG_FIT_DISABLE_SHA256 |
34cda7a0 ŁD |
126 | #define CONFIG_SETUP_MEMORY_TAGS |
127 | #define CONFIG_CMDLINE_TAG | |
128 | #define CONFIG_INITRD_TAG | |
129 | ||
130 | /* Monitor Command Prompt */ | |
131 | #define CONFIG_SYS_PROMPT "> " | |
132 | #define CONFIG_SYS_HUSH_PARSER | |
133 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "$ " | |
134 | ||
135 | /* Console I/O Buffer Size */ | |
136 | #define CONFIG_SYS_CBSIZE 256 | |
137 | ||
138 | /* Print Buffer Size */ | |
139 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
140 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
141 | ||
142 | #define CONFIG_BOOTARGS "root=/dev/ram0 ro console=ttyS0,115200n8" | |
143 | ||
a33fada1 LD |
144 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
145 | #define CONFIG_USB_DEV_PULLUP_GPIO 33 | |
146 | /* USB VBUS GPIO 3 */ | |
147 | ||
148 | #define CONFIG_CMD_NET | |
149 | #define CONFIG_CMD_PING | |
150 | ||
151 | #define CONFIG_BOOTDELAY 2 | |
152 | #define CONFIG_BOOTCOMMAND \ | |
153 | "setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \ | |
154 | "if bootp ; then setenv downloaded 1 ; fi ; done ; " \ | |
155 | "source :script ; " \ | |
156 | "bootm ; " | |
157 | ||
158 | #define CONFIG_USB_GADGET_PXA2XX | |
159 | #define CONFIG_USB_ETHER | |
160 | #define CONFIG_USB_ETH_SUBSET | |
161 | ||
162 | #define CONFIG_USBNET_DEV_ADDR "de:ad:be:ef:00:01" | |
163 | #define CONFIG_USBNET_HOST_ADDR "de:ad:be:ef:00:02" | |
164 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
165 | "stdin=serial\0" \ | |
166 | "stdout=serial\0" \ | |
167 | "stderr=serial\0" | |
168 | ||
34cda7a0 | 169 | #endif /* __CONFIG_H */ |